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| author | Marc Poulhiès <dkm@kataplop.net> | 2021-05-20 21:20:54 +0200 |
|---|---|---|
| committer | Marc Poulhiès <dkm@kataplop.net> | 2021-05-20 21:20:54 +0200 |
| commit | f3f30603ec08b6a54d85f75d140beca1de85a352 (patch) | |
| tree | 56097f3854bc6b63db4cc057c0eb0f33073e0e58 /pcb/gerbers/v0.1/left/left-B.SilkS.gbo | |
| parent | e762ae0ce661d8431cf11b31fe7c5117f4b5e3d0 (diff) | |
Add simple CAD file for plate
Initial plate design for early test/prototype.
Diffstat (limited to 'pcb/gerbers/v0.1/left/left-B.SilkS.gbo')
0 files changed, 0 insertions, 0 deletions