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cpu/cc2538: eliminate cc2538.ld and use cortexm_base.ld instead

pr/spi.typo
Ian Martin 7 years ago
parent
commit
10b001c3eb
  1. 155
      cpu/cc2538/ldscripts/cc2538.ld
  2. 11
      cpu/cc2538/ldscripts/cc2538nf11.ld
  3. 11
      cpu/cc2538/ldscripts/cc2538nf23.ld
  4. 11
      cpu/cc2538/ldscripts/cc2538nf53.ld
  5. 11
      cpu/cc2538/ldscripts/cc2538sf53.ld

155
cpu/cc2538/ldscripts/cc2538.ld

@ -1,155 +0,0 @@
/* ----------------------------------------------------------------------------
* SAM Software Package License
* ----------------------------------------------------------------------------
* Copyright (c) 2012, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following condition is met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SEARCH_DIR(.)
/* Define the default stack size for interrupt mode. As no context is
saved on this stack and ISRs are supposed to be short, it can be fairly
small. 512 byte should be a save assumption here */
STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x200; /* 512 byte */
/* Section Definitions */
SECTIONS
{
.text :
{
. = ALIGN(4);
_sfixed = .;
KEEP(*(.vectors .vectors.*))
*(.text .text.* .gnu.linkonce.t.*)
*(.glue_7t) *(.glue_7)
*(.rodata .rodata* .gnu.linkonce.r.*)
*(.ARM.extab* .gnu.linkonce.armextab.*)
/* Support C constructors, and C destructors in both user code
and the C library. This also provides support for C++ code. */
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
. = ALIGN(0x4);
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*crtend.o(.ctors))
. = ALIGN(4);
KEEP(*(.fini))
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*crtend.o(.dtors))
. = ALIGN(4);
_efixed = .; /* End of text section */
} > rom
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > rom
PROVIDE_HIDDEN (__exidx_end = .);
/* exception handling */
. = ALIGN(4);
.eh_frame :
{
KEEP (*(.eh_frame))
} > rom
. = ALIGN(4);
_etext = .;
.relocate : AT (_etext)
{
. = ALIGN(4);
_srelocate = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_erelocate = .;
} > ram
/* .bss section which is used for uninitialized data */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = . ;
_szero = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
_ezero = .;
} > ram
/* stack section */
.stack (NOLOAD):
{
. = ALIGN(8);
_sstack = .;
. = . + STACK_SIZE;
. = ALIGN(8);
_estack = .;
} > ram
/* heap section */
. = ALIGN(4);
_sheap = . ;
_eheap = ORIGIN(ram) + LENGTH(ram);
/* Populate information abour ram size */
_sram = ORIGIN(ram);
_eram = ORIGIN(ram) + LENGTH(ram);
.flashcca :
{
KEEP(*(.flashcca))
} > cca
}

11
cpu/cc2538/ldscripts/cc2538nf11.ld

@ -25,6 +25,15 @@ MEMORY
ram (rwx) : ORIGIN = 0x20004000, LENGTH = 16K
}
INCLUDE cc2538.ld
/* MCU Specific Section Definitions */
SECTIONS
{
.flashcca :
{
KEEP(*(.flashcca))
} > cca
}
INCLUDE cortexm_base.ld
/* @} */

11
cpu/cc2538/ldscripts/cc2538nf23.ld

@ -26,6 +26,15 @@ MEMORY
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cc2538.ld
/* MCU Specific Section Definitions */
SECTIONS
{
.flashcca :
{
KEEP(*(.flashcca))
} > cca
}
INCLUDE cortexm_base.ld
/* @} */

11
cpu/cc2538/ldscripts/cc2538nf53.ld

@ -26,6 +26,15 @@ MEMORY
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cc2538.ld
/* MCU Specific Section Definitions */
SECTIONS
{
.flashcca :
{
KEEP(*(.flashcca))
} > cca
}
INCLUDE cortexm_base.ld
/* @} */

11
cpu/cc2538/ldscripts/cc2538sf53.ld

@ -24,6 +24,15 @@ MEMORY
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cc2538.ld
/* MCU Specific Section Definitions */
SECTIONS
{
.flashcca :
{
KEEP(*(.flashcca))
} > cca
}
INCLUDE cortexm_base.ld
/* @} */

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