cpu/stm32l1: adapted UART driver

cpu/stm32l1/periph/uart.c

@@ -21,68 +21,44 @@
 #include "cpu.h"
 #include "sched.h"
 #include "thread.h"
-#include "periph_conf.h"
 #include "periph/uart.h"
 #include "periph/gpio.h"
 
-/* guard file in case no UART device was specified */
-#if UART_NUMOF
-
-/**
- * @brief Each UART device has to store two callbacks.
- */
-typedef struct {
-    uart_rx_cb_t rx_cb;
-    uart_tx_cb_t tx_cb;
-    void *arg;
-} uart_conf_t;
-
-/**
- * @brief Unified interrupt handler for all UART devices
- *
- * @param uartnum       the number of the UART that triggered the ISR
- * @param uart          the UART device that triggered the ISR
- */
-static inline void irq_handler(uart_t uartnum, USART_TypeDef *uart);
-
 /**
  * @brief Allocate memory to store the callback functions.
  */
-static uart_conf_t uart_config[UART_NUMOF];
+static uart_isr_ctx_t uart_config[UART_NUMOF];
+
+static int init_base(uart_t uart, uint32_t baudrate);
 
-int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t tx_cb, void *arg)
+int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
 {
     /* do basic initialization */
-    int res = uart_init_blocking(uart, baudrate);
+    int res = init_base(uart, baudrate);
     if (res < 0) {
         return res;
     }
 
     /* remember callback addresses */
     uart_config[uart].rx_cb = rx_cb;
-    uart_config[uart].tx_cb = tx_cb;
     uart_config[uart].arg = arg;
 
-
     /* enable receive interrupt */
     switch (uart) {
 #if UART_0_EN
         case UART_0:
-            NVIC_SetPriority(UART_0_IRQ, UART_IRQ_PRIO);
             NVIC_EnableIRQ(UART_0_IRQ);
             UART_0_DEV->CR1 |= USART_CR1_RXNEIE;
             break;
 #endif
 #if UART_1_EN
         case UART_1:
-            NVIC_SetPriority(UART_1_IRQ, UART_IRQ_PRIO);
             NVIC_EnableIRQ(UART_1_IRQ);
             UART_1_DEV->CR1 |= USART_CR1_RXNEIE;
             break;
 #endif
 #if UART_2_EN
         case UART_2:
-            NVIC_SetPriority(UART_2_IRQ, UART_IRQ_PRIO);
             NVIC_EnableIRQ(UART_2_IRQ);
             UART_2_DEV->CR1 |= USART_CR1_RXNEIE;
             break;
@@ -92,7 +68,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t t
     return 0;
 }
 
-int uart_init_blocking(uart_t uart, uint32_t baudrate)
+static int init_base(uart_t uart, uint32_t baudrate)
 {
     USART_TypeDef *dev = 0;
     gpio_t tx_pin = 0;
@@ -157,29 +133,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
     return 0;
 }
 
-
-void uart_tx_begin(uart_t uart)
-{
-    switch (uart) {
-#if UART_0_EN
-        case UART_0:
-            UART_0_DEV->CR1 |= USART_CR1_TXEIE;
-            break;
-#endif
-#if UART_1_EN
-        case UART_1:
-            UART_1_DEV->CR1 |= USART_CR1_TXEIE;
-            break;
-#endif
-#if UART_2_EN
-        case UART_2:
-            UART_2_DEV->CR1 |= USART_CR1_TXEIE;
-            break;
-#endif
-    }
-}
-
-int uart_write(uart_t uart, char data)
+void uart_write(uart_t uart, const uint8_t *data, size_t len)
 {
     USART_TypeDef *dev = 0;
 
@@ -200,70 +154,24 @@ int uart_write(uart_t uart, char data)
             break;
 #endif
         default:
-            return -1;
+            return;
     }
 
-    if (dev->SR & USART_SR_TXE) {
-        dev->DR = (uint8_t)data;
+    for (size_t i = 0; i < len; i++) {
+        while (!(dev->SR & USART_SR_TXE));
+        dev->DR = data[i];
     }
-
-    return 0;
 }
 
-int uart_read_blocking(uart_t uart, char *data)
+static inline void irq_handler(uint8_t uartnum, USART_TypeDef *dev)
 {
-    USART_TypeDef *dev = 0;
-
-    switch (uart) {
-#if UART_0_EN
-        case UART_0:
-            dev = UART_0_DEV;
-            break;
-#endif
-#if UART_1_EN
-        case UART_1:
-            dev = UART_1_DEV;
-            break;
-#endif
-#if UART_2_EN
-        case UART_2:
-            dev = UART_2_DEV;
-            break;
-#endif
+    if (dev->SR & USART_SR_RXNE) {
+        char data = (char)dev->DR;
+        uart_config[uartnum].rx_cb(uart_config[uartnum].arg, data);
     }
-
-    while (!(dev->SR & USART_SR_RXNE));
-    *data = (char)dev->DR;
-
-    return 1;
-}
-
-int uart_write_blocking(uart_t uart, char data)
-{
-    USART_TypeDef *dev = 0;
-
-    switch (uart) {
-#if UART_0_EN
-        case UART_0:
-            dev = UART_0_DEV;
-            break;
-#endif
-#if UART_1_EN
-        case UART_1:
-            dev = UART_1_DEV;
-            break;
-#endif
-#if UART_2_EN
-        case UART_2:
-            dev = UART_2_DEV;
-            break;
-#endif
+    if (sched_context_switch_request) {
+        thread_yield();
     }
-
-    while (!(dev->SR & USART_SR_TXE));
-    dev->DR = (uint8_t)data;
-
-    return 1;
 }
 
 #if UART_0_EN
@@ -286,21 +194,3 @@ void UART_2_ISR(void)
     irq_handler(UART_2, UART_2_DEV);
 }
 #endif
-
-static inline void irq_handler(uint8_t uartnum, USART_TypeDef *dev)
-{
-    if (dev->SR & USART_SR_RXNE) {
-        char data = (char)dev->DR;
-        uart_config[uartnum].rx_cb(uart_config[uartnum].arg, data);
-    }
-    else if (dev->SR & USART_SR_TXE) {
-        if (uart_config[uartnum].tx_cb(uart_config[uartnum].arg) == 0) {
-            dev->CR1 &= ~(USART_CR1_TXEIE);
-        }
-    }
-    if (sched_context_switch_request) {
-        thread_yield();
-    }
-}
-
-#endif /* UART_NUMOF */