
36 changed files with 307 additions and 24 deletions
@ -0,0 +1,3 @@
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MODULE = board
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include $(RIOTBASE)/Makefile.base |
@ -0,0 +1,3 @@
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ifneq (,$(filter saul_default,$(USEMODULE))) |
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USEMODULE += saul_gpio
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endif |
@ -0,0 +1,11 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Various common features of Nucleo boards
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FEATURES_PROVIDED += cpp
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m0_1
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@ -0,0 +1,13 @@
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## the cpu to build for
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export CPU = stm32f0
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export CPU_MODEL = stm32f042k6
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# define the default port depending on the host OS
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PORT_LINUX ?= /dev/ttyACM0
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
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# setup serial terminal
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include $(RIOTBOARD)/Makefile.include.serial |
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# this board uses openocd
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include $(RIOTBOARD)/Makefile.include.openocd |
@ -0,0 +1,31 @@
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/*
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* Copyright (C) 2016 OTA keys |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_nucleo-f042 |
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* @{ |
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* |
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* @file |
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* @brief Board specific implementations for the nucleo-f042 board |
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* |
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* @author Vincent Dupont <vincent@otakeys.com> |
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* |
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* @} |
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*/ |
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#include "board.h" |
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#include "periph/gpio.h" |
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void board_init(void) |
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{ |
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/* initialize the CPU */ |
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cpu_init(); |
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/* initialize the boards LEDs */ |
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gpio_init(LED0_PIN, GPIO_OUT); |
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} |
@ -0,0 +1 @@
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source [find board/st_nucleo_f0.cfg] |
@ -0,0 +1,46 @@
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/*
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* Copyright (C) 2016 OTA keys |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @defgroup boards_nucleo-f042 Nucleo-F042 |
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* @ingroup boards |
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* @brief Board specific files for the nucleo-f042 board |
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* @{ |
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* |
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* @file |
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* @brief Board specific definitions for the nucleo-f042 board |
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* |
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* @author Vincent Dupont <vincent@otakeys.com> |
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*/ |
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#ifndef BOARD_H_ |
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#define BOARD_H_ |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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#define LED0_PIN GPIO_PIN(PORT_B, 3) |
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#define LED0_MASK (1 << 3) |
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#define LED0_ON (GPIOB->BSRR = LED0_MASK) |
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#define LED0_OFF (GPIOB->BRR = LED0_MASK) |
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#define LED0_TOGGLE (GPIOB->ODR ^= LED0_MASK) |
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO |
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*/ |
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void board_init(void); |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* BOARD_H_ */ |
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/** @} */ |
@ -0,0 +1,46 @@
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/*
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* Copyright (C) OTA keys 2016 |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_nucleo-f042 |
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* @{ |
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* |
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* @file |
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* @brief Board specific configuration of direct mapped GPIOs |
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* |
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* @author Vincent Dupont <vincent@otakeys.com> |
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*/ |
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#ifndef GPIO_PARAMS_H |
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#define GPIO_PARAMS_H |
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#include "board.h" |
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#include "saul/periph.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @brief GPIO pin configuration |
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*/ |
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static const saul_gpio_params_t saul_gpio_params[] = |
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{ |
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{ |
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.name = "LED(green)", |
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.pin = LED0_PIN, |
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.mode = GPIO_OUT |
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}, |
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}; |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* GPIO_PARAMS_H */ |
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/** @} */ |
@ -0,0 +1,115 @@
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/*
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* Copyright (C) 2016 OTA keys |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_nucleo-f042 |
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* @{ |
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* |
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* @file |
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* @brief Peripheral MCU configuration for the nucleo-f042 board |
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* |
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* @author Vincent Dupont <vincent@otakeys.com> |
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*/ |
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#ifndef PERIPH_CONF_H_ |
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#define PERIPH_CONF_H_ |
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#include "periph_cpu.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @name Clock system configuration |
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* @{ |
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*/ |
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#define CLOCK_HSI (8000000U) /* internal oscillator */ |
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#define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */ |
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/* the actual PLL values are automatically generated */ |
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#define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSI) |
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/* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */ |
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#define CLOCK_AHB (CLOCK_CORECLOCK / 1) |
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#define CLOCK_APB1 (CLOCK_CORECLOCK / 1) |
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#define CLOCK_APB2 (CLOCK_CORECLOCK / 1) |
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/** @} */ |
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/**
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* @brief Timer configuration |
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* @{ |
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*/ |
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static const timer_conf_t timer_config[] = { |
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{ |
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.dev = TIM2, |
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.max = 0xffffffff, |
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.rcc_mask = RCC_APB1ENR_TIM2EN, |
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.bus = APB1, |
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.irqn = TIM2_IRQn |
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} |
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}; |
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#define TIMER_0_ISR isr_tim2 |
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#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0])) |
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/** @} */ |
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/**
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* @brief UART configuration |
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* @{ |
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*/ |
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static const uart_conf_t uart_config[] = { |
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{ |
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.dev = USART2, |
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.rcc_mask = RCC_APB1ENR_USART2EN, |
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.rx_pin = GPIO_PIN(PORT_A, 15), |
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.tx_pin = GPIO_PIN(PORT_A, 2), |
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.rx_af = GPIO_AF1, |
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.tx_af = GPIO_AF1, |
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.bus = APB1, |
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.irqn = USART2_IRQn |
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}, |
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}; |
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#define UART_0_ISR (isr_usart2) |
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) |
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/** @} */ |
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/**
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* @name RTC configuration |
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* @{ |
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*/ |
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/**
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* Nucleo-f042 does not have any LSE, current RTC driver does not support LSI as |
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* clock source, so disabling RTC. |
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*/ |
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#define RTC_NUMOF (0U) |
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/** @} */ |
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/**
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* @brief ADC configuration |
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* @{ |
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*/ |
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#define ADC_NUMOF (0) |
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/** @} */ |
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/**
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* @brief DAC configuration |
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* @{ |
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*/ |
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#define DAC_NUMOF (0) |
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/** @} */ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* PERIPH_CONF_H_ */ |
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/** @} */ |
@ -1,6 +1,6 @@
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APPLICATION = mutex_order
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include ../Makefile.tests_common |
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BOARD_INSUFFICIENT_MEMORY := stm32f0discovery weio nucleo-f030
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BOARD_INSUFFICIENT_MEMORY := stm32f0discovery weio nucleo-f030 nucleo-f042
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include $(RIOTBASE)/Makefile.include |
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@ -1,6 +1,8 @@
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APPLICATION = xtimer_drift
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include ../Makefile.tests_common |
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BOARD_INSUFFICIENT_MEMORY := nucleo-f042
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USEMODULE += xtimer
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include $(RIOTBASE)/Makefile.include |
||||
|
Loading…
Reference in new issue