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boards: add support of stm32f769 discovery board

master
Vincent Dupont 6 years ago
parent
commit
1c637da74d
  1. 3
      boards/stm32f7discovery/Makefile
  2. 3
      boards/stm32f7discovery/Makefile.dep
  3. 14
      boards/stm32f7discovery/Makefile.features
  4. 13
      boards/stm32f7discovery/Makefile.include
  5. 36
      boards/stm32f7discovery/board.c
  6. 5
      boards/stm32f7discovery/dist/openocd.cfg
  7. 81
      boards/stm32f7discovery/include/board.h
  8. 66
      boards/stm32f7discovery/include/gpio_params.h
  9. 122
      boards/stm32f7discovery/include/periph_conf.h

3
boards/stm32f7discovery/Makefile

@ -0,0 +1,3 @@
MODULE = board
include $(RIOTBASE)/Makefile.base

3
boards/stm32f7discovery/Makefile.dep

@ -0,0 +1,3 @@
ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += saul_gpio
endif

14
boards/stm32f7discovery/Makefile.features

@ -0,0 +1,14 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_hwrng
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# Various other features (if any)
#FEATURES_PROVIDED += cpp
#FEATURES_PROVIDED += arduino
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = cortex_m7

13
boards/stm32f7discovery/Makefile.include

@ -0,0 +1,13 @@
# define the cpu used by the stm32f769-discovery board
export CPU = stm32f7
export CPU_MODEL = stm32f769ni
# set default port depending on operating system
PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))
# setup serial terminal
include $(RIOTMAKE)/tools/serial.inc.mk
# this board uses openocd
include $(RIOTMAKE)/tools/openocd.inc.mk

36
boards/stm32f7discovery/board.c

@ -0,0 +1,36 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup boards_stm32f7discovery
* @{
*
* @file
* @brief Board specific implementations for the STM32F7Discovery evaluation board
*
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
#include "board.h"
#include "periph/gpio.h"
#include <stdio.h>
void board_init(void)
{
/* initialize the CPU */
cpu_init();
/* initialize the boards LEDs */
gpio_init(LED0_PIN, GPIO_OUT);
gpio_init(LED1_PIN, GPIO_OUT);
gpio_init(LED2_PIN, GPIO_OUT);
gpio_init(LED3_PIN, GPIO_OUT);
}

5
boards/stm32f7discovery/dist/openocd.cfg vendored

@ -0,0 +1,5 @@
source [find interface/stlink-v2-1.cfg]
transport select hla_swd
source [find target/stm32f7x.cfg]

81
boards/stm32f7discovery/include/board.h

@ -0,0 +1,81 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_stm32f7discovery stm32f769 Discovery board
* @ingroup boards
* @brief Board specific files for the stm32f769 Discovery board
* @{
*
* @file
* @brief Board specific definitions for the stm32f769 Discovery board
*
* @author Vincent Dupont <vincent@otakeys.com>
*/
#ifndef BOARD_H
#define BOARD_H
#include "cpu.h"
#include "periph_conf.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Macros for controlling the on-board LEDs.
* @{
*/
#define LED0_PIN GPIO_PIN(PORT_J, 13)
#define LED1_PIN GPIO_PIN(PORT_J, 5)
#define LED2_PIN GPIO_PIN(PORT_A, 12)
#define LED3_PIN GPIO_PIN(PORT_D, 4)
#define LED0_PORT GPIOJ
#define LED1_PORT GPIOJ
#define LED2_PORT GPIOA
#define LED3_PORT GPIOD
#define LED0_MASK (1 << 13)
#define LED1_MASK (1 << 5)
#define LED2_MASK (1 << 12)
#define LED3_MASK (1 << 4)
#define LED0_ON (LED0_PORT->BSRR = LED0_MASK)
#define LED0_OFF (LED0_PORT->BSRR = (LED0_MASK << 16))
#define LED0_TOGGLE (LED0_PORT->ODR ^= LED0_MASK)
#define LED1_ON (LED1_PORT->BSRR = LED1_MASK)
#define LED1_OFF (LED1_PORT->BSRR = (LED1_MASK << 16))
#define LED1_TOGGLE (LED1_PORT->ODR ^= LED1_MASK)
#define LED2_ON (LED2_PORT->BSRR = LED2_MASK)
#define LED2_OFF (LED2_PORT->BSRR = (LED2_MASK << 16))
#define LED2_TOGGLE (LED2_PORT->ODR ^= LED2_MASK)
#define LED3_ON (LED3_PORT->BSRR = LED3_MASK)
#define LED3_OFF (LED3_PORT->BSRR = (LED3_MASK << 16))
#define LED3_TOGGLE (LED3_PORT->ODR ^= LED3_MASK)
/** @} */
/**
* @brief User button
*/
#define BTN_B1_PIN GPIO_PIN(PORT_A, 0)
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H */
/** @} */

66
boards/stm32f7discovery/include/gpio_params.h

@ -0,0 +1,66 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_stm32f7discovery
* @{
*
* @file
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Vincent Dupont <vincent@otakeys.com>
*/
#ifndef GPIO_PARAMS_H
#define GPIO_PARAMS_H
#include "board.h"
#include "saul/periph.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GPIO pin configuration
*/
static const saul_gpio_params_t saul_gpio_params[] =
{
{
.name = "LD1",
.pin = LED0_PIN,
.mode = GPIO_OUT
},
{
.name = "LD2",
.pin = LED1_PIN,
.mode = GPIO_OUT
},
{
.name = "LD3",
.pin = LED2_PIN,
.mode = GPIO_OUT
},
{
.name = "LD4",
.pin = LED3_PIN,
.mode = GPIO_OUT
},
{
.name = "BTN USER",
.pin = BTN_B1_PIN,
.mode = GPIO_IN
},
};
#ifdef __cplusplus
}
#endif
#endif /* GPIO_PARAMS_H */
/** @} */

122
boards/stm32f7discovery/include/periph_conf.h

@ -0,0 +1,122 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_stm32f7discovery
* @{
*
* @file
* @brief Peripheral MCU configuration for the stm32f769discovery6 board
*
* @author Vincent Dupont <vincent@otakeys.com>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Clock system configuration
* @{
*/
/* 0: no external high speed crystal available
* else: actual crystal frequency [in Hz] */
#define CLOCK_HSE (25000000U)
/* 0: no external low speed crystal available,
* 1: external crystal available (always 32.768kHz) */
#define CLOCK_LSE (1)
/* give the target core clock (HCLK) frequency [in Hz],
* maximum: 216MHz, min: 96MHz, must be multiple of 48MHz */
#define CLOCK_CORECLOCK (216000000U)
/* peripheral clock setup */
#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 /* min 25MHz */
#define CLOCK_AHB (CLOCK_CORECLOCK / 1)
#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4 /* max 54MHz */
#define CLOCK_APB1 (CLOCK_CORECLOCK / 4)
#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2 /* max 108MHz */
#define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
/** @} */
/**
* @name Timer configuration
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn,
#ifdef UART_USE_DMA
.dma_stream = 4,
.dma_chan = 4
#endif
}
};
#define UART_0_ISR (isr_usart1)
#define UART_0_DMA_ISR (isr_dma1_stream4)
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @name ADC configuration
* @{
*/
#define ADC_NUMOF (0)
/** @} */
/**
* @name DAC configuration
* @{
*/
#define DAC_NUMOF (0)
/** @} */
/**
* @name RTC configuration
* @{
*/
#define RTC_NUMOF (1)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H */
/** @} */
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