parent
62139bd0d2
commit
2362623490
|
@ -3,7 +3,7 @@
|
|||
MODULE = $(BOARD)_base
|
||||
|
||||
# add a list of board specific subdirectories that should also be build
|
||||
DIRS =
|
||||
DIRS =
|
||||
|
||||
.PHONY: all clean
|
||||
|
||||
|
|
Binary file not shown.
|
@ -3,7 +3,7 @@
|
|||
MODULE = $(BOARD)_base
|
||||
|
||||
# add a list of board specific subdirectories that should also be build
|
||||
DIRS =
|
||||
DIRS =
|
||||
|
||||
.PHONY: all clean
|
||||
|
||||
|
|
|
@ -217,7 +217,7 @@ void cc2420_spi_init(void)
|
|||
* - MCU pin (GPIO port) initialisation is done in board.c,
|
||||
* function z1_ports_init().
|
||||
*/
|
||||
|
||||
|
||||
/* Keep peripheral in reset state during configuration */
|
||||
UCB0CTL1 = UCSWRST;
|
||||
|
||||
|
@ -228,7 +228,7 @@ void cc2420_spi_init(void)
|
|||
|
||||
UCB0CTL0 |= UCCKPH; /* Data captured on rising edge, changed on falling */
|
||||
UCB0CTL0 &= ~UCCKPL; /* SPI data lines are active-high/inactive-low */
|
||||
|
||||
|
||||
/* Ignore clockrate argument for now, just use clock source/2 */
|
||||
UCB0BR0 = 0x02; /* Ensure baud rate <= SMCLK/2 */
|
||||
UCB0BR1 = 0x00;
|
||||
|
|
|
@ -21,8 +21,8 @@
|
|||
|
||||
/**
|
||||
* @brief Define mappings between arch and internal interfaces
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
* new platforms should always use the *_arch_* interfaces.
|
||||
* @{
|
||||
*/
|
||||
|
|
|
@ -9,7 +9,7 @@
|
|||
/**
|
||||
* @ingroup core_arch
|
||||
* @{
|
||||
*
|
||||
*
|
||||
* @file hwtimer_arch.h
|
||||
* @brief The kernel's hardware timer abstraction interface
|
||||
*
|
||||
|
@ -27,7 +27,7 @@
|
|||
|
||||
/**
|
||||
* @brief Initialize architecture dependent kernel timer support
|
||||
*
|
||||
*
|
||||
* @brief[in] handler callback that is called when timer offset is reached
|
||||
* @brief[in] fcpu the core CPU-frequency for tick interval calculation
|
||||
*/
|
||||
|
@ -54,14 +54,14 @@ void hwtimer_arch_set(unsigned long offset, short timer);
|
|||
|
||||
/**
|
||||
* @brief Unset the kernel timer with the given timer ID
|
||||
*
|
||||
*
|
||||
* @param[in] timer the channel to unset
|
||||
*/
|
||||
void hwtimer_arch_unset(short timer);
|
||||
|
||||
/**
|
||||
* @brief Get the current tick count of the default hardware timer
|
||||
*
|
||||
*
|
||||
* @return the current value of the hwtimer
|
||||
*/
|
||||
unsigned long hwtimer_arch_now(void);
|
||||
|
|
|
@ -21,8 +21,8 @@
|
|||
|
||||
/**
|
||||
* @brief Define mapping between kernel internal and arch interfaces
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
* new platforms should always use the *_arch_* interfaces.
|
||||
* @{
|
||||
*/
|
||||
|
@ -39,7 +39,7 @@
|
|||
*
|
||||
* @param[in] data the data that is to be written
|
||||
* @param[in] count the number of bytes to write
|
||||
*
|
||||
*
|
||||
* @return the number of bytes that were actually written
|
||||
*/
|
||||
int io_arch_puts(char *data, int count);
|
||||
|
|
|
@ -24,8 +24,8 @@
|
|||
|
||||
/**
|
||||
* @name Define mapping between kernel internal and arch interfaces
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
* new platforms should always use the *_arch_* interfaces.
|
||||
* @{
|
||||
*/
|
||||
|
@ -39,7 +39,7 @@
|
|||
|
||||
/**
|
||||
* @brief Globally enable maskable interrupt sources
|
||||
*
|
||||
*
|
||||
* @return the IRQ state after enabling interrupts
|
||||
*/
|
||||
unsigned int irq_arch_eneable(void);
|
||||
|
|
|
@ -25,8 +25,8 @@
|
|||
/**
|
||||
* @brief Define the mapping between the architecture independent interfaces
|
||||
and the kernel internal interfaces
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
* new platforms should always use the *_arch_* interfaces.
|
||||
* @{
|
||||
*/
|
||||
|
|
|
@ -23,8 +23,8 @@
|
|||
/**
|
||||
* @name Define the mapping between the architecture independent interfaces
|
||||
* and the kernel internal interfaces
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
*
|
||||
* This mapping is done for compatibility of existing platforms,
|
||||
* new platforms should always use the *_arch_* interfaces.
|
||||
* @{
|
||||
*/
|
||||
|
|
|
@ -49,7 +49,7 @@ void clist_remove(clist_node_t **list, clist_node_t *node);
|
|||
|
||||
/**
|
||||
* @brief Advances the circle list.
|
||||
*
|
||||
*
|
||||
* The result of this function is will be a list with
|
||||
* nodes shifted by one. So second list entry will be
|
||||
* first, first is last.
|
||||
|
|
|
@ -40,7 +40,7 @@
|
|||
#endif
|
||||
|
||||
/**
|
||||
* @brief Triggers the scheduler to schedule the next thread
|
||||
* @brief Triggers the scheduler to schedule the next thread
|
||||
*/
|
||||
void sched_run(void);
|
||||
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
|
||||
#include "sched.h"
|
||||
#include "kernel.h"
|
||||
#include "kernel_internal.h"
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -47,15 +47,15 @@
|
|||
|
||||
/** \defgroup CMSIS_MISRA_Exceptions CMSIS MISRA-C:2004 Compliance Exceptions
|
||||
CMSIS violates following MISRA-C2004 Rules:
|
||||
|
||||
|
||||
- Violates MISRA 2004 Required Rule 8.5, object/function definition in header file.<br>
|
||||
Function definitions in header files are used to allow 'inlining'.
|
||||
Function definitions in header files are used to allow 'inlining'.
|
||||
|
||||
- Violates MISRA 2004 Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
|
||||
Unions are used for effective representation of core registers.
|
||||
|
||||
|
||||
- Violates MISRA 2004 Advisory Rule 19.7, Function-like macro defined.<br>
|
||||
Function-like macros are used to allow more efficient code.
|
||||
Function-like macros are used to allow more efficient code.
|
||||
|
||||
*/
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -8,9 +8,9 @@
|
|||
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||
* processor based microcontrollers. This file can be freely distributed
|
||||
* within development tools that are supporting such ARM based processors.
|
||||
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||
* processor based microcontrollers. This file can be freely distributed
|
||||
* within development tools that are supporting such ARM based processors.
|
||||
*
|
||||
* @par
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
|
@ -26,7 +26,7 @@
|
|||
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
@ -182,7 +182,7 @@ static __INLINE void __set_PRIMASK(uint32_t priMask)
|
|||
register uint32_t __regPriMask __ASM("primask");
|
||||
__regPriMask = (priMask);
|
||||
}
|
||||
|
||||
|
||||
|
||||
#if (__CORTEX_M >= 0x03)
|
||||
|
||||
|
@ -226,7 +226,7 @@ static __INLINE void __set_BASEPRI(uint32_t basePri)
|
|||
register uint32_t __regBasePri __ASM("basepri");
|
||||
__regBasePri = (basePri & 0xff);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/** \brief Get Fault Mask
|
||||
|
||||
|
@ -407,7 +407,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void)
|
|||
__ASM volatile ("MRS %0, psp\n" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/** \brief Set Process Stack Pointer
|
||||
|
||||
|
@ -434,7 +434,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void)
|
|||
__ASM volatile ("MRS %0, msp\n" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/** \brief Set Main Stack Pointer
|
||||
|
||||
|
@ -473,7 +473,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t p
|
|||
{
|
||||
__ASM volatile ("MSR primask, %0" : : "r" (priMask) );
|
||||
}
|
||||
|
||||
|
||||
|
||||
#if (__CORTEX_M >= 0x03)
|
||||
|
||||
|
@ -508,7 +508,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -535,7 +535,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t v
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
||||
return(result);
|
||||
}
|
||||
|
|
|
@ -8,9 +8,9 @@
|
|||
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
|
||||
*
|
||||
* @par
|
||||
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||
* processor based microcontrollers. This file can be freely distributed
|
||||
* within development tools that are supporting such ARM based processors.
|
||||
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
||||
* processor based microcontrollers. This file can be freely distributed
|
||||
* within development tools that are supporting such ARM based processors.
|
||||
*
|
||||
* @par
|
||||
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
|
||||
|
@ -71,8 +71,8 @@
|
|||
|
||||
/** \brief Instruction Synchronization Barrier
|
||||
|
||||
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or
|
||||
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or
|
||||
memory, after the instruction has been completed.
|
||||
*/
|
||||
#define __ISB() __isb(0xF)
|
||||
|
@ -80,7 +80,7 @@
|
|||
|
||||
/** \brief Data Synchronization Barrier
|
||||
|
||||
This function acts as a special kind of Data Memory Barrier.
|
||||
This function acts as a special kind of Data Memory Barrier.
|
||||
It completes when all explicit memory accesses before this instruction complete.
|
||||
*/
|
||||
#define __DSB() __dsb(0xF)
|
||||
|
@ -88,7 +88,7 @@
|
|||
|
||||
/** \brief Data Memory Barrier
|
||||
|
||||
This function ensures the apparent order of the explicit memory operations before
|
||||
This function ensures the apparent order of the explicit memory operations before
|
||||
and after the instruction, without ensuring their completion.
|
||||
*/
|
||||
#define __DMB() __dmb(0xF)
|
||||
|
@ -247,7 +247,7 @@ static __INLINE __ASM int32_t __REVSH(int32_t value)
|
|||
\param [in] value Value to count the leading zeros
|
||||
\return number of leading zeros in value
|
||||
*/
|
||||
#define __CLZ __clz
|
||||
#define __CLZ __clz
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */
|
||||
|
||||
|
@ -306,8 +306,8 @@ __attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
|
|||
|
||||
/** \brief Instruction Synchronization Barrier
|
||||
|
||||
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or
|
||||
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or
|
||||
memory, after the instruction has been completed.
|
||||
*/
|
||||
__attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
|
||||
|
@ -318,7 +318,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
|
|||
|
||||
/** \brief Data Synchronization Barrier
|
||||
|
||||
This function acts as a special kind of Data Memory Barrier.
|
||||
This function acts as a special kind of Data Memory Barrier.
|
||||
It completes when all explicit memory accesses before this instruction complete.
|
||||
*/
|
||||
__attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
|
||||
|
@ -329,7 +329,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
|
|||
|
||||
/** \brief Data Memory Barrier
|
||||
|
||||
This function ensures the apparent order of the explicit memory operations before
|
||||
This function ensures the apparent order of the explicit memory operations before
|
||||
and after the instruction, without ensuring their completion.
|
||||
*/
|
||||
__attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
|
||||
|
@ -348,7 +348,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -364,7 +364,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -380,7 +380,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t val
|
|||
__attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -398,7 +398,7 @@ __attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -414,7 +414,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t valu
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr)
|
||||
{
|
||||
uint8_t result;
|
||||
|
||||
|
||||
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -430,7 +430,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uin
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr)
|
||||
{
|
||||
uint16_t result;
|
||||
|
||||
|
||||
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -446,7 +446,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile ui
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -464,7 +464,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile ui
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -482,7 +482,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t val
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -500,7 +500,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t va
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
|
||||
{
|
||||
uint32_t result;
|
||||
|
||||
|
||||
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
@ -559,7 +559,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
|
|||
__attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
|
||||
{
|
||||
uint8_t result;
|
||||
|
||||
|
||||
__ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
|
||||
return(result);
|
||||
}
|
||||
|
|
|
@ -9,12 +9,12 @@
|
|||
/**
|
||||
* @ingroup driver_periph
|
||||
* @{
|
||||
*
|
||||
*
|
||||
* @file gpio.c
|
||||
* @brief Low-level GPIO driver implementation
|
||||
*
|
||||
* @author Hauke Petersen <mail@haukepetersen.de>
|
||||
*
|
||||
*
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
|
|
@ -9,12 +9,12 @@
|
|||
/**
|
||||
* @ingroup driver_periph
|
||||
* @{
|
||||
*
|
||||
*
|
||||
* @file timer.c
|
||||
* @brief Low-level timer driver implementation for the SAM3X8E CPU
|
||||
*
|
||||
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
||||
*
|
||||
*
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
@ -40,10 +40,10 @@ timer_conf_t config[TIMER_NUMOF];
|
|||
|
||||
/**
|
||||
* @brief Setup the given timer
|
||||
*
|
||||
*
|
||||
* The SAM3X8E has 3 timers. Each timer has 3 independent channels.
|
||||
* RIOT uses the timers in WAVE mode with the following clock chaining:
|
||||
*
|
||||
*
|
||||
* ---------- ----------
|
||||
* | | | |-> IRQ-compareA
|
||||
* | TCx[2] | ---- TIOA2 --->| TCx[0] |-> IRQ-compareB
|
||||
|
@ -107,11 +107,11 @@ int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int))
|
|||
* - reload on TC_CV == TC_RC
|
||||
* - let TIOA2 signal be toggled when TC_CV == TC_RC
|
||||
*/
|
||||
tim->TC_CHANNEL[2].TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_WAVE
|
||||
tim->TC_CHANNEL[2].TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 | TC_CMR_WAVE
|
||||
| TC_CMR_WAVSEL_UP_RC | TC_CMR_ACPC_TOGGLE;
|
||||
|
||||
/* configure the frequency of channel 2 to 1us * ticks_per_us
|
||||
*
|
||||
*
|
||||
* note: as channels 0 and 1 are only incremented on rising edges of TIOA2 line and
|
||||
* channel 2 toggles this line on each timer tick, the actual frequency driving ch0/1
|
||||
* is f_ch2 / 2 --> f_ch0/1 = (MCK / 2 / 2 / 1000000) * ticks_per_us.
|
||||
|
@ -400,11 +400,11 @@ void TIMER_0_ISR1(void)
|
|||
if (status & TC_SR_CPAS) {
|
||||
TIMER_0_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPAS;
|
||||
config[TIMER_0].cb(0);
|
||||
}
|
||||
}
|
||||
else if (status & TC_SR_CPBS) {
|
||||
TIMER_0_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPBS;
|
||||
config[TIMER_0].cb(1);
|
||||
}
|
||||
}
|
||||
else if (status & TC_SR_CPCS) {
|
||||
TIMER_0_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPCS;
|
||||
config[TIMER_0].cb(2);
|
||||
|
@ -420,11 +420,11 @@ void TIMER_0_ISR2(void)
|
|||
if (status & TC_SR_CPAS) {
|
||||
TIMER_0_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPAS;
|
||||
config[TIMER_0].cb(3);
|
||||
}
|
||||
}
|
||||
else if (status & TC_SR_CPBS) {
|
||||
TIMER_0_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPBS;
|
||||
config[TIMER_0].cb(4);
|
||||
}
|
||||
}
|
||||
else if (status & TC_SR_CPCS) {
|
||||
TIMER_0_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPCS;
|
||||
config[TIMER_0].cb(5);
|
||||
|
@ -443,11 +443,11 @@ void TIMER_1_ISR1(void)
|
|||
if (status & TC_SR_CPAS) {
|
||||
TIMER_1_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPAS;
|
||||
config[TIMER_1].cb(0);
|
||||
}
|
||||
}
|
||||
if (status & TC_SR_CPBS) {
|
||||
TIMER_1_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPBS;
|
||||
config[TIMER_1].cb(1);
|
||||
}
|
||||
}
|
||||
if (status & TC_SR_CPCS) {
|
||||
TIMER_1_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPCS;
|
||||
config[TIMER_1].cb(2);
|
||||
|
@ -463,11 +463,11 @@ void TIMER_1_ISR2(void)
|
|||
if (status & TC_SR_CPAS) {
|
||||
TIMER_1_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPAS;
|
||||
config[TIMER_1].cb(3);
|
||||
}
|
||||
}
|
||||
if (status & TC_SR_CPBS) {
|
||||
TIMER_1_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPBS;
|
||||
config[TIMER_1].cb(4);
|
||||
}
|
||||
}
|
||||
if (status & TC_SR_CPCS) {
|
||||
TIMER_1_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPCS;
|
||||
config[TIMER_1].cb(5);
|
||||
|
@ -486,11 +486,11 @@ void TIMER_2_ISR1(void)
|
|||
if (status & TC_SR_CPAS) {
|
||||
TIMER_2_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPAS;
|
||||
config[TIMER_2].cb(0);
|
||||
}
|
||||
}
|
||||
else if (status & TC_SR_CPBS) {
|
||||
TIMER_2_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPBS;
|
||||
config[TIMER_2].cb(1);
|
||||
}
|
||||
}
|
||||
else if (status & TC_SR_CPCS) {
|
||||
TIMER_2_DEV->TC_CHANNEL[0].TC_IDR = TC_IDR_CPCS;
|
||||
config[TIMER_2].cb(2);
|
||||
|
@ -506,11 +506,11 @@ void TIMER_2_ISR2(void)
|
|||
if (status & TC_SR_CPAS) {
|
||||
TIMER_2_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPAS;
|
||||
config[TIMER_2].cb(3);
|
||||
}
|
||||
}
|
||||
else if (status & TC_SR_CPBS) {
|
||||
TIMER_2_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPBS;
|
||||
config[TIMER_2].cb(4);
|
||||
}
|
||||
}
|
||||
else if (status & TC_SR_CPCS) {
|
||||
TIMER_2_DEV->TC_CHANNEL[1].TC_IDR = TC_IDR_CPCS;
|
||||
config[TIMER_2].cb(5);
|
||||
|
|
|
@ -9,12 +9,12 @@
|
|||
/**
|
||||
* @ingroup driver_periph
|
||||
* @{
|
||||
*
|
||||
*
|
||||
* @file uart.c
|
||||
* @brief Low-level UART driver implementation
|
||||
*
|
||||
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
||||
*
|
||||
*
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -276,7 +276,7 @@ export PATH=$PATH:${PREFIX}/bin
|
|||
download() {
|
||||
echo
|
||||
echo "Downloading TAR files."
|
||||
|
||||
|
||||
download_file ftp://ftp.cs.tu-berlin.de/pub/gnu/binutils binutils-${BINUTILS_VER}.tar.bz2 ${BINUTILS_MD5} &&
|
||||
download_file ftp://ftp.cs.tu-berlin.de/pub/gnu/gcc/gcc-${GCC_VER} gcc-${GCC_VER}.tar.bz2 ${GCC_MD5} &&
|
||||
download_file ftp://ftp.cs.tu-berlin.de/pub/gnu/gdb gdb-${GDB_VER}.tar.bz2 ${GDB_MD5} &&
|
||||
|
|
|
@ -16,7 +16,7 @@ sudo usermod -a -G wireshark $USER
|
|||
|
||||
## Configuration
|
||||
Depending on what you want to send over the native TAP you might want to change
|
||||
the next header dissector. Currently we have included the dissectors for
|
||||
the next header dissector. Currently we have included the dissectors for
|
||||
IEEE 802.15.4 and 6LoWPAN into the script file, but anything is thinkable.
|
||||
Refer to the wireshark manual to get the protocol names, e.g.:
|
||||
|
||||
|
|
|
@ -13,7 +13,7 @@ do
|
|||
local f_dst = ProtoField.uint16("RIOT.dst", "Destination", base.DEC, nil)
|
||||
local f_src = ProtoField.uint16("RIOT.src", "Source", base.DEC, nil)
|
||||
local f_pad = ProtoField.bytes("RIOT.pad", "Padding")
|
||||
|
||||
|
||||
p_riot.fields = { f_length, f_dst, f_src }
|
||||
|
||||
local data_dis = Dissector.get("data")
|
||||
|
@ -23,7 +23,7 @@ do
|
|||
function riot_dissector(buf, pkt, root)
|
||||
local buf_len = buf:len()
|
||||
local riot_tree = root:add(p_riot, buf)
|
||||
|
||||
|
||||
if buf_len < 6 then return false end
|
||||
|
||||
local packet_len = buf(0,2):uint()
|
||||
|
@ -43,10 +43,10 @@ do
|
|||
riot_tree:add(f_dst, buf(2, 2))
|
||||
riot_tree:add(f_src, buf(4, 2))
|
||||
riot_tree:add(f_pad, buf(packet_len + 6))
|
||||
|
||||
|
||||
next_dis:call(buf(6, packet_len):tvb(), pkt, root)
|
||||
|
||||
return true
|
||||
return true
|
||||
end
|
||||
|
||||
function p_riot.dissector(buf, pkt, root)
|
||||
|
@ -58,6 +58,6 @@ do
|
|||
local eth_encap_table = DissectorTable.get("ethertype")
|
||||
|
||||
--handle ethernet type 0x1234
|
||||
|
||||
|
||||
eth_encap_table:add(0x1234, p_riot)
|
||||
end
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
/**
|
||||
* @brief Definition available ADC devices
|
||||
*
|
||||
*
|
||||
* Each ADC device is based on a hardware ADC which can have one or more
|
||||
* multiplexed channels.
|
||||
*/
|
||||
|
@ -46,7 +46,7 @@ typedef enum {
|
|||
|
||||
/**
|
||||
* @brief Initialization of a given ADC device
|
||||
*
|
||||
*
|
||||
* The ADC will be initialized in synchronous, blocking mode, so no callbacks for finished
|
||||
* conversions are required as conversions are presumed to be very fast (somewhere in the
|
||||
* range of some us).
|
||||
|
@ -61,9 +61,9 @@ int adc_init(adc_t dev, int precision);
|
|||
|
||||
/**
|
||||
* @brief Start a new conversion by using the given channel.
|
||||
*
|
||||
*
|
||||
* If a conversion on any channel on the given ADC core is in progress, it is aborted.
|
||||
*
|
||||
*
|
||||
* @param[in] dev the ADC device to use for the conversion
|
||||
* @param[in] channel the channel to convert from
|
||||
*
|
||||
|
@ -73,11 +73,11 @@ int adc_sample(adc_t dev, int channel);
|
|||
|
||||
/**
|
||||
* @brief Helper function to map a converted value to the given integer range.
|
||||
*
|
||||
*
|
||||
* This function is useful for converting sampled ADC values into their physical representation.
|
||||
*
|
||||
*
|
||||
* The min value is asserted to be smaller than the max value.
|
||||
*
|
||||
*
|
||||
* @param[in] dev the ADC device to read the precision value from (as input interval)
|
||||
* @param[in] value the value to map
|
||||
* @param[in] min the lower bound of the target interval
|
||||
|
@ -89,9 +89,9 @@ int adc_map(adc_t dev, int value, int min, int max);
|
|||
|
||||
/**
|
||||
* @brief Helper function to map a converted value to the given float range
|
||||
*
|
||||
*
|
||||
* @see adc_map
|
||||
*
|
||||
*
|
||||
* @param[in] dev the ADC device to read the precision value from (as input interval)
|
||||
* @param[in] value the value to map
|
||||
* @param[in] min the lower bound of the target interval
|
||||
|
|
|
@ -97,10 +97,10 @@ typedef enum {
|
|||
|
||||
/**
|
||||
* @brief Initialize GPIO pin as output pin
|
||||
*
|
||||
*
|
||||
* @param[in] dev the GPIO pin to set as output
|
||||
* @param[in] pullup define if pull resistors should be used
|
||||
*
|
||||
*
|
||||
* @return 0 on success
|
||||
* @return -1 on undefined device given
|
||||
* @return -2 on pull-up mode unavailable
|
||||
|
@ -109,10 +109,10 @@ int gpio_init_out(gpio_t dev, gpio_pp_t pullup);
|
|||
|
||||
/**
|
||||
* @brief Initialize a GPIO pin in input mode
|
||||
*
|
||||
*
|
||||
* @param[in] dev the GPIO pin to use as input
|
||||
* @param[in] pullup define if pull resistors should be used
|
||||
*
|
||||
*
|
||||
* @return 0 on success
|
||||
* @return -1 on undefined device given
|
||||
* @return -2 on pull-up mode unavailable
|
||||
|
@ -121,17 +121,17 @@ int gpio_init_in(gpio_t dev, gpio_pp_t pullup);
|
|||
|
||||
/**
|
||||
* @brief Initialize a GPIO pin for external interrupt usage
|
||||
*
|
||||
*
|
||||
* The registered callback function will be called in interrupt context every time the defined flank(s)
|
||||
* are detected.
|
||||
*
|
||||
*
|
||||
* The interrupt is activated automatically after the initialization.
|
||||
*
|
||||
*
|
||||
* @param[in] dev the GPIO pin to initialize
|
||||
* @param[in] pullup define if pull resistors should be enabled
|
||||
* @param[in] flank define the active flank(s)
|
||||
* @param[in] cb register the callback that is called in interrupt context
|
||||
*
|
||||
*
|
||||
* @return 0 on success
|
||||
* @return -1 on undefined device given
|
||||
* @return -2 on pull-up mode unavailable
|
||||
|
@ -141,10 +141,10 @@ int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, void (*cb)(v
|
|||
|
||||
/**
|
||||
* @brief Get the current value of the given GPIO pin
|
||||
*
|
||||
*
|
||||
* @param[in] dev the GPIO pin to read
|
||||
* @return the current value, 0 for LOW, != 0 for HIGH
|
||||
*
|
||||
*
|
||||
* @return 0 when pin is LOW
|
||||
* @return greater 0 for HIGH
|
||||
* @return -1 on undefined device given
|
||||
|
@ -153,9 +153,9 @@ int gpio_read(gpio_t dev);
|
|||
|
||||
/**
|
||||
* @brief Set the given GPIO pin to HIGH
|
||||
*
|
||||
*
|
||||
* @param[in] dev the GPIO pin to set
|
||||
*
|
||||
*
|
||||
* @return 0 on success
|
||||
* @return -1 on undefined device given
|
||||
*/
|
||||
|
@ -163,9 +163,9 @@ int gpio_set(gpio_t dev);
|
|||
|
||||
/**
|
||||
* @brief Set the given GPIO pin to LOW
|
||||
*
|
||||
*
|
||||
* @param[in] dev the GPIO pin to clear
|
||||
*
|
||||
*
|
||||
* @return 0 on success
|
||||
* @return -1 on undefined device given
|
||||
*/
|
||||
|
@ -173,9 +173,9 @@ int gpio_clear(gpio_t dev);
|
|||
|
||||
/**
|
||||
* @brief Toggle the value of the given GPIO pin
|
||||
*
|
||||
*
|
||||
* @param[in] dev the GPIO pin to toggle
|
||||
*
|
||||
*
|
||||
* @return 0 on success
|
||||
* @return -1 on undefined device given
|
||||
*/
|
||||
|
@ -183,10 +183,10 @@ int gpio_toggle(gpio_t dev);
|
|||
|
||||
/**
|
||||
* @brief Set the given GPIO pin to the given value
|
||||
*
|
||||
*
|
||||
* @param[in] dev the GPIO pin to set
|
||||
* @param[in] value value to set the pin to, 0 for LOW, HIGH otherwise
|
||||
*
|
||||
*
|
||||
* @return 0 on success
|
||||
* @return -1 on undefined device given
|
||||
*/
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
/**
|
||||
* @brief Definition of available PWM devices
|
||||
*
|
||||
*
|
||||
* To this point a maximum of four PWM device is available.
|
||||
*/
|
||||
typedef enum {
|
||||
|
@ -55,16 +55,16 @@ typedef enum {
|
|||
|
||||
/**
|
||||
* @brief Initialize a PWM device
|
||||
*
|
||||
*
|
||||
* The PWM module is based on virtual PWM devices, which can have one or more channels.
|
||||
* The PWM devices can be configured to run with a given frequency and resolution, which
|
||||
* are always identical for the complete device, hence for every channel on a device.
|
||||
*
|
||||
*
|
||||
* The desired frequency and resolution may not be possible on a given device when chosen
|
||||
* too large. In this case the PWM driver will always keep the resolution and decrease the
|
||||
* frequency if needed. To verify the correct settings compare the returned value which
|
||||
* is the actually set frequency.
|
||||
*
|
||||
*
|
||||
* @param dev PWM channel to initialize
|
||||
* @param mode PWM mode, left, right or center aligned
|
||||
* @param frequency the PWM frequency in Hz
|
||||
|
@ -76,10 +76,10 @@ int pwm_init(pwm_t dev, pwm_mode_t mode, unsigned int frequency, unsigned int re
|
|||
|
||||
/**
|
||||
* @brief Set the duty-cycle for a given channel of the given PWM device
|
||||
*
|
||||
*
|
||||
* The duty-cycle is set in relation to the chosen resolution of the given device. If
|
||||
* value > resolution, value is set to resolution.
|
||||
*
|
||||
*
|
||||
* @param dev the PWM device to set
|
||||
* @param channel the channel of the given device to set
|
||||
* @param value the desired duty-cycle to set
|
||||
|
@ -89,14 +89,14 @@ int pwm_set(pwm_t dev, int channel, unsigned int value);
|
|||
|
||||
/**
|
||||
* @brief Start PWM generation on the given device
|
||||
*
|
||||
*
|
||||
* @param dev device to start
|
||||
*/
|
||||
void pwm_start(pwm_t dev);
|
||||
|
||||
/**
|
||||
* @brief Stop PWM generation on the given device
|
||||
*
|
||||
*
|
||||
* @param dev device to stop
|
||||
*/
|
||||
void pwm_stop(pwm_t dev);
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
/**
|
||||
* @brief Definition of available timers
|
||||
*
|
||||
*
|
||||
* Each timer is based on a hardware timer, which can further have 1 or more channels.
|
||||
* To this point 4 timers are possible, might need to be expanded for some cases.
|
||||
*/
|
||||
|
@ -46,16 +46,16 @@ typedef enum {
|
|||
|
||||
/**
|
||||
* @brief Initialize the given timer
|
||||
*
|
||||
*
|
||||
* Each timer device is running with the given speed. Each can contain one or more channels
|
||||
* as defined in periph_conf.h. The timer is configured in up-counting mode and will count
|
||||
* until TIMER_x_MAX_VALUE as defined in used board's periph_conf.h until overflowing.
|
||||
*
|
||||
*
|
||||
* The timer will be started automatically after initialization with interrupts enabled.
|
||||
*
|
||||
*
|
||||
* @param[in] dev the timer to initialize
|
||||
* @param[in] ticks_per_us the timers speed in ticks per us
|
||||
* @param[in] callback this callback is called in interrupt context, the emitting channel is
|
||||
* @param[in] callback this callback is called in interrupt context, the emitting channel is
|
||||
* passed as argument
|
||||
*
|
||||
* @return returns 0 on success, -1 if speed not applicable of unknown device given
|
||||
|
@ -65,68 +65,68 @@ int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int));
|
|||
/**
|
||||
* @brief Set a given timer channel for the given timer device. The callback given during
|
||||
* initialization is called when timeout ticks have passed after calling this function
|
||||
*
|
||||
*
|
||||
* @param[in] dev the timer device to set
|
||||
* @param[in] channel the channel to set
|
||||
* @param[in] timeout timeout in ticks after that the registered callback is executed
|
||||
*
|
||||
*
|
||||
* @return 1 on success, -1 on error
|
||||
*/
|
||||
int timer_set(tim_t dev, int channel, unsigned int timeout);
|
||||
|
||||
/**
|
||||
* @brief Clear the given channel of the given timer device
|
||||
*
|
||||
*
|
||||
* @param[in] dev the timer device to clear
|
||||
* @param[in] channel the channel on the given device to clear
|
||||
*
|
||||
*
|
||||
* @return 1 on success, -1 on error
|
||||
*/
|
||||
int timer_clear(tim_t dev, int channel);
|
||||
|
||||
/**
|
||||
* @brief Read the current value of the given timer device
|
||||
*
|
||||
*
|
||||
* @param[in] dev the timer to read the current value from
|
||||
*
|
||||
*
|
||||
* @return the timers current value
|
||||
*/
|
||||
unsigned int timer_read(tim_t dev);
|
||||
|
||||
/**
|
||||
* @brief Start the given timer. This function is only needed if the timer was stopped manually before
|
||||
*
|
||||
*
|
||||
* @param[in] dev the timer device to stop
|
||||
*/
|
||||
void timer_start(tim_t dev);
|
||||
|
||||
/**
|
||||
* @brief Stop the given timer - this will effect all of the timer's channels
|
||||
*
|
||||
*
|
||||
* @param[in] dev the timer to stop
|
||||
*/
|
||||
void timer_stop(tim_t dev);
|
||||
|
||||
/**
|
||||
* @brief Enable the interrupts for the given timer
|
||||
*
|
||||
*
|
||||
* @param[in] dev timer to enable interrupts for
|
||||
*/
|
||||
void timer_irq_enable(tim_t dev);
|
||||
|
||||
/**
|
||||
* @brief Disable interrupts for the given timer
|
||||
*
|
||||
*
|
||||
* @param[in] dev the timer to disable interrupts for
|
||||
*/
|
||||
void timer_irq_disable(tim_t dev);
|
||||
|
||||
/**
|
||||
* @brief Reset the up-counting value to zero for the given timer
|
||||
*
|
||||
*
|
||||
* Note that this function effects all currently set channels and it can lead to non-deterministic timeouts
|
||||
* if any channel is active when this function is called.
|
||||
*
|
||||
*
|
||||
* @param[in] dev the timer to reset
|
||||
*/
|
||||
void timer_reset(tim_t dev);
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
|
||||
/**
|
||||
* @brief Definition of available UART devices
|
||||
*
|
||||
*
|
||||
* To this point a maximum of 4 UART devices would be available,
|
||||
* this should be enough for most applications?!
|
||||
*/
|
||||
|
@ -49,92 +49,92 @@ typedef enum {
|
|||
|
||||
/**
|
||||
* @brief Initialize a given UART device
|
||||
*
|
||||
*
|
||||
* The UART device will be initialized with the following configuration:
|
||||
* - 8 data bits
|
||||
* - no parity
|
||||
* - 1 stop bit
|
||||
* - baud-rate as given
|
||||
*
|
||||
*
|
||||
* @param[in] uart the UART device to initialize
|
||||
* @param[in] baudrate the desired baud-rate in baud/s
|
||||
* @param[in] rx_cb receive callback is called for every byte the is receive
|
||||
* in interrupt context
|
||||
* @param[in] tx_cb transmit callback is called when done with sending a byte
|
||||
* (TX buffer gets empty)
|
||||
*
|
||||
*
|
||||
* @return 0 on success, -1 for invalid baud-rate, -2 for all other errors
|
||||
*/
|
||||
int uart_init(uart_t uart, uint32_t baudrate, void (*rx_cb)(char), void (*tx_cb)(void));
|
||||
|
||||
/**
|
||||
* @brief Initialize an UART device for (conventional) blocking usage
|
||||
*
|
||||
*
|
||||
* This function initializes the an UART device for usage without interrupts.
|
||||
* When initializing with this function, the corresponding read_blocking and
|
||||
* When initializing with this function, the corresponding read_blocking and
|
||||
* write_blocking functions must be used.
|
||||
*
|
||||
*
|
||||
* The blocking mode should only be used for debugging and testing.
|
||||
*
|
||||
*
|
||||
* Same as uart_init(), the UART device is configured with in 8N1 mode with the given baud-rate.
|
||||
*
|
||||
*
|
||||
* @param[in] uart the UART device to initialize
|
||||
* @param[in] baudrate the desired baud-rate in baud/s
|
||||
*
|
||||
*
|
||||
* @return 0 on success, -1 for invalid baud-rate, -2 for all other errors
|
||||
*/
|
||||
int uart_init_blocking(uart_t uart, uint32_t baudrate);
|
||||
|
||||
/**
|
||||
* @brief Begin a new transmission, on most platforms this function will enable the TX interrupt
|
||||
*
|
||||
*
|
||||
* @param[in] uart UART device that will start a transmission
|
||||
*/
|
||||
void uart_tx_begin(uart_t uart);
|
||||
|
||||
/**
|
||||
* @brief End a transmission, on most platforms this will disable the TX interrupt
|
||||
*
|
||||
*
|
||||
* @param[in] uart the UART device that is finished with transmitting stuff
|
||||
*/
|
||||
void uart_tx_end(uart_t uart);
|
||||
|
||||
/**
|
||||
* @brief Write a byte into the UART's send register
|
||||
*
|
||||
*
|
||||
* Writing a byte into while another byte is still waiting to be transferred will override
|
||||
* the old byte. This method should be used in the transmit callback routine as in this it
|
||||
* is made sure that no old byte is waiting to be transferred.
|
||||
*
|
||||
*
|
||||
* @param[in] uart the UART device to use for transmission
|
||||
* @param[in] data the byte to write
|
||||
*
|
||||
*
|
||||
* @return 1 on success, -1 on error
|
||||
*/
|
||||
int uart_write(uart_t uart, char data);
|
||||
|
||||
/**
|
||||
* @brief Read a single character from the given UART device in blocking manner.
|
||||
*
|
||||
*
|
||||
* This function will actively wait until a byte is available in the UART receive
|
||||
* register. Consider using the interrupt driven UART mode instead!
|
||||
*
|
||||
*
|
||||
* @param[in] uart the UART device to read from
|
||||
* @param[in] data the byte to write
|
||||
*
|
||||
*
|
||||
* @return 1 on success, -1 on error
|
||||
*/
|
||||
int uart_read_blocking(uart_t uart, char *data);
|
||||
|
||||
/**
|
||||
* @brief Write a single byte to the given UART device in blocking manner.
|
||||
*
|
||||
* Note: in contrast uart_write, this function will actively wait (block) until the UART
|
||||
*
|
||||
* Note: in contrast uart_write, this function will actively wait (block) until the UART
|
||||
* device is ready to send a new byte. Consider using the interrupt driven UART mode instead.
|
||||
*
|
||||
*
|
||||
* @param[in] uart the UART device to write to
|
||||
* @param[in] data the byte to send
|
||||
*
|
||||
*
|
||||
* @return 1 on success, -1 on error
|
||||
*/
|
||||
int uart_write_blocking(uart_t uart, char data);
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
This application is a showcase of the Content Centric Networking (CCN) capabilities in RIOT.
|
||||
This application is a showcase of the Content Centric Networking (CCN) capabilities in RIOT.
|
||||