|
|
|
@ -8,9 +8,9 @@
|
|
|
|
|
* Copyright (C) 2009-2011 ARM Limited. All rights reserved. |
|
|
|
|
* |
|
|
|
|
* @par |
|
|
|
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M
|
|
|
|
|
* processor based microcontrollers. This file can be freely distributed
|
|
|
|
|
* within development tools that are supporting such ARM based processors.
|
|
|
|
|
* ARM Limited (ARM) is supplying this software for use with Cortex-M |
|
|
|
|
* processor based microcontrollers. This file can be freely distributed |
|
|
|
|
* within development tools that are supporting such ARM based processors. |
|
|
|
|
* |
|
|
|
|
* @par |
|
|
|
|
* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
|
|
|
@ -71,8 +71,8 @@
|
|
|
|
|
|
|
|
|
|
/** \brief Instruction Synchronization Barrier
|
|
|
|
|
|
|
|
|
|
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
|
|
|
|
so that all instructions following the ISB are fetched from cache or
|
|
|
|
|
Instruction Synchronization Barrier flushes the pipeline in the processor, |
|
|
|
|
so that all instructions following the ISB are fetched from cache or |
|
|
|
|
memory, after the instruction has been completed. |
|
|
|
|
*/ |
|
|
|
|
#define __ISB() __isb(0xF) |
|
|
|
@ -80,7 +80,7 @@
|
|
|
|
|
|
|
|
|
|
/** \brief Data Synchronization Barrier
|
|
|
|
|
|
|
|
|
|
This function acts as a special kind of Data Memory Barrier.
|
|
|
|
|
This function acts as a special kind of Data Memory Barrier. |
|
|
|
|
It completes when all explicit memory accesses before this instruction complete. |
|
|
|
|
*/ |
|
|
|
|
#define __DSB() __dsb(0xF) |
|
|
|
@ -88,7 +88,7 @@
|
|
|
|
|
|
|
|
|
|
/** \brief Data Memory Barrier
|
|
|
|
|
|
|
|
|
|
This function ensures the apparent order of the explicit memory operations before
|
|
|
|
|
This function ensures the apparent order of the explicit memory operations before |
|
|
|
|
and after the instruction, without ensuring their completion. |
|
|
|
|
*/ |
|
|
|
|
#define __DMB() __dmb(0xF) |
|
|
|
@ -247,7 +247,7 @@ static __INLINE __ASM int32_t __REVSH(int32_t value)
|
|
|
|
|
\param [in] value Value to count the leading zeros |
|
|
|
|
\return number of leading zeros in value |
|
|
|
|
*/ |
|
|
|
|
#define __CLZ __clz |
|
|
|
|
#define __CLZ __clz |
|
|
|
|
|
|
|
|
|
#endif /* (__CORTEX_M >= 0x03) */ |
|
|
|
|
|
|
|
|
@ -306,8 +306,8 @@ __attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
|
|
|
|
|
|
|
|
|
|
/** \brief Instruction Synchronization Barrier
|
|
|
|
|
|
|
|
|
|
Instruction Synchronization Barrier flushes the pipeline in the processor,
|
|
|
|
|
so that all instructions following the ISB are fetched from cache or
|
|
|
|
|
Instruction Synchronization Barrier flushes the pipeline in the processor, |
|
|
|
|
so that all instructions following the ISB are fetched from cache or |
|
|
|
|
memory, after the instruction has been completed. |
|
|
|
|
*/ |
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE void __ISB(void) |
|
|
|
@ -318,7 +318,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
|
|
|
|
|
|
|
|
|
|
/** \brief Data Synchronization Barrier
|
|
|
|
|
|
|
|
|
|
This function acts as a special kind of Data Memory Barrier.
|
|
|
|
|
This function acts as a special kind of Data Memory Barrier. |
|
|
|
|
It completes when all explicit memory accesses before this instruction complete. |
|
|
|
|
*/ |
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE void __DSB(void) |
|
|
|
@ -329,7 +329,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
|
|
|
|
|
|
|
|
|
|
/** \brief Data Memory Barrier
|
|
|
|
|
|
|
|
|
|
This function ensures the apparent order of the explicit memory operations before
|
|
|
|
|
This function ensures the apparent order of the explicit memory operations before |
|
|
|
|
and after the instruction, without ensuring their completion. |
|
|
|
|
*/ |
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE void __DMB(void) |
|
|
|
@ -348,7 +348,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value) |
|
|
|
|
{ |
|
|
|
|
uint32_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -364,7 +364,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value) |
|
|
|
|
{ |
|
|
|
|
uint32_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -380,7 +380,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t val
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value) |
|
|
|
|
{ |
|
|
|
|
uint32_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -398,7 +398,7 @@ __attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value) |
|
|
|
|
{ |
|
|
|
|
uint32_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -414,7 +414,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t valu
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr) |
|
|
|
|
{ |
|
|
|
|
uint8_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -430,7 +430,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uin
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr) |
|
|
|
|
{ |
|
|
|
|
uint16_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -446,7 +446,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile ui
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr) |
|
|
|
|
{ |
|
|
|
|
uint32_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -464,7 +464,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile ui
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) |
|
|
|
|
{ |
|
|
|
|
uint32_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -482,7 +482,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t val
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) |
|
|
|
|
{ |
|
|
|
|
uint32_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -500,7 +500,7 @@ __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t va
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) |
|
|
|
|
{ |
|
|
|
|
uint32_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
@ -559,7 +559,7 @@ __attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
|
|
|
|
|
__attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value) |
|
|
|
|
{ |
|
|
|
|
uint8_t result; |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
__ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) ); |
|
|
|
|
return(result); |
|
|
|
|
} |
|
|
|
|