From 256ce73d2cff4068883dc11ab38573bdc2d3236e Mon Sep 17 00:00:00 2001 From: Thomas Eichinger Date: Mon, 25 Aug 2014 13:45:22 +0200 Subject: [PATCH] boards: initial import for HiKoB fox --- boards/fox/Makefile | 3 + boards/fox/Makefile.dep | 6 + boards/fox/Makefile.features | 1 + boards/fox/Makefile.include | 58 ++++ boards/fox/board.c | 52 +++ boards/fox/dist/debug.sh | 20 ++ boards/fox/dist/flash.sh | 12 + .../dist/fox_jtag.cfg} | 0 boards/fox/dist/gdb.conf | 3 + boards/fox/dist/reset.sh | 7 + boards/fox/include/board.h | 134 ++++++++ boards/fox/include/periph_conf.h | 308 ++++++++++++++++++ boards/iot-lab_M3/dist/debug.sh | 10 +- boards/iot-lab_M3/dist/flash.sh | 28 +- boards/iot-lab_M3/dist/reset.sh | 10 +- boards/iot-lab_M3/tools/openocd.cfg | 4 - cpu/stm32f1/syscalls.c | 3 +- examples/default/Makefile | 5 + 18 files changed, 623 insertions(+), 41 deletions(-) create mode 100644 boards/fox/Makefile create mode 100644 boards/fox/Makefile.dep create mode 100644 boards/fox/Makefile.features create mode 100644 boards/fox/Makefile.include create mode 100644 boards/fox/board.c create mode 100755 boards/fox/dist/debug.sh create mode 100755 boards/fox/dist/flash.sh rename boards/{iot-lab_M3/dist/agilefox_jtag.cfg => fox/dist/fox_jtag.cfg} (100%) create mode 100644 boards/fox/dist/gdb.conf create mode 100755 boards/fox/dist/reset.sh create mode 100644 boards/fox/include/board.h create mode 100644 boards/fox/include/periph_conf.h delete mode 100644 boards/iot-lab_M3/tools/openocd.cfg diff --git a/boards/fox/Makefile b/boards/fox/Makefile new file mode 100644 index 000000000..ff5489888 --- /dev/null +++ b/boards/fox/Makefile @@ -0,0 +1,3 @@ +MODULE =$(BOARD)_base + +include $(RIOTBASE)/Makefile.base diff --git a/boards/fox/Makefile.dep b/boards/fox/Makefile.dep new file mode 100644 index 000000000..ab5c150ef --- /dev/null +++ b/boards/fox/Makefile.dep @@ -0,0 +1,6 @@ +ifneq (,$(filter defaulttransceiver,$(USEMODULE))) + USEMODULE += at86rf231 + ifeq (,$(filter netdev_base,$(USEMODULE))) + USEMODULE += transceiver + endif +endif diff --git a/boards/fox/Makefile.features b/boards/fox/Makefile.features new file mode 100644 index 000000000..1fd4646dd --- /dev/null +++ b/boards/fox/Makefile.features @@ -0,0 +1 @@ +FEATURES_PROVIDED += transceiver periph_gpio periph_uart periph_spi periph_i2c periph_rtt periph_cpuid cpp diff --git a/boards/fox/Makefile.include b/boards/fox/Makefile.include new file mode 100644 index 000000000..84176148a --- /dev/null +++ b/boards/fox/Makefile.include @@ -0,0 +1,58 @@ +## the cpu to build for +export CPU = stm32f1 +export CPU_MODEL = stm32f103re + +# set default port depending on operating system +OS := $(shell uname) +ifeq ($(OS),Linux) + PORT ?= /dev/ttyUSB1 +else ifeq ($(OS),Darwin) + PORT ?= $(shell ls -1 /dev/tty.usbserial* | head -n 1) +else + $(info CAUTION: No PORT was defined for your host platform!) + # TODO: add support for windows as host platform +endif +export PORT + +# define tools used for building the project +export PREFIX = arm-none-eabi- +export CC = $(PREFIX)gcc +export CXX = $(PREFIX)g++ +export AR = $(PREFIX)ar +export AS = $(PREFIX)as +export LINK = $(PREFIX)gcc +export SIZE = $(PREFIX)size +export OBJCOPY = $(PREFIX)objcopy +export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm +export FLASHER = $(RIOTBOARD)/$(BOARD)/dist/flash.sh +export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh +export RESET = $(RIOTBOARD)/$(BOARD)/dist/reset.sh + +# define build specific options +export CPU_USAGE = -mcpu=cortex-m3 +export FPU_USAGE = +export CFLAGS += -ggdb -g3 -std=gnu99 -Os -Wall -Wstrict-prototypes $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -mthumb -mthumb-interwork -nostartfiles +export CFLAGS += -ffunction-sections -fdata-sections -fno-builtin + +# unwanted (CXXUWFLAGS) and extra (CXXEXFLAGS) flags for c++ +export CXXUWFLAGS += +export CXXEXFLAGS += + +export ASFLAGS += -ggdb -g3 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian +export LINKFLAGS += -ggdb -g3 -std=gnu99 $(CPU_USAGE) $(FPU_USAGE) -mlittle-endian -static -lgcc -mthumb -mthumb-interwork -nostartfiles +# $(LINKERSCRIPT) is specified in cpu/Makefile.include +export LINKFLAGS += -T$(LINKERSCRIPT) +export OFLAGS = -O ihex +export FFLAGS = $(HEXFILE) +export DEBUGGER_FLAGS = $(RIOTBOARD)/$(BOARD)/dist/gdb.conf $(ELFFILE) +export TERMFLAGS = -p $(PORT) + +# use the nano-specs of the NewLib when available +ifeq ($(shell $(LINK) -specs=nano.specs -E - 2>/dev/null >/dev/null + * + * @} + */ + +#include "board.h" +#include "cpu.h" + +static void leds_init(void); + +void board_init(void) +{ + /* initialize the CPU */ + cpu_init(); + + /* initialize the boards LEDs */ + leds_init(); +} + +/** + * @brief Initialize the boards on-board LEDs + * + * The LEDs initialization is hard-coded in this function. As the LED is soldered + * onto the board it is fixed to its CPU pins. + * + * The LEDs are connected to the following pin: + * - Green: PB12 + * - Red: PB10 + */ +static void leds_init(void) +{ + /* green pin */ + RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; + LED_GREEN_PORT->CRL = (0x3 << ((LED_GREEN_PIN-8)*4)); + /* red pin */; + LED_RED_PORT->CRL = (0x3 << ((LED_RED_PIN-8)*4)); +} diff --git a/boards/fox/dist/debug.sh b/boards/fox/dist/debug.sh new file mode 100755 index 000000000..3df7dd3c4 --- /dev/null +++ b/boards/fox/dist/debug.sh @@ -0,0 +1,20 @@ +#!/bin/bash + +openocd -f "${RIOTBOARD}/${BOARD}/dist/${BOARD}_jtag.cfg" \ + -f "target/stm32f1x.cfg" \ + -c "tcl_port 6333" \ + -c "telnet_port 4444" \ + -c "init" \ + -c "targets" \ + -c "reset halt" \ + -l /dev/null & + +# save pid to terminate afterwards +OCD_PID=$? + +# needed for openocd to set up +sleep 5 + +arm-none-eabi-gdb -tui --command=${1} ${2} + +kill ${OCD_PID} diff --git a/boards/fox/dist/flash.sh b/boards/fox/dist/flash.sh new file mode 100755 index 000000000..7bf399896 --- /dev/null +++ b/boards/fox/dist/flash.sh @@ -0,0 +1,12 @@ +#!/bin/bash + +openocd -f "${RIOTBOARD}/${BOARD}/dist/${BOARD}_jtag.cfg" \ + -f "target/stm32f1x.cfg" \ + -c "init" \ + -c "targets" \ + -c "reset halt" \ + -c "reset init" \ + -c "flash write_image erase $1" \ + -c "verify_image $1" \ + -c "reset run"\ + -c "shutdown" diff --git a/boards/iot-lab_M3/dist/agilefox_jtag.cfg b/boards/fox/dist/fox_jtag.cfg similarity index 100% rename from boards/iot-lab_M3/dist/agilefox_jtag.cfg rename to boards/fox/dist/fox_jtag.cfg diff --git a/boards/fox/dist/gdb.conf b/boards/fox/dist/gdb.conf new file mode 100644 index 000000000..45fceb2df --- /dev/null +++ b/boards/fox/dist/gdb.conf @@ -0,0 +1,3 @@ +target remote localhost:3333 +monitor reset halt +load diff --git a/boards/fox/dist/reset.sh b/boards/fox/dist/reset.sh new file mode 100755 index 000000000..04e37911b --- /dev/null +++ b/boards/fox/dist/reset.sh @@ -0,0 +1,7 @@ +#!/bin/bash + +openocd -f "${RIOTBOARD}/${BOARD}/dist/${BOARD}_jtag.cfg" \ + -f "target/stm32f1x.cfg" \ + -c "init" \ + -c "reset run" \ + -c "shutdown" diff --git a/boards/fox/include/board.h b/boards/fox/include/board.h new file mode 100644 index 000000000..5bf7c362d --- /dev/null +++ b/boards/fox/include/board.h @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2014 Freie Universität Berlin + * + * This file is subject to the terms and conditions of the GNU Lesser General + * Public License v2.1. See the file LICENSE in the top level directory for more + * details. + */ + +/** + * @defgroup board_fox fox + * @ingroup boards + * @brief Board specific files for the fox board. + * @{ + * + * @file + * @brief Board specific definitions for the fox board. + * + * @author Alaeddine Weslati + * @author Thomas Eichinger + * @author Oliver Hahm + * @author Hauke Petersen + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#include + +#include "cpu.h" +#include "periph_conf.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * Define the nominal CPU core clock in this board + */ +#define F_CPU CLOCK_CORECLOCK + +/** + * @name Define the UART to be used as stdio and its baudrate + * @{ + */ +#define STDIO UART_0 +#define STDIO_BAUDRATE (115200) +#define STDIO_RX_BUFSIZE (64U) +/** @} */ + +/** + * Assign the hardware timer + */ +#define HW_TIMER TIMER_0 + +/** + * @name Define the interface to the AT86RF231 radio + * @{ + */ +#define AT86RF231_SPI SPI_0 +#define AT86RF231_CS GPIO_11 +#define AT86RF231_INT GPIO_12 +#define AT86RF231_RESET GPIO_13 +#define AT86RF231_SLEEP GPIO_14 +/** @} */ + +/** + * @name Define the interface to the LPS331AP pressure sensor + * @{ + */ +#define LPS331AP_I2C I2C_0 +#define LPS331AP_ADDR 0x5c +/** @} */ + +/** + * @name Define the interface for the L3G4200D gyroscope + * @{ + */ +#define L3G4200D_I2C I2C_0 +#define L3G4200D_ADDR 0x68 +#define L3G4200D_DRDY GPIO_2 +#define L3G4200D_INT GPIO_1 +/** @} */ + +/** + * @name Define the interface to the LSM303DLHC accelerometer and magnetometer + * @{ + */ +#define LSM303DLHC_I2C I2C_0 +#define LSM303DLHC_ACC_ADDR (25) +#define LSM303DLHC_MAG_ADDR (30) +#define LSM303DLHC_INT1 GPIO_4 +#define LSM303DLHC_INT2 GPIO_3 +#define LSM303DLHC_DRDY GPIO_9 +/** @} */ + +/** + * @name LED pin definitions + * @{ + */ +#define LED_RED_PORT (GPIOB) +#define LED_RED_PIN (10) +#define LED_GREEN_PORT (GPIOB) +#define LED_GREEN_PIN (12) +/** @} */ + +/** + * @name Macros for controlling the on-board LEDs. + * @{ + */ +#define LED_RED_ON (LED_RED_PORT->ODR &= ~(1<ODR |= (1<ODR ^= (1<ODR &= ~(1<ODR |= (1<ODR ^= (1< + */ + +#ifndef __PERIPH_CONF_H +#define __PERIPH_CONF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Clock system configuration + * @{ + **/ +#define CLOCK_HSE (16000000U) /* frequency of external oscillator */ +#define CLOCK_CORECLOCK (72000000U) /* targeted core clock frequency */ +/* configuration of PLL prescaler and multiply values */ +/* CORECLOCK := HSE / PLL_HSE_DIV * PLL_HSE_MUL */ +#define CLOCK_PLL_HSE_DIV RCC_CFGR_PLLXTPRE_HSE_Div2 +#define CLOCK_PLL_HSE_MUL RCC_CFGR_PLLMULL9 +/* configuration of peripheral bus clock prescalers */ +#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 /* AHB clock -> 72MHz */ +#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1 /* APB2 clock -> 72MHz */ +#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV2 /* APB1 clock -> 36MHz */ +/* configuration of flash access cycles */ +#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_2 +/** @} */ + +/** + * @brief Timer configuration + * @{ + */ +#define TIMER_NUMOF (2U) +#define TIMER_0_EN 1 +#define TIMER_1_EN 1 + +/* Timer 0 configuration */ +#define TIMER_0_DEV_0 TIM2 +#define TIMER_0_DEV_1 TIM3 +#define TIMER_0_CHANNELS 4 +#define TIMER_0_PRESCALER (72U) +#define TIMER_0_MAX_VALUE (0xffff) +#define TIMER_0_CLKEN() (RCC->APB1ENR |= (RCC_APB1ENR_TIM2EN | RCC_APB1ENR_TIM3EN)) +#define TIMER_0_ISR_0 isr_tim2 +#define TIMER_0_ISR_1 isr_tim3 +#define TIMER_0_IRQ_CHAN_0 TIM2_IRQn +#define TIMER_0_IRQ_CHAN_1 TIM3_IRQn +#define TIMER_0_IRQ_PRIO 1 +#define TIMER_0_TRIG_SEL TIM_SMCR_TS_0 + +/* Timer 1 configuration */ +#define TIMER_1_DEV_0 TIM4 +#define TIMER_1_DEV_1 TIM5 +#define TIMER_1_CHANNELS 4 +#define TIMER_1_PRESCALER (72U) +#define TIMER_1_MAX_VALUE (0xffff) +#define TIMER_1_CLKEN() (RCC->APB1ENR |= (RCC_APB1ENR_TIM4EN | RCC_APB1ENR_TIM5EN)) +#define TIMER_1_ISR_0 isr_tim4 +#define TIMER_1_ISR_1 isr_tim5 +#define TIMER_1_IRQ_CHAN_0 TIM4_IRQn +#define TIMER_1_IRQ_CHAN_1 TIM5_IRQn +#define TIMER_1_IRQ_PRIO 1 +#define TIMER_1_TRIG_SEL TIM_SMCR_TS_1 +/** @} */ + +/** + * @brief UART configuration + */ +#define UART_NUMOF (1U) +#define UART_0_EN 1 +#define UART_1_EN 0 +#define UART_IRQ_PRIO 1 + +/* UART 0 device configuration */ +#define UART_0_DEV USART2 +#define UART_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN) +#define UART_0_IRQ USART2_IRQn +#define UART_0_ISR isr_usart2 +#define UART_0_BUS_FREQ 36000000 +/* UART 0 pin configuration */ +#define UART_0_PORT GPIOA +#define UART_0_PORT_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) +#define UART_0_RX_PIN 3 +#define UART_0_TX_PIN 2 +#define UART_0_AF 1 + +/* UART 1 device configuration */ +#define UART_1_DEV USART1 +#define UART_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART1EN) +#define UART_1_IRQ USART1_IRQn +#define UART_1_ISR isr_usart1 +#define UART_1_BUS_FREQ 72000000 +/* UART 1 pin configuration */ +#define UART_1_PORT GPIOA +#define UART_1_PORT_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) +#define UART_1_RX_PIN 10 +#define UART_1_TX_PIN 9 +#define UART_1_AF 0 + +/** + * @brief GPIO configuration + */ +#define GPIO_NUMOF 13 +#define GPIO_0_EN 1 +#define GPIO_1_EN 1 +#define GPIO_2_EN 1 +#define GPIO_3_EN 1 +#define GPIO_4_EN 1 +#define GPIO_5_EN 1 +#define GPIO_6_EN 1 +#define GPIO_7_EN 1 +#define GPIO_8_EN 1 +#define GPIO_9_EN 1 +#define GPIO_10_EN 1 +#define GPIO_11_EN 1 +#define GPIO_12_EN 1 +#define GPIO_13_EN 1 +#define GPIO_14_EN 1 +#define GPIO_IRQ_PRIO 1 + +/* IRQ config */ +#define GPIO_IRQ_0 GPIO_7 +#define GPIO_IRQ_2 GPIO_12 +#define GPIO_IRQ_4 GPIO_6 +#define GPIO_IRQ_5 GPIO_3 +#define GPIO_IRQ_6 GPIO_5 +#define GPIO_IRQ_7 GPIO_8 +#define GPIO_IRQ_8 GPIO_2 +#define GPIO_IRQ_9 GPIO_4 +#define GPIO_IRQ_11 GPIO_1 +#define GPIO_IRQ_13 GPIO_0 + +/* GPIO channel 0 config */ +#define GPIO_0_PORT GPIOC /* user button */ +#define GPIO_0_PIN 13 +#define GPIO_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_0_EXTI_CFG() (AFIO->EXTICR[3] |= AFIO_EXTICR4_EXTI13_PC) +#define GPIO_0_IRQ EXTI15_10_IRQn +/* GPIO channel 1 config */ +#define GPIO_1_PORT GPIOB /* l3g4200d: int1 */ +#define GPIO_1_PIN 11 +#define GPIO_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_1_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI11_PC) +#define GPIO_1_IRQ EXTI15_10_IRQn +/* GPIO channel 2 config */ +#define GPIO_2_PORT GPIOB /* l3g4200d: int2/drdy */ +#define GPIO_2_PIN 8 +#define GPIO_2_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_2_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI8_PB) +#define GPIO_2_IRQ EXTI9_5_IRQn +/* GPIO channel 3 config */ +#define GPIO_3_PORT GPIOB /* lsm303dlhc: accelerometer: int2 */ +#define GPIO_3_PIN 5 +#define GPIO_3_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_3_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI5_PB) +#define GPIO_3_IRQ EXTI9_5_IRQn +/* GPIO channel 4 config */ +#define GPIO_4_PORT GPIOB /* lsm303dlhc: accelerometer: int1*/ +#define GPIO_4_PIN 9 +#define GPIO_4_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_4_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI9_PB) +#define GPIO_4_IRQ EXTI9_5_IRQn +/* GPIO channel 5 config */ +#define GPIO_5_PORT GPIOC /* battery: high power */ +#define GPIO_5_PIN 6 +#define GPIO_5_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_5_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI6_PC) +#define GPIO_5_IRQ EXTI9_5_IRQn +/* GPIO channel 6 config */ +#define GPIO_6_PORT GPIOC /* battery: enable feedback */ +#define GPIO_6_PIN 4 +#define GPIO_6_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_6_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI4_PC) +#define GPIO_6_IRQ EXTI4_IRQn +/* GPIO channel 7 config */ +#define GPIO_7_PORT GPIOC /* battery: feedback */ +#define GPIO_7_PIN 0 +#define GPIO_7_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_7_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI0_PC) +#define GPIO_7_IRQ EXTI0_IRQn +/* GPIO channel 8 config */ +#define GPIO_8_PORT GPIOA /* extension header */ +#define GPIO_8_PIN 7 +#define GPIO_8_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) +#define GPIO_8_EXTI_CFG() (AFIO->EXTICR[1] |= AFIO_EXTICR2_EXTI7_PA) +#define GPIO_8_IRQ EXTI9_5_IRQn +/* GPIO channel 9 config */ +#define GPIO_9_PORT GPIOA /* lsm303dlhc: magnetometer: drdy */ +#define GPIO_9_PIN 9 +#define GPIO_9_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) +#define GPIO_9_EXTI_CFG() (AFIO->EXTICR[2] |= AFIO_EXTICR3_EXTI9_PA) +#define GPIO_9_IRQ EXTI9_5_IRQn +/* GPIO channel 10 config */ +#define GPIO_10_PORT GPIOB /* extension header, don't use as EXTI */ +#define GPIO_10_PIN 0 +#define GPIO_10_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define GPIO_10_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI0_PB) +#define GPIO_10_IRQ EXTI0_IRQn +/* GPIO channel 11 config */ +#define GPIO_11_PORT GPIOA /* radio: cs */ +#define GPIO_11_PIN 1 +#define GPIO_11_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) +#define GPIO_11_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI1_PA) +#define GPIO_11_IRQ EXTI1_IRQn +/* GPIO channel 12 config */ +#define GPIO_12_PORT GPIOC /* radio: INT */ +#define GPIO_12_PIN 2 +#define GPIO_12_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_12_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI2_PC) +#define GPIO_12_IRQ EXTI2_IRQn +/* GPIO channel 13 config */ +#define GPIO_13_PORT GPIOC /* radio: reset */ +#define GPIO_13_PIN 1 +#define GPIO_13_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPCEN) +#define GPIO_13_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI1_PC) +#define GPIO_13_IRQ EXTI1_IRQn +/* GPIO channel 14 config */ +#define GPIO_14_PORT GPIOA /* radio: sleep */ +#define GPIO_14_PIN 0 +#define GPIO_14_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPAEN) +#define GPIO_14_EXTI_CFG() (AFIO->EXTICR[0] |= AFIO_EXTICR1_EXTI0_PA) +#define GPIO_14_IRQ EXTI0_IRQn +/** + * @brief SPI configuration + * @{ + */ +#define SPI_NUMOF (1U) +#define SPI_0_EN 1 + +/* SPI 0 device configuration */ +#define SPI_0_DEV SPI2 +#define SPI_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_SPI2EN) +#define SPI_0_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN)) +#define SPI_0_BUS_DIV 0 /* 1 -> SPI runs with full CPU clock, 0 -> half CPU clock */ +/* SPI 0 pin configuration */ +#define SPI_0_CLK_PORT GPIOB +#define SPI_0_CLK_PIN 13 +#define SPI_0_CLK_PORT_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define SPI_0_MOSI_PORT GPIOB +#define SPI_0_MOSI_PIN 15 +#define SPI_0_MOSI_PORT_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define SPI_0_MISO_PORT GPIOB +#define SPI_0_MISO_PIN 14 +#define SPI_0_MISO_PORT_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +/** @} */ + +/** + * @name Real time counter configuration + * @{ + */ +#define RTT_NUMOF (1U) +#define RTT_IRQ_PRIO 1 + +#define RTT_DEV RTC +#define RTT_IRQ RTC_IRQn +#define RTT_ISR isr_rtc +#define RTT_MAX_VALUE (0xffffffff) +#define RTT_FREQUENCY (1) /* in Hz */ +#define RTT_PRESCALER (0x7fff) /* run with 1 Hz */ +/** @} */ + +/** + * @name I2C configuration + * @{ + */ +#define I2C_NUMOF (1U) +#define I2C_0_EN 1 +#define I2C_IRQ_PRIO 1 +#define I2C_APBCLK (36000000U) + +/* I2C 0 device configuration */ +#define I2C_0_DEV I2C1 +#define I2C_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_I2C1EN) +#define I2C_0_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C1EN)) +#define I2C_0_EVT_IRQ I2C1_EV_IRQn +#define I2C_0_EVT_ISR isr_i2c1_ev +#define I2C_0_ERR_IRQ I2C1_ER_IRQn +#define I2C_0_ERR_ISR isr_i2c1_er +/* I2C 0 pin configuration */ +#define I2C_0_SCL_PORT GPIOB +#define I2C_0_SCL_PIN 6 +#define I2C_0_SCL_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +#define I2C_0_SDA_PORT GPIOB +#define I2C_0_SDA_PIN 7 +#define I2C_0_SDA_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_IOPBEN) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* __PERIPH_CONF_H */ +/** @} */ diff --git a/boards/iot-lab_M3/dist/debug.sh b/boards/iot-lab_M3/dist/debug.sh index b259e08d6..3df7dd3c4 100755 --- a/boards/iot-lab_M3/dist/debug.sh +++ b/boards/iot-lab_M3/dist/debug.sh @@ -1,14 +1,6 @@ #!/bin/bash -if [ -L "$0" ]; then - FILE=$(readlink "$0") -else - FILE="$0" -fi - -BIN_FOLDER=$(dirname "${FILE}") - -openocd -f "${BIN_FOLDER}/${BOARD}_jtag.cfg" \ +openocd -f "${RIOTBOARD}/${BOARD}/dist/${BOARD}_jtag.cfg" \ -f "target/stm32f1x.cfg" \ -c "tcl_port 6333" \ -c "telnet_port 4444" \ diff --git a/boards/iot-lab_M3/dist/flash.sh b/boards/iot-lab_M3/dist/flash.sh index 9885a5b3c..7bf399896 100755 --- a/boards/iot-lab_M3/dist/flash.sh +++ b/boards/iot-lab_M3/dist/flash.sh @@ -1,20 +1,12 @@ #!/bin/bash -if [ -L "$0" ]; then - FILE=$(readlink "$0") -else - FILE="$0" -fi - -BIN_FOLDER=$(dirname "${FILE}") - -openocd -f "${BIN_FOLDER}/${BOARD}_jtag.cfg" \ - -f "target/stm32f1x.cfg" \ - -c "init" \ - -c "targets" \ - -c "reset halt" \ - -c "reset init" \ - -c "flash write_image erase $1" \ - -c "verify_image $1" \ - -c "reset run"\ - -c "shutdown" +openocd -f "${RIOTBOARD}/${BOARD}/dist/${BOARD}_jtag.cfg" \ + -f "target/stm32f1x.cfg" \ + -c "init" \ + -c "targets" \ + -c "reset halt" \ + -c "reset init" \ + -c "flash write_image erase $1" \ + -c "verify_image $1" \ + -c "reset run"\ + -c "shutdown" diff --git a/boards/iot-lab_M3/dist/reset.sh b/boards/iot-lab_M3/dist/reset.sh index 016e57ba7..04e37911b 100755 --- a/boards/iot-lab_M3/dist/reset.sh +++ b/boards/iot-lab_M3/dist/reset.sh @@ -1,14 +1,6 @@ #!/bin/bash -if [ -L "$0" ]; then - FILE=$(readlink "$0") -else - FILE="$0" -fi - -BIN_FOLDER=$(dirname "${FILE}") - -openocd -f "${BIN_FOLDER}/${BOARD}_jtag.cfg" \ +openocd -f "${RIOTBOARD}/${BOARD}/dist/${BOARD}_jtag.cfg" \ -f "target/stm32f1x.cfg" \ -c "init" \ -c "reset run" \ diff --git a/boards/iot-lab_M3/tools/openocd.cfg b/boards/iot-lab_M3/tools/openocd.cfg deleted file mode 100644 index 10dcf790b..000000000 --- a/boards/iot-lab_M3/tools/openocd.cfg +++ /dev/null @@ -1,4 +0,0 @@ -# openocd.cfg file for STM32F4Discovery board via integrated ST-Link/V2. -source [find interface/stlink-v2.cfg] -source [find target/stm32f4x_stlink.cfg] -reset_config srst_only srst_nogate diff --git a/cpu/stm32f1/syscalls.c b/cpu/stm32f1/syscalls.c index 44c239188..9dfc25336 100644 --- a/cpu/stm32f1/syscalls.c +++ b/cpu/stm32f1/syscalls.c @@ -35,6 +35,7 @@ #include "ringbuffer.h" #include "irq.h" #include "periph/uart.h" +#include "board.h" #ifdef MODULE_UART0 #include "board_uart0.h" @@ -244,7 +245,7 @@ int _write_r(struct _reent *r, int fd, const void *data, unsigned int count) { char *c = (char*)data; for (int i = 0; i < count; i++) { - uart_write_blocking(UART_0, c[i]); + uart_write_blocking(STDIO, c[i]); } return count; } diff --git a/examples/default/Makefile b/examples/default/Makefile index 7b86bf3fe..cfb50016c 100644 --- a/examples/default/Makefile +++ b/examples/default/Makefile @@ -61,5 +61,10 @@ ifneq (,$(filter iot-lab_M3,$(BOARD))) USEMODULE += l3g4200d USEMODULE += lsm303dlhc endif +ifneq (,$(filter fox,$(BOARD))) + USEMODULE += lps331ap + USEMODULE += l3g4200d + USEMODULE += lsm303dlhc +endif include $(RIOTBASE)/Makefile.include