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@ -21,6 +21,8 @@
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#ifndef PERIPH_CONF_H_
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#define PERIPH_CONF_H_
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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@ -41,6 +43,11 @@ extern "C" {
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#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV2
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#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV4
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#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_5WS
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/* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
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#define CLOCK_AHB (CLOCK_CORECLOCK / 1)
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#define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
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#define CLOCK_APB1 (CLOCK_CORECLOCK / 4)
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/** @} */
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/**
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@ -75,24 +82,26 @@ extern "C" {
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* @name UART configuration
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* @{
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*/
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#define UART_NUMOF (1U)
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#define UART_0_EN 1
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#define UART_1_EN 0
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#define UART_IRQ_PRIO 1
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static const uart_conf_t uart_config[] = {
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/* device, RCC mask, RX pin, TX pin, pin AF, IRQ channel, DMA stream, DMA */
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{
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USART6, /* device base register */
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RCC_APB2ENR_USART6EN, /* RCC mask */
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GPIO_PIN(PORT_C,7), /* RX pin */
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GPIO_PIN(PORT_C,6), /* TX pin */
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GPIO_AF8, /* pin AF */
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USART6_IRQn, /* IRQ channel */
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14, /* DMA stream */
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5 /* DMA channel */
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},
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};
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/* UART 0 device configuration */
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#define UART_0_DEV USART6
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#define UART_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART6EN)
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#define UART_0_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART6EN))
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#define UART_0_CLK (84000000) /* UART clock runs with 84MHz (F_CPU / 2) */
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#define UART_0_IRQ_CHAN USART6_IRQn
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/* assign ISR vector names */
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#define UART_0_ISR isr_usart6
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/* UART 0 pin configuration */
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#define UART_0_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN)
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#define UART_0_PORT GPIOC
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#define UART_0_TX_PIN 6
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#define UART_0_RX_PIN 7
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#define UART_0_AF 8
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#define UART_0_DMA_ISR isr_dma2_stream6
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/* deduct number of defined UART interfaces */
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
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/** @} */
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#ifdef __cplusplus
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