[board/eZ430-Chronos board/msba2 drivers/cc110x_ng]

* restructured interface functions for cc1100 access
dev/timer
Oliver Hahm 13 years ago
parent e1b3dcf40d
commit 2a1a10bd74

@ -1,5 +1,4 @@
SubDir TOP board eZ430-Chronos drivers ;
UseModule board_common ;
Module board_common : display.c display1.c ;
Module board_display : display.c display1.c ;
Module board_cc1100 : cc430-cc1100.c : cc110x_cc430 ;

@ -0,0 +1,66 @@
#include <stdint.h>
#include <cpu.h>
#include <irq.h>
#include <arch_cc1100.h>
#warning CC430_CC1100 NOT WORKING
/* TODO: defines... */
#define CC1100_GDO0 (0)
#define CC1100_GDO1 (1)
#define CC1100_GDO2 (2)
int cc1100_get_gdo0(void) {
return CC1100_GDO0;
}
int cc1100_get_gdo1(void) {
return CC1100_GDO1;
}
int cc1100_get_gdo2(void) {
return CC1100_GDO2;
}
void cc1100_before_send(void)
{
// Disable GDO2 interrupt before sending packet
cc1100_gdo2_disable();
}
void cc1100_after_send(void)
{
// Enable GDO2 interrupt after sending packet
cc1100_gdo2_enable();
}
void cc1100_gdo0_enable(void) {
}
void cc1100_gdo0_disable(void) {
}
void cc1100_gdo2_disable(void) {
}
void cc1100_gdo2_enable(void) {
}
void cc1100_init_interrupts(void) {
uint8_t state = disableIRQ(); /* Disable all interrupts */
restoreIRQ(state); /* Enable all interrupts */
}
interrupt (PORT2_VECTOR) __attribute__ ((naked)) cc1100_isr(void){
__enter_isr();
/* Check IFG */
if (1 == 1) {
cc1100_gdo2_irq();
}
else if (2 == 2) {
cc1100_gdo0_irq();
} else {
puts("cc1100_isr(): unexpected IFG!");
}
__exit_isr();
}

@ -1,6 +1,6 @@
SubDir TOP board msba2 drivers ;
Module board_cc1100 : msba2-cc1100.c ;
Module board_cc1100 : msba2-cc1100.c : gpioint cc110x_spi ;
Module board_hal : msba2-hal.c ;
Module board_ltc4150 : msba2-ltc4150.c : gpioint ;
Module board_common : msba2-uart0.c : ringbuffer ;

@ -29,6 +29,6 @@ SubDir TOP drivers cc110x_ng ;
HDRS += $(TOP)/drivers/cc110x_ng ;
Module cc110x_ng : cc1100.c cc1100-rx.c cc1100-tx.c cc1100-defaultSettings.c : swtimer ;
Module cc110x_spi : cc1100_spi.c : board_cc1100 ;
Module cc110x_reg : cc1100-reg.c ;
Module cc110x_ng : cc1100.c cc1100-rx.c cc1100-tx.c cc1100-defaultSettings.c : hwtimer board_cc1100 ;
Module cc110x_spi : cc1100_spi.c ;
Module cc110x_cc430 : cc1100_cc430.c ;

@ -0,0 +1,12 @@
#ifndef CC110X_REG_H
#define CC110X_REG_H
#include <stdint.h>
uint8_t cc1100_writeburst_reg(uint8_t addr, char *buffer, uint8_t count);
void cc1100_readburst_reg(uint8_t addr, char *buffer, uint8_t count);
void cc1100_write_reg(uint8_t addr, uint8_t value);
uint8_t cc1100_read_reg(uint8_t addr);
uint8_t cc1100_read_status(uint8_t addr);
uint8_t cc1100_strobe(uint8_t c);
#endif

@ -0,0 +1,159 @@
#include <irq.h>
#include <cc1100-defaultSettings.h>
#include <cc1100-reg.h>
#include <stdint.h>
#include <board.h>
#include <hwtimer.h>
// *************************************************************************************************
// @fn Strobe
// @brief Send command to radio.
// @param none
// @return none
// *************************************************************************************************
uint8_t cc1100_strobe(uint8_t c) {
uint8_t statusByte = 0;
uint16_t int_state, gdo_state;
// Check for valid strobe command
if((c == 0xBD) || ((c > RF_SRES) && (c < RF_SNOP))) {
int_state = disableIRQ();
// Clear the Status read flag
RF1AIFCTL1 &= ~(RFSTATIFG);
// Wait for radio to be ready for next instruction
while( !(RF1AIFCTL1 & RFINSTRIFG));
// Write the strobe instruction
if ((c > RF_SRES) && (c < RF_SNOP))
{
gdo_state = cc1100_read_reg(IOCFG2); // buffer IOCFG2 state
cc1100_write_reg(IOCFG2, 0x29); // c-ready to GDO2
RF1AINSTRB = c;
if ((RF1AIN & 0x04) == 0x04 ) // chip at sleep mode
{
if ((c == RF_SXOFF) || (c == RF_SPWD) || (c == RF_SWOR) ) { }
else
{
while ((RF1AIN&0x04)== 0x04); // c-ready ?
hwtimer_wait(RTIMER_TICKS(9800)); // Delay for ~810usec at 12MHz CPU clock
}
}
cc1100_write_reg(IOCFG2, gdo_state); // restore IOCFG2 setting
}
else // chip active mode
{
RF1AINSTRB = c;
}
statusByte = RF1ASTATB;
while( !(RF1AIFCTL1 & RFSTATIFG) );
restoreIRQ(int_state);
}
return statusByte;
}
// *************************************************************************************************
// @fn cc1100_read_reg
// @brief Read byte from register.
// @param none
// @return none
// *************************************************************************************************
uint8_t cc1100_read_reg(uint8_t addr) {
unsigned char x;
uint16_t int_state;
int_state = disableIRQ();
RF1AINSTR1B = (addr | RF_REGRD);
x = RF1ADOUT1B;
restoreIRQ(int_state);
return x;
}
// *************************************************************************************************
// @fn cc1100_write_reg
// @brief Write byte to register.
// @param none
// @return none
// *************************************************************************************************
void cc1100_write_reg(uint8_t addr, uint8_t value) {
volatile unsigned int i;
uint16_t int_state;
int_state = disableIRQ();
while (!(RF1AIFCTL1 & RFINSTRIFG)); // Wait for the Radio to be ready for the next instruction
RF1AINSTRW = ((addr | RF_REGWR)<<8 ) + value; // Send address + Instruction
while (!(RFDINIFG & RF1AIFCTL1));
i = RF1ADOUTB; // Reset RFDOUTIFG flag which contains status byte
restoreIRQ(int_state);
}
uint8_t cc1100_read_status(uint8_t addr) {
char status;
cc1100_readburst_reg(addr, &status, 1);
return status;
}
// *************************************************************************************************
// @fn cc1100_readburst_reg
// @brief Read sequence of bytes from register.
// @param none
// @return none
// *************************************************************************************************
void cc1100_readburst_reg(uint8_t addr, char *buffer, uint8_t count) {
unsigned int i;
uint16_t int_state;
int_state = disableIRQ();
while (!(RF1AIFCTL1 & RFINSTRIFG)); // Wait for the Radio to be ready for next instruction
RF1AINSTR1B = (addr | RF_REGRD); // Send address + Instruction
for (i = 0; i < (count-1); i++)
{
while (!(RFDOUTIFG&RF1AIFCTL1)); // Wait for the Radio Core to update the RF1ADOUTB reg
buffer[i] = RF1ADOUT1B; // Read DOUT from Radio Core + clears RFDOUTIFG
// Also initiates auo-read for next DOUT byte
}
buffer[count-1] = RF1ADOUT0B; // Store the last DOUT from Radio Core
restoreIRQ(int_state);
}
// *************************************************************************************************
// @fn cc1100_writeburst_reg
// @brief Write sequence of bytes to register.
// @param none
// @return none
// *************************************************************************************************
uint8_t cc1100_writeburst_reg(uint8_t addr, char *buffer, uint8_t count) {
// Write Burst works wordwise not bytewise - bug known already
unsigned char i;
uint16_t int_state;
int_state = disableIRQ();
while (!(RF1AIFCTL1 & RFINSTRIFG)); // Wait for the Radio to be ready for next instruction
RF1AINSTRW = ((addr | RF_REGWR)<<8 ) + buffer[0]; // Send address + Instruction
for (i = 1; i < count; i++)
{
RF1ADINB = buffer[i]; // Send data
while (!(RFDINIFG & RF1AIFCTL1)); // Wait for TX to finish
}
i = RF1ADOUTB; // Reset RFDOUTIFG flag which contains status byte
restoreIRQ(int_state);
return count;
}

@ -117,4 +117,18 @@ radio_address_t cc1100_get_address(void);
void cc1100_set_monitor(uint8_t mode);
void cc1100_print_config(void);
/**
* @brief GDO0 interrupt handler.
*/
void cc1100_gdo0_irq(void);
/**
* @brief GDO2 interrupt handler.
*
* @note Wakes up MCU on packet reception.
*/
void cc1100_gdo2_irq(void);
#endif

@ -6,6 +6,6 @@
SubDir TOP projects default ;
Module default_project : main.c : shell posix_io uart0 shell_commands ps rtc sht11 ltc4150 cc110x auto_init ;
Module default_project : main.c : shell posix_io uart0 shell_commands ps rtc sht11 ltc4150 cc110x_ng transceiver gpioint auto_init ;
UseModule default_project ;

@ -1,5 +1,5 @@
SubDir TOP projects test_cc110x_ng ;
Module test_cc110x_ng : main.c : cc110x_ng shell shell_commands transceiver ps rtc posix_io uart0 auto_init gpioint cc110x_spi ;
Module test_cc110x_ng : main.c : cc110x_ng shell shell_commands transceiver ps rtc posix_io uart0 auto_init swtimer ;
UseModule test_cc110x_ng ;

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