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@ -88,11 +88,9 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
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return -2;
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}
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/* power on UART device */
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/* power on UART device and select peripheral clock */
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UART_0_CLKEN();
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/* set peripheral clock to CCLK / 4 */
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LPC_SC->PCLKSEL1 &= (0x3 << 18);
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UART_0_CLKSEL();
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/* set mode to 8N1 and enable access to divisor latch */
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UART_0_DEV->LCR = ((0x3 << 0) | (1 << 7));
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/* set baud rate registers (fixed for now) */
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@ -121,10 +119,9 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
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return -2;
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}
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/* power on UART device */
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/* power on UART device and select peripheral clock */
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UART_1_CLKEN();
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/* set peripheral clock to CCLK / 4 */
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LPC_SC->PCLKSEL1 &= (0x3 << 18);
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UART_1_CLKSEL();
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/* set mode to 8N1 and enable access to divisor latch */
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UART_1_DEV->LCR = ((0x3 << 0) | (1 << 7));
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/* set baud rate registers (fixed for now) */
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