boards: added SPI definitions for NRF based boards

added SPI defines for
- yunjia-nrf51822
- pca10005
- airfy-beacon
dev/timer
Hauke Petersen 9 years ago
parent 66e7646091
commit 346810ce12

@ -1,3 +1,4 @@
FEATURES_PROVIDED += cpp
FEATURES_PROVIDED += periph_uart periph_gpio periph_random periph_rtt periph_cpuid
FEATURES_PROVIDED += periph_uart periph_gpio periph_random periph_rtt \
periph_cpuid periph_spi
FEATURES_MCU_GROUP = cortex_m0

@ -108,6 +108,21 @@
#define RANDOM_NUMOF (1U)
/** @} */
/**
* @name SPI configuration
* @{
*/
#define SPI_NUMOF (1U)
#define SPI_0_EN 1
#define SPI_IRQ_PRIO 1
/* SPI_0 device configuration */
#define SPI_0_DEV NRF_SPI0
#define SPI_0_PIN_MOSI 13
#define SPI_0_PIN_MISO 14
#define SPI_0_PIN_SCK 15
/** @} */
/**
* @name GPIO configuration
* @{

@ -1,3 +1,4 @@
FEATURES_PROVIDED += cpp
FEATURES_PROVIDED += periph_uart periph_gpio periph_random periph_rtt periph_cpuid
FEATURES_PROVIDED += periph_uart periph_gpio periph_random periph_rtt \
periph_cpuid periph_spi
FEATURES_MCU_GROUP = cortex_m0

@ -108,6 +108,28 @@ extern "C" {
#define RANDOM_NUMOF (1U)
/** @} */
/**
* @name SPI configuration
* @{
*/
#define SPI_NUMOF (2U)
#define SPI_0_EN 1
#define SPI_1_EN 1
#define SPI_IRQ_PRIO 1
/* SPI_0 device configuration */
#define SPI_0_DEV NRF_SPI0
#define SPI_0_PIN_MOSI 17
#define SPI_0_PIN_MISO 18
#define SPI_0_PIN_SCK 19
/* SPI_1 device configuration */
#define SPI_1_DEV NRF_SPI1
#define SPI_1_PIN_MOSI 20
#define SPI_1_PIN_MISO 21
#define SPI_1_PIN_SCK 22
/** @} */
/**
* @name GPIO configuration
* @{

@ -1,3 +1,4 @@
FEATURES_PROVIDED += cpp
FEATURES_PROVIDED += periph_uart periph_gpio periph_random periph_rtt periph_cpuid
FEATURES_PROVIDED += periph_uart periph_gpio periph_random periph_rtt \
periph_cpuid periph_spi
FEATURES_MCU_GROUP = cortex_m0

@ -106,6 +106,29 @@ extern "C" {
#define RANDOM_NUMOF (1U)
/** @} */
/**
* @name SPI configuration
* @{
*/
#define SPI_NUMOF (2U)
#define SPI_0_EN 1
#define SPI_1_EN 1
#define SPI_IRQ_PRIO 1
/* SPI_0 device configuration */
#define SPI_0_DEV NRF_SPI0
#define SPI_0_PIN_MOSI 17
#define SPI_0_PIN_MISO 18
#define SPI_0_PIN_SCK 19
/* SPI_1 device configuration */
#define SPI_1_DEV NRF_SPI1
#define SPI_1_PIN_MOSI 20
#define SPI_1_PIN_MISO 21
#define SPI_1_PIN_SCK 22
/** @} */
/**
* @name GPIO configuration
* @{

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