Martine Lenders
8 years ago
commit
54fe08feda
@ -0,0 +1,406 @@
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/*
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* Copyright (C) 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_at86rf2xx
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* @{
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*
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* @file
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* @brief Getter and setter functions for the AT86RF2xx drivers
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*
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* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Baptiste Clenet <bapclenet@gmail.com>
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*
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* @}
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*/
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#include "at86rf2xx.h"
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#include "at86rf2xx_internal.h"
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#include "at86rf2xx_registers.h"
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#include "periph/spi.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#ifdef MODULE_NG_AT86RF212B
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/* See: Table 9-15. Recommended Mapping of TX Power, Frequency Band, and
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* PHY_TX_PWR (register 0x05), AT86RF212B data sheet. */
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static const uint8_t dbm_to_tx_pow_868[] = {0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18,
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0x17, 0x15, 0x14, 0x13, 0x12, 0x11,
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0x10, 0x0f, 0x31, 0x30, 0x2f, 0x94,
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0x93, 0x91, 0x90, 0x29, 0x49, 0x48,
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0x47, 0xad, 0xcd, 0xcc, 0xcb, 0xea,
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0xe9, 0xe8, 0xe7, 0xe6, 0xe4, 0x80,
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0xa0};
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static const uint8_t dbm_to_tx_pow_915[] = {0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x17,
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0x16, 0x15, 0x14, 0x13, 0x12, 0x11,
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0x10, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b,
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0x09, 0x91, 0x08, 0x07, 0x05, 0x27,
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0x04, 0x03, 0x02, 0x01, 0x00, 0x86,
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0x40, 0x84, 0x83, 0x82, 0x80, 0xc1,
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0xc0};
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int16_t tx_pow_to_dbm(at86rf2xx_freq_t freq, uint8_t reg) {
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for(int i = 0; i < 37; i++){
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if(freq == AT86RF2XX_FREQ_868MHZ){
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if (dbm_to_tx_pow_868[i] == reg) {
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return i -25;
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}
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} else if (freq == AT86RF2XX_FREQ_915MHZ){
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if (dbm_to_tx_pow_915[i] == reg) {
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return i -25;
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}
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}
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}
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return 0;
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}
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#elif MODULE_NG_AT86RF233
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static const int16_t tx_pow_to_dbm[] = {4, 4, 3, 3, 2, 2, 1,
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0, -1, -2, -3, -4, -6, -8, -12, -17};
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static const uint8_t dbm_to_tx_pow[] = {0x0f, 0x0f, 0x0f, 0x0e, 0x0e, 0x0e,
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0x0e, 0x0d, 0x0d, 0x0d, 0x0c, 0x0c,
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0x0b, 0x0b, 0x0a, 0x09, 0x08, 0x07,
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0x06, 0x05, 0x03,0x00};
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#else
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static const int16_t tx_pow_to_dbm[] = {3, 3, 2, 2, 1, 1, 0,
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-1, -2, -3, -4, -5, -7, -9, -12, -17};
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static const uint8_t dbm_to_tx_pow[] = {0x0f, 0x0f, 0x0f, 0x0e, 0x0e, 0x0e,
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0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
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0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06,
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0x05, 0x03, 0x00};
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#endif
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uint16_t at86rf2xx_get_addr_short(at86rf2xx_t *dev)
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{
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return (dev->addr_short[0] << 8) | dev->addr_short[1];
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}
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void at86rf2xx_set_addr_short(at86rf2xx_t *dev, uint16_t addr)
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{
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dev->addr_short[0] = addr >> 8;
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dev->addr_short[1] = addr & 0xff;
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__SHORT_ADDR_0,
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dev->addr_short[0]);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__SHORT_ADDR_1,
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dev->addr_short[1]);
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}
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uint64_t at86rf2xx_get_addr_long(at86rf2xx_t *dev)
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{
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uint64_t addr;
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uint8_t *ap = (uint8_t *)(&addr);
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for (int i = 0; i < 8; i++) {
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ap[i] = dev->addr_long[7 - i];
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}
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return addr;
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}
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void at86rf2xx_set_addr_long(at86rf2xx_t *dev, uint64_t addr)
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{
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for (int i = 0; i < 8; i++) {
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dev->addr_long[i] = (addr >> ((7 - i) * 8));
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at86rf2xx_reg_write(dev, (AT86RF2XX_REG__IEEE_ADDR_0 + i),
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dev->addr_long[i]);
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}
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}
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uint8_t at86rf2xx_get_chan(at86rf2xx_t *dev)
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{
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return dev->chan;
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}
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void at86rf2xx_set_chan(at86rf2xx_t *dev, uint8_t channel)
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{
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uint8_t tmp;
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if (channel < AT86RF2XX_MIN_CHANNEL
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|| channel > AT86RF2XX_MAX_CHANNEL) {
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return;
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}
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dev->chan = channel;
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tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_CC_CCA);
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tmp &= ~(AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL);
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tmp |= (channel & AT86RF2XX_PHY_CC_CCA_MASK__CHANNEL);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_CC_CCA, tmp);
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}
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#ifdef MODULE_NG_AT86RF212B
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at86rf2xx_freq_t at86rf2xx_get_freq(at86rf2xx_t *dev)
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{
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return dev->freq;
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}
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void at86rf2xx_set_freq(at86rf2xx_t *dev, at86rf2xx_freq_t freq)
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{
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uint8_t trx_ctrl2 = 0, rf_ctrl0 = 0;
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trx_ctrl2 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__TRX_CTRL_2);
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trx_ctrl2 &= ~(AT86RF2XX_TRX_CTRL_2_MASK__FREQ_MODE);
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rf_ctrl0 = at86rf2xx_reg_read(dev, AT86RF2XX_REG__RF_CTRL_0);
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/* Erase previous conf for GC_TX_OFFS */
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rf_ctrl0 &= ~AT86RF2XX_RF_CTRL_0_MASK__GC_TX_OFFS;
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trx_ctrl2 |= AT86RF2XX_TRX_CTRL_2_MASK__SUB_MODE;
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rf_ctrl0 |= AT86RF2XX_RF_CTRL_0_GC_TX_OFFS__2DB;
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switch(freq) {
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case AT86RF2XX_FREQ_915MHZ:
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if (dev->chan == 0) {
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at86rf2xx_set_chan(dev,AT86RF2XX_DEFAULT_CHANNEL);
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} else {
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at86rf2xx_set_chan(dev,dev->chan);
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}
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break;
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case AT86RF2XX_FREQ_868MHZ:
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/* Channel = 0 for 868MHz means 868.3MHz, only one available */
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at86rf2xx_set_chan(dev,0x00);
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break;
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default:
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DEBUG("at86rf2xx: Trying to set unknown frequency 0x%lx\n",
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(unsigned long) freq);
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return;
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}
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dev->freq = freq;
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_CTRL_2, trx_ctrl2);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__RF_CTRL_0, rf_ctrl0);
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}
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#endif
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uint16_t at86rf2xx_get_pan(at86rf2xx_t *dev)
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{
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return dev->pan;
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}
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void at86rf2xx_set_pan(at86rf2xx_t *dev, uint16_t pan)
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{
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dev->pan = pan;
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DEBUG("pan0: %u, pan1: %u\n", (uint8_t)pan, pan >> 8);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__PAN_ID_0, (uint8_t)pan);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__PAN_ID_1, (pan >> 8));
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}
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int16_t at86rf2xx_get_txpower(at86rf2xx_t *dev)
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{
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#ifdef MODULE_NG_AT86RF212B
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uint8_t txpower = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_TX_PWR);
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DEBUG("txpower value: %x\n", txpower);
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return tx_pow_to_dbm(dev->freq, txpower);
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#else
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uint8_t txpower = at86rf2xx_reg_read(dev, AT86RF2XX_REG__PHY_TX_PWR)
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& AT86RF2XX_PHY_TX_PWR_MASK__TX_PWR;
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return tx_pow_to_dbm[txpower];
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#endif
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}
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void at86rf2xx_set_txpower(at86rf2xx_t *dev, int16_t txpower)
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{
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#ifdef MODULE_NG_AT86RF212B
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txpower += 25;
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#else
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txpower += 17;
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#endif
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if (txpower < 0) {
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txpower = 0;
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#ifdef MODULE_NG_AT86RF212B
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}
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else if (txpower > 36) {
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txpower = 36;
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#elif MODULE_NG_AT86RF233
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}
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else if (txpower > 21) {
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txpower = 21;
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#else
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}
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else if (txpower > 20) {
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txpower = 20;
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#endif
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}
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#ifdef MODULE_NG_AT86RF212B
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if (dev->freq == AT86RF2XX_FREQ_915MHZ) {
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_TX_PWR,
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dbm_to_tx_pow_915[txpower]);
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}
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else if (dev->freq == AT86RF2XX_FREQ_868MHZ) {
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_TX_PWR,
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dbm_to_tx_pow_868[txpower]);
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}
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else {
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return;
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}
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#else
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__PHY_TX_PWR,
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dbm_to_tx_pow[txpower]);
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#endif
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}
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uint8_t at86rf2xx_get_max_retries(at86rf2xx_t *dev)
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{
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return (at86rf2xx_reg_read(dev, AT86RF2XX_REG__XAH_CTRL_0) >> 4);
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}
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void at86rf2xx_set_max_retries(at86rf2xx_t *dev, uint8_t max)
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{
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max = (max > 7) ? 7 : max;
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uint8_t tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__XAH_CTRL_0);
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tmp &= ~(AT86RF2XX_XAH_CTRL_0__MAX_FRAME_RETRIES);
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tmp |= (max << 4);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__XAH_CTRL_0, tmp);
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}
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void at86rf2xx_set_option(at86rf2xx_t *dev, uint16_t option, bool state)
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{
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uint8_t tmp;
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DEBUG("set option %i to %i\n", option, state);
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/* set option field */
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if (state) {
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dev->options |= option;
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/* trigger option specific actions */
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switch (option) {
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case AT86RF2XX_OPT_CSMA:
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DEBUG("[at86rf2xx] opt: enabling CSMA mode (NOT IMPLEMENTED)\n");
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/* TODO: en/disable csma */
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break;
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case AT86RF2XX_OPT_PROMISCUOUS:
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DEBUG("[at86rf2xx] opt: enabling PROMISCUOUS mode\n");
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/* disable auto ACKs in promiscuous mode */
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tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__CSMA_SEED_1);
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tmp |= AT86RF2XX_CSMA_SEED_1__AACK_DIS_ACK;
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__CSMA_SEED_1, tmp);
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/* enable promiscuous mode */
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tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__XAH_CTRL_1);
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tmp |= AT86RF2XX_XAH_CTRL_1__AACK_PROM_MODE;
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__XAH_CTRL_1, tmp);
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break;
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case AT86RF2XX_OPT_AUTOACK:
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DEBUG("[at86rf2xx] opt: enabling auto ACKs\n");
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tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__CSMA_SEED_1);
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tmp &= ~(AT86RF2XX_CSMA_SEED_1__AACK_DIS_ACK);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__CSMA_SEED_1, tmp);
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break;
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case AT86RF2XX_OPT_TELL_RX_START:
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DEBUG("[at86rf2xx] opt: enabling SFD IRQ\n");
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tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__IRQ_MASK);
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tmp |= AT86RF2XX_IRQ_STATUS_MASK__RX_START;
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__IRQ_MASK, tmp);
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break;
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default:
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/* do nothing */
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break;
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}
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}
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else {
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dev->options &= ~(option);
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/* trigger option specific actions */
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switch (option) {
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case AT86RF2XX_OPT_CSMA:
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DEBUG("[at86rf2xx] opt: disabling CSMA mode (NOT IMPLEMENTED)\n");
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/* TODO: en/disable csma */
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break;
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case AT86RF2XX_OPT_PROMISCUOUS:
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DEBUG("[at86rf2xx] opt: disabling PROMISCUOUS mode\n");
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/* disable promiscuous mode */
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tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__XAH_CTRL_1);
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tmp &= ~(AT86RF2XX_XAH_CTRL_1__AACK_PROM_MODE);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__XAH_CTRL_1, tmp);
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/* re-enable AUTOACK only if the option is set */
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if (dev->options & AT86RF2XX_OPT_AUTOACK) {
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tmp = at86rf2xx_reg_read(dev,
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AT86RF2XX_REG__CSMA_SEED_1);
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tmp &= ~(AT86RF2XX_CSMA_SEED_1__AACK_DIS_ACK);
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__CSMA_SEED_1,
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tmp);
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}
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break;
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case AT86RF2XX_OPT_AUTOACK:
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DEBUG("[at86rf2xx] opt: disabling auto ACKs\n");
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tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__CSMA_SEED_1);
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tmp |= AT86RF2XX_CSMA_SEED_1__AACK_DIS_ACK;
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__CSMA_SEED_1, tmp);
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break;
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case AT86RF2XX_OPT_TELL_RX_START:
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DEBUG("[at86rf2xx] opt: disabling SFD IRQ\n");
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tmp = at86rf2xx_reg_read(dev, AT86RF2XX_REG__IRQ_MASK);
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tmp &= ~AT86RF2XX_IRQ_STATUS_MASK__RX_START;
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__IRQ_MASK, tmp);
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break;
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default:
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/* do nothing */
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break;
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}
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}
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}
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static inline void _set_state(at86rf2xx_t *dev, uint8_t state)
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{
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_STATE, state);
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while (at86rf2xx_get_status(dev) != state);
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}
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static inline void _force_trx_off(at86rf2xx_t *dev)
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{
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at86rf2xx_reg_write(dev, AT86RF2XX_REG__TRX_STATE, AT86RF2XX_TRX_STATE__FORCE_TRX_OFF);
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while (at86rf2xx_get_status(dev) != AT86RF2XX_STATE_TRX_OFF);
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}
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void at86rf2xx_set_state(at86rf2xx_t *dev, uint8_t state)
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{
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uint8_t old_state = at86rf2xx_get_status(dev);
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if (state == old_state) {
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return;
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}
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/* make sure there is no ongoing transmission, or state transition already
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* in progress */
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while (old_state == AT86RF2XX_STATE_BUSY_RX_AACK ||
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old_state == AT86RF2XX_STATE_BUSY_TX_ARET ||
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old_state == AT86RF2XX_STATE_IN_PROGRESS) {
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old_state = at86rf2xx_get_status(dev);
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}
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/* we need to go via PLL_ON if we are moving between RX_AACK_ON <-> TX_ARET_ON */
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if ((old_state == AT86RF2XX_STATE_RX_AACK_ON &&
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state == AT86RF2XX_STATE_TX_ARET_ON) ||
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(old_state == AT86RF2XX_STATE_TX_ARET_ON &&
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state == AT86RF2XX_STATE_RX_AACK_ON)) {
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_set_state(dev, AT86RF2XX_STATE_PLL_ON);
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}
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/* check if we need to wake up from sleep mode */
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else if (old_state == AT86RF2XX_STATE_SLEEP) {
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DEBUG("at86rf2xx: waking up from sleep mode\n");
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gpio_clear(dev->sleep_pin);
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while (at86rf2xx_get_status(dev) != AT86RF2XX_STATE_TRX_OFF);
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}
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if (state == AT86RF2XX_STATE_SLEEP) {
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||||
/* First go to TRX_OFF */
|
||||
_force_trx_off(dev);
|
||||
/* Go to SLEEP mode from TRX_OFF */
|
||||
gpio_set(dev->sleep_pin);
|
||||
} else {
|
||||
_set_state(dev, state);
|
||||
}
|
||||
}
|
||||
|
||||
void at86rf2xx_reset_state_machine(at86rf2xx_t *dev)
|
||||
{
|
||||
uint8_t old_state;
|
||||
|
||||
/* Wake up */
|
||||
gpio_clear(dev->sleep_pin);
|
||||
|
||||
/* Wait for any state transitions to complete before forcing TRX_OFF */
|
||||
do {
|
||||
old_state = at86rf2xx_get_status(dev);
|
||||
} while (old_state == AT86RF2XX_STATE_IN_PROGRESS);
|
||||
|
||||
_force_trx_off(dev);
|
||||
}
|
||||