Browse Source

fixed coding conventions (mostly by astyle)

dev/timer
Oliver Hahm 10 years ago
parent
commit
5d70656343
  1. 65
      cpu/arm_common/VIC.c
  2. 31
      cpu/arm_common/arm_cpu.c
  3. 94
      cpu/arm_common/bootloader.c
  4. 172
      cpu/arm_common/hwtimer_cpu.c
  5. 228
      cpu/arm_common/iap.c
  6. 2
      cpu/arm_common/include/VIC.h
  7. 2
      cpu/arm_common/include/arm_cpu.h
  8. 4
      cpu/arm_common/include/iap.h
  9. 61
      cpu/arm_common/profiling.c
  10. 107
      cpu/arm_common/syscalls.c
  11. 283
      cpu/cc430/cc110x_cc430.c
  12. 121
      cpu/cc430/cc430-adc.c
  13. 107
      cpu/cc430/cc430-gpioint.c
  14. 73
      cpu/cc430/cc430-rtc.c
  15. 36
      cpu/cc430/hwtimer_cc430.c
  16. 38
      cpu/cc430/include/cc430-adc.h
  17. 10
      cpu/cc430/include/cc430-rtc.h
  18. 28
      cpu/lpc214x/cpu.c
  19. 2
      cpu/lpc214x/include/lpc214x.h
  20. 81
      cpu/lpc2387/cpu.c
  21. 184
      cpu/lpc2387/gpioint/lpc2387-gpioint.c
  22. 4
      cpu/lpc2387/include/cpu.h
  23. 24
      cpu/lpc2387/include/lpc2387-rtc.h
  24. 480
      cpu/lpc2387/include/lpc23xx.h
  25. 166
      cpu/lpc2387/lpc2387-adc.c
  26. 103
      cpu/lpc2387/lpc2387-lpm.c
  27. 125
      cpu/lpc2387/lpc23xx-iap.c
  28. 1168
      cpu/lpc2387/mci/lpc2387-mci.c
  29. 273
      cpu/lpc2387/rtc/lpc2387-rtc.c
  30. 3
      cpu/msp430-common/atomic.c
  31. 72
      cpu/msp430-common/cpu.c
  32. 40
      cpu/msp430-common/flashrom.c
  33. 44
      cpu/msp430-common/hwtimer_cpu.c
  34. 40
      cpu/msp430-common/include/cpu.h
  35. 4
      cpu/msp430-common/include/hwtimer_cpu.h
  36. 2
      cpu/msp430-common/include/malloc.h
  37. 17
      cpu/msp430-common/include/time.h
  38. 33
      cpu/msp430-common/irq.c
  39. 112
      cpu/msp430-common/msp430-main.c
  40. 3
      cpu/msp430-common/startup.c
  41. 38
      cpu/msp430x16x/flashrom.c
  42. 36
      cpu/msp430x16x/hwtimer_msp430.c
  43. 2
      cpu/native/atomic_cpu.c
  44. 4
      cpu/native/cc110x_ng/cc110x_ng_cpu.c
  45. 65
      cpu/native/hwtimer_cpu.c
  46. 149
      cpu/native/irq_cpu.c
  47. 13
      cpu/native/lpm_cpu.c
  48. 29
      cpu/native/native_cpu.c
  49. 8
      cpu/native/rtc/posix-rtc.c
  50. 2
      cpu/native/startup.c

65
cpu/arm_common/VIC.c

@ -26,42 +26,43 @@ Boston, MA 02111-1307, USA. */
static inline unsigned __get_cpsr(void)
{
unsigned long retval;
asm volatile (" mrs %0, cpsr" : "=r" (retval) : /* no inputs */ );
return retval;
unsigned long retval;
asm volatile(" mrs %0, cpsr" : "=r"(retval) : /* no inputs */);
return retval;
}
int inISR(void)
{
int retval;
asm volatile (" mrs %0, cpsr" : "=r" (retval) : /* no inputs */ );
return (retval & INTMode) == 18;
int retval;
asm volatile(" mrs %0, cpsr" : "=r"(retval) : /* no inputs */);
return (retval & INTMode) == 18;
}
static inline void __set_cpsr(unsigned val)
{
asm volatile (" msr cpsr, %0" : /* no outputs */ : "r" (val) );
asm volatile(" msr cpsr, %0" : /* no outputs */ : "r"(val));
}
unsigned disableIRQ(void)
{
unsigned _cpsr;
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr | IRQ_MASK);
return _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr | IRQ_MASK);
return _cpsr;
}
unsigned restoreIRQ(unsigned oldCPSR)
{
unsigned _cpsr;
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr((_cpsr & ~IRQ_MASK) | (oldCPSR & IRQ_MASK));
return _cpsr;
_cpsr = __get_cpsr();
__set_cpsr((_cpsr & ~IRQ_MASK) | (oldCPSR & IRQ_MASK));
return _cpsr;
}
unsigned IRQenabled(void) {
unsigned IRQenabled(void)
{
unsigned _cpsr;
_cpsr = __get_cpsr();
@ -70,38 +71,38 @@ unsigned IRQenabled(void) {
unsigned enableIRQ(void)
{
unsigned _cpsr;
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr & ~IRQ_MASK);
return _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr & ~IRQ_MASK);
return _cpsr;
}
unsigned disableFIQ(void)
{
unsigned _cpsr;
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr | FIQ_MASK);
return _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr | FIQ_MASK);
return _cpsr;
}
unsigned restoreFIQ(unsigned oldCPSR)
{
unsigned _cpsr;
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr((_cpsr & ~FIQ_MASK) | (oldCPSR & FIQ_MASK));
return _cpsr;
_cpsr = __get_cpsr();
__set_cpsr((_cpsr & ~FIQ_MASK) | (oldCPSR & FIQ_MASK));
return _cpsr;
}
unsigned enableFIQ(void)
{
unsigned _cpsr;
unsigned _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr & ~FIQ_MASK);
return _cpsr;
_cpsr = __get_cpsr();
__set_cpsr(_cpsr & ~FIQ_MASK);
return _cpsr;
}

31
cpu/arm_common/arm_cpu.c

@ -16,7 +16,7 @@
* @}
*/
/**
*
*
*
*
*/
@ -41,7 +41,7 @@ void thread_yield(void)
char *thread_stack_init(void *task_func, void *stack_start, int stack_size)
{
unsigned int *stk;
stk = (unsigned int *) (stack_start + stack_size);
stk = (unsigned int *)(stack_start + stack_size);
stk--;
*stk = STACK_MARKER;
@ -52,10 +52,10 @@ char *thread_stack_init(void *task_func, void *stack_start, int stack_size)
/* set the stack pointer (SP) */
stk--;
*stk = (unsigned int) (stack_start + stack_size) - 4;
*stk = (unsigned int)(stack_start + stack_size) - 4;
/* build base stack */
for (int i = REGISTER_CNT; i>= 0 ; i--) {
for(int i = REGISTER_CNT; i >= 0 ; i--) {
stk--;
*stk = i;
}
@ -67,32 +67,35 @@ char *thread_stack_init(void *task_func, void *stack_start, int stack_size)
stk--;
*stk = (unsigned int) NEW_TASK_CPSR;
return (char*) stk;
return (char *)stk;
}
void thread_print_stack(void)
{
register void *stack = 0;
asm( "mov %0, sp" : "=r" (stack));
asm("mov %0, sp" : "=r"(stack));
register unsigned int *s = (unsigned int*) stack;
register unsigned int *s = (unsigned int *)stack;
printf("task: %X SP: %X\n", (unsigned int) active_thread, (unsigned int) stack);
register int i = 0;
s += 5;
while (*s != STACK_MARKER) {
while(*s != STACK_MARKER) {
printf("STACK (%u) addr=%X = %X \n", i, (unsigned int) s, (unsigned int) *s);
s++;
i++;
}
printf("STACK (%u)= %X \n",i,*s);
printf("STACK (%u)= %X \n", i, *s);
}
__attribute__((naked,noreturn)) void arm_reset(void)
__attribute__((naked, noreturn)) void arm_reset(void)
{
dINT();
WDTC = 0x00FFF;
WDMOD = 0x03;
WDFEED= 0xAA;
WDFEED= 0x55;
WDTC = 0x00FFF;
WDMOD = 0x03;
WDFEED = 0xAA;
WDFEED = 0x55;
while(1);
}

94
cpu/arm_common/bootloader.c

@ -48,58 +48,67 @@ and the mailinglist (subscription via web site)
#include <kernel.h>
#include <thread.h>
void FIQ_Routine (void) __attribute__ ((interrupt("FIQ")));
void FIQ_Routine(void) __attribute__((interrupt("FIQ")));
//void SWI_Routine (void) __attribute__ ((interrupt("SWI")));
void UNDEF_Routine (void) __attribute__ ((interrupt("UNDEF")));
void UNDEF_Routine(void) __attribute__((interrupt("UNDEF")));
void IRQ_Routine (void) {
void IRQ_Routine(void)
{
printf("Kernel Panic,\nEarly IRQ call\n");
while(1){};
while(1) {};
}
/*-----------------------------------------------------------------------------------*/
void FIQ_Routine (void) {
void FIQ_Routine(void)
{
printf("Kernel Panic,\nEarly FIQ call\n");
while(1){};
while(1) {};
}
/*-----------------------------------------------------------------------------------*/
void SWI_Routine (void) {
void SWI_Routine(void)
{
printf("Kernel Panic,\nEarly SWI call\n");
while(1){};
while(1) {};
}
/*-----------------------------------------------------------------------------------*/
void DEBUG_Routine (void) {
void DEBUG_Routine(void)
{
printf("DEBUG hit.");
while(1){};
while(1) {};
}
/*-----------------------------------------------------------------------------------*/
volatile int arm_abortflag = 0;
void abtorigin(const char* vector, u_long* lnk_ptr1)
void abtorigin(const char *vector, u_long *lnk_ptr1)
{
register u_long* lnk_ptr2;
register unsigned long* sp;
register u_long *lnk_ptr2;
register unsigned long *sp;
register unsigned int cpsr, spsr;
__asm__ __volatile__("mrs %0, cpsr" : "=r" (cpsr) ); // copy current mode
__asm__ __volatile__("mrs %0, spsr" : "=r" (spsr) ); // copy dabt generating mode
__asm__ __volatile__("msr cpsr_c, %0" :: "r" (spsr) ); // switch to dabt generating mode
__asm__ __volatile__("mov %0, lr" : "=r" (lnk_ptr2)); // copy lr
__asm__ __volatile__("mov %0, sp" : "=r" (sp)); // copy sp
__asm__ __volatile__("msr cpsr_c, %0" :: "r" (cpsr) ); // switch back to abt mode
__asm__ __volatile__("mrs %0, cpsr" : "=r"(cpsr)); // copy current mode
__asm__ __volatile__("mrs %0, spsr" : "=r"(spsr)); // copy dabt generating mode
__asm__ __volatile__("msr cpsr_c, %0" :: "r"(spsr)); // switch to dabt generating mode
__asm__ __volatile__("mov %0, lr" : "=r"(lnk_ptr2)); // copy lr
__asm__ __volatile__("mov %0, sp" : "=r"(sp)); // copy sp
__asm__ __volatile__("msr cpsr_c, %0" :: "r"(cpsr)); // switch back to abt mode
printf("#! %s abort at %p (0x%08lX) originating from %p (0x%08lX) in mode 0x%X\n",
vector, (void*)lnk_ptr1, *(lnk_ptr1), (void*)lnk_ptr2, *(lnk_ptr2), spsr
);
vector, (void *)lnk_ptr1, *(lnk_ptr1), (void *)lnk_ptr2, *(lnk_ptr2), spsr
);
stdio_flush();
exit(1);
}
/*-----------------------------------------------------------------------------------*/
void UNDEF_Routine (void) {
register u_long* lnk_ptr;
__asm__ __volatile__("sub %0, lr, #8" : "=r" (lnk_ptr) ); // get aborting instruction
void UNDEF_Routine(void)
{
register u_long *lnk_ptr;
__asm__ __volatile__("sub %0, lr, #8" : "=r"(lnk_ptr)); // get aborting instruction
if( arm_abortflag == 0 ) {
if(arm_abortflag == 0) {
arm_abortflag = 1; // remember state (if printing should fail again)
abtorigin("undef", lnk_ptr);
}
@ -107,11 +116,12 @@ void UNDEF_Routine (void) {
exit(1);
}
/*-----------------------------------------------------------------------------------*/
void PABT_Routine (void) {
register u_long* lnk_ptr;
__asm__ __volatile__("sub %0, lr, #8" : "=r" (lnk_ptr) ); // get aborting instruction
void PABT_Routine(void)
{
register u_long *lnk_ptr;
__asm__ __volatile__("sub %0, lr, #8" : "=r"(lnk_ptr)); // get aborting instruction
if( arm_abortflag == 0 ) {
if(arm_abortflag == 0) {
arm_abortflag = 1; // remember state (if printing should fail again)
abtorigin("pabt", lnk_ptr);
}
@ -119,11 +129,12 @@ void PABT_Routine (void) {
exit(1);
}
/*-----------------------------------------------------------------------------------*/
void DABT_Routine (void) {
register u_long* lnk_ptr;
__asm__ __volatile__("sub %0, lr, #8" : "=r" (lnk_ptr) ); // get aborting instruction
void DABT_Routine(void)
{
register u_long *lnk_ptr;
__asm__ __volatile__("sub %0, lr, #8" : "=r"(lnk_ptr)); // get aborting instruction
if( arm_abortflag == 0 ) {
if(arm_abortflag == 0) {
arm_abortflag = 1; // remember state (if printing should fail again)
abtorigin("data", lnk_ptr);
}
@ -140,27 +151,32 @@ bl_init_data(void)
extern unsigned int __bss_start;
extern unsigned int __bss_end;
register unsigned int* p1;
register unsigned int* p2;
register unsigned int* p3;
register unsigned int *p1;
register unsigned int *p2;
register unsigned int *p3;
// initialize data from flash
// (linker script ensures that data is 32-bit aligned)
p1 = &_etext;
p2 = &_data;
p3 = &_edata;
while( p2 < p3 )
while(p2 < p3) {
*p2++ = *p1++;
}
// clear bss
// (linker script ensures that bss is 32-bit aligned)
p1 = &__bss_start;
p2 = &__bss_end;
while( p1 < p2 )
while(p1 < p2) {
*p1++ = 0;
}
}
/*-----------------------------------------------------------------------------------*/
void bootloader(void) {
void bootloader(void)
{
extern void bl_uart_init(void);
extern void bl_init_ports(void);
extern void bl_init_clks(void);

172
cpu/arm_common/hwtimer_cpu.c

@ -5,8 +5,10 @@
* @brief ARM kernel timer CPU dependent functions implementation
*
* @author Freie Universität Berlin, Computer Systems & Telematics
* @author INRIA
* @author Thomas Hillebrandt <hillebra@inf.fu-berlin.de>
* @author Heiko Will <hwill@inf.fu-berlin.de>
* @author Oliver Hahm <oliver.hahm@inria.fr>
*
*/
@ -18,87 +20,98 @@
#define VULP(x) ((volatile unsigned long*) (x))
/// High level interrupt handler
/*/ High level interrupt handler */
static void (*int_handler)(int);
/// Timer 0-3 interrupt handler
/*/ Timer 0-3 interrupt handler */
static void timer_irq(void) __attribute__((interrupt("IRQ")));
inline static unsigned long get_base_address(short timer) {
return (volatile unsigned long)(TMR0_BASE_ADDR + (timer / 8) * 0x6C000 + (timer/4 - (timer/8)*2) * 0x4000);
inline static unsigned long get_base_address(short timer)
{
return (volatile unsigned long)(TMR0_BASE_ADDR + (timer / 8) * 0x6C000 + (timer / 4 - (timer / 8) * 2) * 0x4000);
}
static void timer_irq(void)
{
short timer = 0;
if (T0IR) {
if(T0IR) {
timer = 0;
} else if (T1IR) {
}
else if(T1IR) {
timer = 4;
} else if (T2IR) {
}
else if(T2IR) {
timer = 8;
}
volatile unsigned long base = get_base_address(timer);
if (*VULP(base+TXIR) & BIT0) {
*VULP(base+TXMCR) &= ~BIT0;
*VULP(base+TXIR) = BIT0;
if(*VULP(base + TXIR) & BIT0) {
*VULP(base + TXMCR) &= ~BIT0;
*VULP(base + TXIR) = BIT0;
int_handler(timer);
}
if (*VULP(base+TXIR) & BIT1) {
*VULP(base+TXMCR) &= ~BIT3;
*VULP(base+TXIR) = BIT1;
if(*VULP(base + TXIR) & BIT1) {
*VULP(base + TXMCR) &= ~BIT3;
*VULP(base + TXIR) = BIT1;
int_handler(timer + 1);
}
if (*VULP(base+TXIR) & BIT2) {
*VULP(base+TXMCR) &= ~BIT6;
*VULP(base+TXIR) = BIT2;
if(*VULP(base + TXIR) & BIT2) {
*VULP(base + TXMCR) &= ~BIT6;
*VULP(base + TXIR) = BIT2;
int_handler(timer + 2);
}
if (*VULP(base+TXIR) & BIT3) {
*VULP(base+TXMCR) &= ~BIT9;
*VULP(base+TXIR) = BIT3;
if(*VULP(base + TXIR) & BIT3) {
*VULP(base + TXMCR) &= ~BIT9;
*VULP(base + TXIR) = BIT3;
int_handler(timer + 3);
}
VICVectAddr = 0; // acknowledge interrupt (if using VIC IRQ)
VICVectAddr = 0; /* acknowledge interrupt (if using VIC IRQ) */
}
static void timer0_init(uint32_t cpsr) {
PCONP |= PCTIM0; // power up timer
T0TCR = 2; // disable and reset timer
T0MCR = 0; // disable compare
T0CCR = 0; // capture is disabled
T0EMR = 0; // no external match output
T0PR = cpsr; // set prescaler
static void timer0_init(uint32_t cpsr)
{
PCONP |= PCTIM0; /* power up timer */
T0TCR = 2; /* disable and reset timer */
T0MCR = 0; /* disable compare */
T0CCR = 0; /* capture is disabled */
T0EMR = 0; /* no external match output */
T0PR = cpsr; /* set prescaler */
install_irq(TIMER0_INT, &timer_irq, 1);
T0TCR = 1; // reset counter
T0TCR = 1; /* reset counter */
}
static void timer1_init(uint32_t cpsr) {
PCONP |= PCTIM1; // power up timer
T1TCR = 2; // disable and reset timer
T1MCR = 0; // disable compare
T1CCR = 0; // capture is disabled
T1EMR = 0; // no external match output
T1PR = cpsr; // set prescaler
static void timer1_init(uint32_t cpsr)
{
PCONP |= PCTIM1; /* power up timer */
T1TCR = 2; /* disable and reset timer */
T1MCR = 0; /* disable compare */
T1CCR = 0; /* capture is disabled */
T1EMR = 0; /* no external match output */
T1PR = cpsr; /* set prescaler */
install_irq(TIMER1_INT, &timer_irq, 1);
T1TCR = 1; // reset counter
T1TCR = 1; /* reset counter */
}
static void timer2_init(uint32_t cpsr) {
PCONP |= PCTIM2; // power up timer
T2TCR = 2; // disable and reset timer
T2MCR = 0; // disable compare
T2CCR = 0; // capture is disabled
T2EMR = 0; // no external match output
T2PR = cpsr; // set prescaler
static void timer2_init(uint32_t cpsr)
{
PCONP |= PCTIM2; /* power up timer */
T2TCR = 2; /* disable and reset timer */
T2MCR = 0; /* disable compare */
T2CCR = 0; /* capture is disabled */
T2EMR = 0; /* no external match output */
T2PR = cpsr; /* set prescaler */
install_irq(TIMER2_INT, &timer_irq, 1);
T2TCR = 1; // reset counter
T2TCR = 1; /* reset counter */
}
void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) {
void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu)
{
uint32_t cpsr;
int_handler = handler;
cpu_clock_scale(fcpu, HWTIMER_SPEED, &cpsr);
@ -109,7 +122,8 @@ void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu) {
/*---------------------------------------------------------------------------*/
void hwtimer_arch_enable_interrupt(void) {
void hwtimer_arch_enable_interrupt(void)
{
VICIntEnable = 1 << TIMER0_INT; /* Enable Interrupt */
VICIntEnable = 1 << TIMER1_INT; /* Enable Interrupt */
VICIntEnable = 1 << TIMER2_INT; /* Enable Interrupt */
@ -117,7 +131,8 @@ void hwtimer_arch_enable_interrupt(void) {
/*---------------------------------------------------------------------------*/
void hwtimer_arch_disable_interrupt(void) {
void hwtimer_arch_disable_interrupt(void)
{
VICIntEnClr = 1 << TIMER0_INT; /* Disable Interrupt */
VICIntEnClr = 1 << TIMER1_INT; /* Disable Interrupt */
VICIntEnClr = 1 << TIMER2_INT; /* Disable Interrupt */
@ -125,56 +140,61 @@ void hwtimer_arch_disable_interrupt(void) {
/*---------------------------------------------------------------------------*/
void hwtimer_arch_set(unsigned long offset, short timer) {
// Calculate base address of timer register
// Timer 0-3 are matched to TIMER0
// Timer 4-7 are matched to TIMER1
// Timer 8-11 are matched to TIMER2
void hwtimer_arch_set(unsigned long offset, short timer)
{
/* Calculate base address of timer register */
/* Timer 0-3 are matched to TIMER0 */
/* Timer 4-7 are matched to TIMER1 */
/* Timer 8-11 are matched to TIMER2 */
volatile unsigned long base = get_base_address(timer);
// Calculate match register address of corresponding timer
/* Calculate match register address of corresponding timer */
timer %= 4;
unsigned long cpsr = disableIRQ();
volatile unsigned long* addr = VULP(base + TXMR0 + 4 * timer);
// Calculate match register value
volatile unsigned long *addr = VULP(base + TXMR0 + 4 * timer);
/* Calculate match register value */
unsigned long value = *VULP(base + TXTC) + offset;
*addr = value; // set match register
*VULP(base+TXIR) = 0x01 << timer; // reset interrupt register value for corresponding match register
*VULP(base+TXMCR) &= ~(7 << (3 * timer)); // Clear all bits
*VULP(base+TXMCR) |= (MR0I << (3 * timer)); // enable interrupt for match register
*addr = value; /* set match register */
*VULP(base + TXIR) = 0x01 << timer; /* reset interrupt register value for corresponding match register */
*VULP(base + TXMCR) &= ~(7 << (3 * timer)); /* Clear all bits */
*VULP(base + TXMCR) |= (MR0I << (3 * timer)); /* enable interrupt for match register */
restoreIRQ(cpsr);
}
void hwtimer_arch_set_absolute(unsigned long value, short timer) {
// Calculate base address of timer register
// Timer 0-3 are matched to TIMER0
// Timer 4-7 are matched to TIMER1
// Timer 8-11 are matched to TIMER2
void hwtimer_arch_set_absolute(unsigned long value, short timer)
{
/* Calculate base address of timer register */
/* Timer 0-3 are matched to TIMER0 */
/* Timer 4-7 are matched to TIMER1 */
/* Timer 8-11 are matched to TIMER2 */
volatile unsigned long base = get_base_address(timer);
// Calculate match register address of corresponding timer
/* Calculate match register address of corresponding timer */
timer %= 4;
volatile unsigned long* addr = VULP(base + TXMR0 + 4 * timer);
// Calculate match register value
*addr = value; // set match register
*VULP(base+TXIR) = 0x01 << timer; // reset interrupt register value for corresponding match register
*VULP(base+TXMCR) &= ~(7 << (3 * timer)); // Clear all bits
*VULP(base+TXMCR) |= (MR0I << (3 * timer)); // enable interrupt for match register
volatile unsigned long *addr = VULP(base + TXMR0 + 4 * timer);
/* Calculate match register value */
*addr = value; /* set match register */
*VULP(base + TXIR) = 0x01 << timer; /* reset interrupt register value for corresponding match register */
*VULP(base + TXMCR) &= ~(7 << (3 * timer)); /* Clear all bits */
*VULP(base + TXMCR) |= (MR0I << (3 * timer)); /* enable interrupt for match register */
}
/*---------------------------------------------------------------------------*/
void hwtimer_arch_unset(short timer) {
void hwtimer_arch_unset(short timer)
{
volatile unsigned long base = get_base_address(timer);
timer %= 4;
*VULP(base+TXMCR) &= ~(MR0I << (3 * timer)); // disable interrupt for match register
*VULP(base+TXIR) = 0x01 << timer; // reset interrupt register value for corresponding match register
*VULP(base + TXMCR) &= ~(MR0I << (3 * timer)); /* disable interrupt for match register */
*VULP(base + TXIR) = 0x01 << timer; /* reset interrupt register value for corresponding match register */
}
/*---------------------------------------------------------------------------*/
unsigned long hwtimer_arch_now(void) {
unsigned long hwtimer_arch_now(void)
{
return T0TC;
}
void hwtimer_arch_setcounter(unsigned int val) {
void hwtimer_arch_setcounter(unsigned int val)
{
T0TC = val;
}

228
cpu/arm_common/iap.c

@ -1,8 +1,7 @@
/* iap driver
*
*
* based on iap driver for LPC2148 Controller made by Andreas Weschenfelder, 2008
* see:
*
*
*/
#include <irq.h>
@ -14,11 +13,11 @@
#include <debug.h>
/* pointer to reserved flash rom section for configuration data */
__attribute ((aligned(256))) char configmem[256] __attribute__ ((section (".configmem")));
__attribute((aligned(256))) char configmem[256] __attribute__((section(".configmem")));
static unsigned int iap_command[5]; // contains parameters for IAP command
static unsigned int iap_result[2]; // contains results
typedef void (*IAP) (unsigned int[],unsigned int[]); // typedefinition for IAP entry function
typedef void (*IAP)(unsigned int[], unsigned int[]); // typedefinition for IAP entry function
IAP IAP_Entry;
/* some function prototypes */
@ -32,100 +31,101 @@ static uint32_t iap(uint32_t code, uint32_t p1, uint32_t p2, uint32_t p3, uint32
/******************************************************************************
* P U B L I C F U N C T I O N S
*****************************************************************************/
uint8_t flashrom_write(uint8_t *dst, char *src, size_t size) {
char err;
unsigned intstate;
uint8_t sec;
//buffer_vic = VICIntEnable; // save interrupt enable
//VICIntEnClr = 0xFFFFFFFF; // clear vic
sec = iap_get_sector((uint32_t) dst);
if (sec == INVALID_ADDRESS) {
uint8_t flashrom_write(uint8_t *dst, char *src, size_t size)
{
char err;
unsigned intstate;
uint8_t sec;
sec = iap_get_sector((uint32_t) dst);
if(sec == INVALID_ADDRESS) {
DEBUG("Invalid address\n");
return 0;
}
/* check sector */
if(blank_check_sector(sec, sec) == SECTOR_NOT_BLANK) {
DEBUG("Warning: Sector %i not blank\n", sec);
}
if(blank_check_sector(sec, sec) == SECTOR_NOT_BLANK) {
DEBUG("Warning: Sector %i not blank\n", sec);
}
/* prepare sector */
err = prepare_sectors(sec, sec);
if (err) {
DEBUG("\n-- ERROR: PREPARE_SECTOR_FOR_WRITE_OPERATION: %u\n", err);
/* set interrupts back and return */
// VICIntEnable = buffer_vic;
return 0;
}
err = prepare_sectors(sec, sec);
if(err) {
DEBUG("\n-- ERROR: PREPARE_SECTOR_FOR_WRITE_OPERATION: %u\n", err);
return 0;
}
/* write flash */
else {
else {
intstate = disableIRQ();
err = copy_ram_to_flash((uint32_t) dst, (uint32_t) src, 256);
err = copy_ram_to_flash((uint32_t) dst, (uint32_t) src, 256);
restoreIRQ(intstate);
if(err) {
DEBUG("ERROR: COPY_RAM_TO_FLASH: %u\n", err);
if(err) {
DEBUG("ERROR: COPY_RAM_TO_FLASH: %u\n", err);
/* set interrupts back and return */
restoreIRQ(intstate);
// VICIntEnable = buffer_vic;
return 0;
}
return 0;
}
/* check result */
else {
err = compare((uint32_t) dst, (uint32_t) src, 256);
if (err) {
DEBUG("ERROR: COMPARE: %i (at position %u)\n", err, iap_result[1]);
/* set interrupts back and return */
// VICIntEnable = buffer_vic;
return 0;
}
else
{
DEBUG("Data successfully written!\n");
/* set interrupts back and return */
// VICIntEnable = buffer_vic;
return 1;
}
}
}
else {
err = compare((uint32_t) dst, (uint32_t) src, 256);
if(err) {
DEBUG("ERROR: COMPARE: %i (at position %u)\n", err, iap_result[1]);
return 0;
}
else {
DEBUG("Data successfully written!\n");
return 1;
}
}
}
}
uint8_t flashrom_erase(uint8_t *addr) {
uint8_t flashrom_erase(uint8_t *addr)
{
uint8_t sec = iap_get_sector((uint32_t) addr);
unsigned intstate;
if (sec == INVALID_ADDRESS) {
if(sec == INVALID_ADDRESS) {
DEBUG("Invalid address\n");
return 0;
}
/* check sector */
if (!blank_check_sector(sec, sec)) {
DEBUG("Sector already blank!\n");
return 1;
}
/* prepare sector */
if (prepare_sectors(sec, sec)) {
DEBUG("-- ERROR: PREPARE_SECTOR_FOR_WRITE_OPERATION --\n");
return 0;
}
if(!blank_check_sector(sec, sec)) {
DEBUG("Sector already blank!\n");
return 1;
}
/* prepare sector */
if(prepare_sectors(sec, sec)) {
DEBUG("-- ERROR: PREPARE_SECTOR_FOR_WRITE_OPERATION --\n");
return 0;
}
intstate = disableIRQ();
/* erase sector */
if (erase_sectors(sec, sec)) {
DEBUG("-- ERROR: ERASE SECTOR --\n");
if(erase_sectors(sec, sec)) {
DEBUG("-- ERROR: ERASE SECTOR --\n");
restoreIRQ(intstate);
return 0;
}
return 0;
}
restoreIRQ(intstate);
/* check again */
if (blank_check_sector(sec, sec)) {
DEBUG("-- ERROR: BLANK_CHECK_SECTOR\n");
return 0;
}
DEBUG("Sector successfully erased.\n");
return 1;
if(blank_check_sector(sec, sec)) {
DEBUG("-- ERROR: BLANK_CHECK_SECTOR\n");
return 0;
}
DEBUG("Sector successfully erased.\n");
return 1;
}
@ -133,31 +133,32 @@ uint8_t flashrom_erase(uint8_t *addr) {
* PRIVATE FUNCTIONS
*****************************************************************************/
static uint32_t iap(uint32_t code, uint32_t p1, uint32_t p2, uint32_t p3, uint32_t p4) {
iap_command[0] = code; // set command code
iap_command[1] = p1; // set 1st param
iap_command[2] = p2; // set 2nd param
iap_command[3] = p3; // set 3rd param
iap_command[4] = p4; // set 4th param
((void (*)())0x7ffffff1)(iap_command, iap_result); // IAP entry point
return *iap_result;
static uint32_t iap(uint32_t code, uint32_t p1, uint32_t p2, uint32_t p3, uint32_t p4)
{
iap_command[0] = code; // set command code
iap_command[1] = p1; // set 1st param
iap_command[2] = p2; // set 2nd param
iap_command[3] = p3; // set 3rd param
iap_command[4] = p4; // set 4th param
((void (*)())0x7ffffff1)(iap_command, iap_result); // IAP entry point
return *iap_result;
}
/******************************************************************************
* Function: blank_check_sector
*
* Description: This command is used to blank check a sector or multiple sectors
*
* Description: This command is used to blank check a sector or multiple sectors
* of on-chip Flash memory. To blank check a single sector use the
* same "Start" and "End" sector numbers.
* Command: 53
* Param0: Start Sector Number
* Param1: End Sector Number (should be greater than equal to the start
* Param1: End Sector Number (should be greater than equal to the start
* sector number)
*
*
* Parameters: long tmp_sect1: Param0
* long tmp_sect2: Param1
*
*
* Return: Code CMD_SUCCESS |
* BUSY |
* SECTOR_NOT_BLANK |
@ -165,29 +166,30 @@ static uint32_t iap(uint32_t code, uint32_t p1, uint32_t p2, uint32_t p3, uint32
* Result0: Offset of the first non blank word location if the status code is SECTOR_NOT_BLANK.
* Result1: Contents of non blank wird location.
*****************************************************************************/
uint32_t blank_check_sector(uint32_t tmp_sect1, uint32_t tmp_sect2) {
return iap(BLANK_CHECK_SECTOR, tmp_sect1, tmp_sect2, 0 , 0);
uint32_t blank_check_sector(uint32_t tmp_sect1, uint32_t tmp_sect2)
{
return iap(BLANK_CHECK_SECTOR, tmp_sect1, tmp_sect2, 0 , 0);
}
/******************************************************************************
* Function: copy_ram_to_flash
*
* Description: This command is used to programm the flash memory. the affected should be
* prepared first by calling "Prepare Sector for Write Operation" command. the
*
* Description: This command is used to programm the flash memory. the affected should be
* prepared first by calling "Prepare Sector for Write Operation" command. the
* affected sectors are automatically protected again once the copy command is
* successfully executed. the boot sector cannot be written by this command.
* Command: 51
* Param0: (DST) Destination Flash adress where data bytes are to be written.
* Param0: (DST) Destination Flash adress where data bytes are to be written.
* This address should be a 512 byte boundary.
* Param1: (SRC) Source RAM adress from which data byre are to be read.
* Param2: Number of bytes to be written. Should be 512 | 1024 | 4096 | 8192.
* Param3: System Clock Frequency (CCLK) in KHz.
*
*
* Parameters: long tmp_adr_dst: Param0
* long tmp_adr_src: Param1
* long tmp_size: Param2
*
*
* Return: Code CMD_SUCCESS |
* SRC_ADDR_ERROR (Address not on word boundary) |
* DST_ADDR_ERROR (Address not on correct boundary) |
@ -197,14 +199,15 @@ uint32_t blank_check_sector(uint32_t tmp_sect1, uint32_t tmp_sect2) {
* SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION |
* BUSY
*****************************************************************************/
uint32_t copy_ram_to_flash(uint32_t tmp_adr_dst, uint32_t tmp_adr_src, uint32_t tmp_size) {
return iap(COPY_RAM_TO_FLASH, tmp_adr_dst, tmp_adr_src, tmp_size, _XTAL);
uint32_t copy_ram_to_flash(uint32_t tmp_adr_dst, uint32_t tmp_adr_src, uint32_t tmp_size)
{
return iap(COPY_RAM_TO_FLASH, tmp_adr_dst, tmp_adr_src, tmp_size, _XTAL);
}
/******************************************************************************
* Function: Prepare_Sector
*
*
* Description: This command must be executed before executing "Copy RAM to Flash" or "Erase Sector(s)"
* command. Successful execution of the "Copy RAM to Flash" or "Erase Sector(s)" command causes
* relevant sectors to be protected again. The boot sector can not be prepared by this command. To
@ -212,22 +215,23 @@ uint32_t copy_ram_to_flash(uint32_t tmp_adr_dst, uint32_t tmp_adr_src, uint32_t
* Command code: 50
* Param0: Start Sector Number
* Param1: End Sector Number: Should be greater than or equal to start sector number.
*
*
* Parameters: long tmp_sect1: Param0
* long tmp_sect2: Param1
*
*
* Return: Code CMD_SUCCESS |
* BUSY |
* INVALID_SECTOR
*****************************************************************************/
uint32_t prepare_sectors(uint32_t tmp_sect1, uint32_t tmp_sect2) {
return iap(PREPARE_SECTOR_FOR_WRITE_OPERATION, tmp_sect1, tmp_sect2, 0 , 0);
uint32_t prepare_sectors(uint32_t tmp_sect1, uint32_t tmp_sect2)
{
return iap(PREPARE_SECTOR_FOR_WRITE_OPERATION, tmp_sect1, tmp_sect2, 0 , 0);
}
/******************************************************************************
* Function: erase_sectors
*
*
* Description: This command is used to erase a sector or multiple sectors of on-chip Flash memory. The boot
* sector can not be erased by this command. To erase a single sector use the same "Start" and "End"
* sector numbers.
@ -235,23 +239,24 @@ uint32_t prepare_sectors(uint32_t tmp_sect1, uint32_t tmp_sect2) {
* Param0: Start Sector Number
* Param1: End Sector Number: Should be greater than or equal to start sector number.
* Param2: System Clock Frequency (CCLK) in KHz.
*
*
* Parameters: long tmp_sect1: Param0
* long tmp_sect2: Param1
*
*
* Return: Code CMD_SUCCESS |
* BUSY |
* SECTOR_NOT_PREPARED_FOR_WRITE_OPERATION |
* INVALID_SECTOR
*****************************************************************************/
uint32_t erase_sectors(uint32_t tmp_sect1, uint32_t tmp_sect2) {
return iap(ERASE_SECTOR, tmp_sect1, tmp_sect2, _XTAL, 0);
uint32_t erase_sectors(uint32_t tmp_sect1, uint32_t tmp_sect2)
{
return iap(ERASE_SECTOR, tmp_sect1, tmp_sect2, _XTAL, 0);
}
/******************************************************************************
* Function: compare
*
*
* Description: This command is used to compare the memory contents at two locations. compare result may not
* be correct when source or destination address contains any of the first 64 bytes starting
* from address zero. First 64 bytes can be re-mapped to RAM.
@ -261,11 +266,11 @@ uint32_t erase_sectors(uint32_t tmp_sect1, uint32_t tmp_sect2) {
* Param1(SRC): Starting Flash or RAM address from where data bytes are to be
* address should be a word boundary.
* Param2: Number of bytes to be compared. Count should be in multiple of 4.
*
*
* Parameters: long tmp_adr_dst
* long tmp_adr_src
* long tmp_adr_src
* long tmp_size
*
*
* Return: Code CMD_SUCCESS |
* COMPARE_ERROR |
* COUNT_ERROR (Byte count is not multiple of 4) |
@ -273,6 +278,7 @@ uint32_t erase_sectors(uint32_t tmp_sect1, uint32_t tmp_sect2) {
* ADDR_NOT_MAPPED
* Result0: Offset of the first mismatch if the Status Code is COMPARE_ERROR.
*****************************************************************************/
uint32_t compare(uint32_t tmp_adr_dst, uint32_t tmp_adr_src, uint32_t tmp_size) {
return iap(COMPARE, tmp_adr_dst, tmp_adr_src, tmp_size, 0);
uint32_t compare(uint32_t tmp_adr_dst, uint32_t tmp_adr_src, uint32_t tmp_size)
{
return iap(COMPARE, tmp_adr_dst, tmp_adr_src, tmp_size, 0);
}

2
cpu/arm_common/include/VIC.h

@ -90,7 +90,7 @@ Boston, MA 02111-1307, USA. */
#include <stdbool.h>
#include "cpu.h"
bool cpu_install_irq( int IntNumber, void *HandlerAddr, int Priority );
bool cpu_install_irq(int IntNumber, void *HandlerAddr, int Priority);
/** @} */
#endif /*ARMVIC_H_*/

2
cpu/arm_common/include/arm_cpu.h

@ -13,7 +13,7 @@ extern void eINT(void);
void thread_yield(void);
uint32_t get_system_speed(void);
void cpu_clock_scale(uint32_t source, uint32_t target, uint32_t* prescale);
void cpu_clock_scale(uint32_t source, uint32_t target, uint32_t *prescale);
void arm_reset(void);
void stdio_flush(void);

4
cpu/arm_common/include/iap.h

@ -40,9 +40,9 @@
/*
* @brief: Converts 'addr' to sector number
* @note: Sector table (Users Manual P. 610)
*
*
* @param addr Flash address
*
*
* @return Sector number. 0xFF on error
*/
uint8_t iap_get_sector(uint32_t addr);

61
cpu/arm_common/profiling.c

@ -23,50 +23,59 @@ static uint8_t function_pending = 0;
static uint16_t traced_functions = 0;
static uint8_t profiling = 0;
void __attribute__((__no_instrument_function__)) profiling_init(void) {
void __attribute__((__no_instrument_function__)) profiling_init(void)
{
uint16_t i;
for (i = 0; i < MAX_TRACED_FUNCTIONS; i++) {
for(i = 0; i < MAX_TRACED_FUNCTIONS; i++) {
functions[i].address = 0;
functions[i].time = 0;
functions[i].consumption = 0;
functions[i].counter = 0;
}
for (i = 0; i < PROFILING_STACK_SIZE; i++) {
for(i = 0; i < PROFILING_STACK_SIZE; i++) {
profiling_stack[i] = 0;
}
ltc4150_start();
profiling = 1;
}
static int16_t __attribute__((__no_instrument_function__)) get_function_index(uint32_t addr) {
static int16_t __attribute__((__no_instrument_function__)) get_function_index(uint32_t addr)
{
uint16_t i;
for (i = 0; i < MAX_TRACED_FUNCTIONS; i++) {
if (functions[i].address == addr) {
for(i = 0; i < MAX_TRACED_FUNCTIONS; i++) {
if(functions[i].address == addr) {
return i;
}
}
return -1;
}
void __attribute__((__no_instrument_function__)) __cyg_profile_func_enter (void *func, void *caller) {
if (!profiling) {
void __attribute__((__no_instrument_function__)) __cyg_profile_func_enter(void *func, void *caller)
{
if(!profiling) {
return;
}
int16_t idx = get_function_index((uint32_t) func);
/* if function is not yet on traced */
if ((idx < 0) && (traced_functions < MAX_TRACED_FUNCTIONS)) {
if((idx < 0) && (traced_functions < MAX_TRACED_FUNCTIONS)) {
idx = traced_functions++;
functions[idx].address = (uint32_t) func;
}
/* maximu of traceable functions reached */
else if (idx < 0) {
else if(idx < 0) {
return;
}
/* check if a profiled function is pending */
if (function_pending && (profiling_stack[profiling_sp] != idx)) {
if(function_pending && (profiling_stack[profiling_sp] != idx)) {
functions[idx].time += T0TC - functions[idx].start_time;
//functions[idx].consumption += ltc4150_get_intcount() - functions[idx].consumption_start;
functions[idx].consumption += ltc4150_get_total_mAh() - functions[idx].consumption_start;
@ -82,33 +91,41 @@ void __attribute__((__no_instrument_function__)) __cyg_profile_func_enter (void
functions[idx].consumption_start = ltc4150_get_total_mAh();
// functions[idx].consumption_start = ltc4150_get_intcount();
}
void __attribute__((__no_instrument_function__)) __cyg_profile_func_exit (void *func, void *caller) {
if (!profiling) {
void __attribute__((__no_instrument_function__)) __cyg_profile_func_exit(void *func, void *caller)
{
if(!profiling) {
return;
}
int16_t idx = get_function_index((uint32_t) func);
if (idx >= 0) {
if(idx >= 0) {
functions[idx].time += T0TC - functions[idx].start_time;
//functions[idx].consumption += ltc4150_get_intcount() - functions[idx].consumption_start;
functions[idx].consumption += ltc4150_get_total_mAh() - functions[idx].consumption_start;
}
/* reset pending flag */
function_pending = 0;
/* if another function is pending */
if (profiling_sp) {
if (--profiling_sp) {
if(profiling_sp) {
if(--profiling_sp) {
functions[profiling_stack[profiling_sp]].start_time = T0TC;
functions[profiling_stack[profiling_sp]].consumption_start = ltc4150_get_total_mAh();
}
}
}
void profiling_stats(void) {
void profiling_stats(void)
{
uint16_t i;
for (i = 0; i < traced_functions; i++) {
// printf("Function @%04lX was running %u times for %lu ticks, consuming %li ltc-ticks\n", functions[i].address, functions[i].counter, functions[i].time, functions[i].consumption);
printf("Function @%04lX was running %u times for %lu ticks, consuming %lf mAh\n", functions[i].address, functions[i].counter, functions[i].time, functions[i].consumption);
for(i = 0; i < traced_functions; i++) {
// printf("Function @%04lX was running %u times for %lu ticks, consuming %li ltc-ticks\n", functions[i].address, functions[i].counter, functions[i].time, functions[i].consumption);
printf("Function @%04lX was running %u times for %lu ticks, consuming %lf mAh\n", functions[i].address, functions[i].counter, functions[i].time, functions[i].consumption);
}
puts("________________________________________________________");
}

107
cpu/arm_common/syscalls.c

@ -74,23 +74,23 @@ extern uintptr_t __heap3_start; ///< start of heap memory space
extern uintptr_t __heap3_max; ///< maximum for end of heap memory space
/// current position in heap
static caddr_t heap[NUM_HEAPS] = {(caddr_t)&__heap1_start,(caddr_t)&__heap3_start,(caddr_t)&__heap2_start}; // add heap3 before heap2 cause Heap3 address is lower then addr of heap2
/// maximum position in heap
static const caddr_t heap_max[NUM_HEAPS] = {(caddr_t)&__heap1_max,(caddr_t)&__heap3_max,(caddr_t)&__heap2_max};
// start position in heap
static const caddr_t heap_start[NUM_HEAPS] = {(caddr_t)&__heap1_start,(caddr_t)&__heap3_start,(caddr_t)&__heap2_start};
// current heap in use
/* current position in heap */
static caddr_t heap[NUM_HEAPS] = {(caddr_t) &__heap1_start, (caddr_t) &__heap3_start, (caddr_t) &__heap2_start}; // add heap3 before heap2 cause Heap3 address is lower then addr of heap2
/* maximum position in heap */
static const caddr_t heap_max[NUM_HEAPS] = {(caddr_t) &__heap1_max, (caddr_t) &__heap3_max, (caddr_t) &__heap2_max};
/* start position in heap */
static const caddr_t heap_start[NUM_HEAPS] = {(caddr_t) &__heap1_start, (caddr_t) &__heap3_start, (caddr_t) &__heap2_start};
/* current heap in use */
volatile static uint8_t iUsedHeap = 0;
/** @} */
/*-----------------------------------------------------------------------------------*/
void heap_stats(void)
void heap_stats(void)
{
for(int i = 0; i < NUM_HEAPS; i++)
printf("# heap %i: %p -- %p -> %p (%li of %li free)\n", i, heap_start[i], heap[i], heap_max[i],
(uint32_t)heap_max[i] - (uint32_t)heap[i], (uint32_t)heap_max[i] - (uint32_t)heap_start[i]);
(uint32_t)heap_max[i] - (uint32_t)heap[i], (uint32_t)heap_max[i] - (uint32_t)heap_start[i]);
}
/*-----------------------------------------------------------------------------------*/
@ -100,7 +100,7 @@ void __assert_func(const char *file, int line, const char *func, const char *fai
trace_number(TRACELOG_EV_ASSERTION, line);
syslog(SL_EMERGENCY, "assert", "%s() in %s:%u\n", func, file, line);
#endif
printf("#! assertion %s failed\n\t%s() in %s:%u\n", failedexpr, func, file, line );
printf("#! assertion %s failed\n\t%s() in %s:%u\n", failedexpr, func, file, line);
_exit(3);
}
/*-----------------------------------------------------------------------------------*/
@ -111,8 +111,7 @@ void __assert(const char *file, int line, const char *failedexpr)
/*-----------------------------------------------------------------------------------*/
caddr_t _sbrk_r(struct _reent *r, size_t incr)
{
if(incr < 0)
{
if(incr < 0) {
puts("[syscalls] Negative Values for _sbrk_r are not supported");
r->_errno = ENOMEM;
return NULL;
@ -121,17 +120,18 @@ caddr_t _sbrk_r(struct _reent *r, size_t incr)
uint32_t cpsr = disableIRQ();
/* check all heaps for a chunk of the requested size */
for (; iUsedHeap < NUM_HEAPS; iUsedHeap++ ) {
for(; iUsedHeap < NUM_HEAPS; iUsedHeap++) {
caddr_t new_heap = heap[iUsedHeap] + incr;
#ifdef MODULE_TRACELOG
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, heap[iUsedHeap]);
#endif
if( new_heap <= heap_max[iUsedHeap] ) {
#endif
if(new_heap <= heap_max[iUsedHeap]) {
caddr_t prev_heap = heap[iUsedHeap];
#ifdef MODULE_TRACELOG
#ifdef MODULE_TRACELOG
trace_pointer(TRACELOG_EV_MEMORY, new_heap);
#endif
#endif
heap[iUsedHeap] = new_heap;
r->_errno = 0;
<