
14 changed files with 609 additions and 2 deletions
@ -0,0 +1,3 @@
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MODULE = board
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include $(RIOTBASE)/Makefile.base |
@ -0,0 +1,3 @@
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ifneq (,$(filter saul_default,$(USEMODULE))) |
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USEMODULE += saul_gpio
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endif |
@ -0,0 +1,17 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Various other features (if any)
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FEATURES_PROVIDED += cpp
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FEATURES_PROVIDED += arduino
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m0_2
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@ -0,0 +1,29 @@
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# define the cpu used by Arduino/Genuino Zero board
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export CPU = samd21
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export CPU_MODEL = samd21g18a
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export CFLAGS += -D__SAMD21G18A__
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# set default port depending on operating system
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PORT_LINUX ?= /dev/ttyACM0
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
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# setup the boards dependencies
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include $(RIOTBOARD)/$(BOARD)/Makefile.dep |
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# setup serial terminal
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include $(RIOTBOARD)/Makefile.include.serial |
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# Add board selector (USB serial) to OpenOCD options if specified.
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# Use /dist/tools/usb-serial/list-ttys.sh to find out serial number.
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# Usage: SERIAL="<SERIAL>" BOARD="arduino-zero" make flash
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ifneq (,$(SERIAL)) |
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export OPENOCD_EXTRA_INIT += "-c cmsis_dap_serial $(SERIAL)"
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SERIAL_TTY = $(shell $(RIOTBASE)/dist/tools/usb-serial/find-tty.sh $(SERIAL))
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ifeq (,$(SERIAL_TTY))
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$(error Did not find a device with serial $(SERIAL))
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endif
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PORT_LINUX := $(SERIAL_TTY)
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endif |
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# this board uses openocd
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include $(RIOTBOARD)/Makefile.include.openocd |
@ -0,0 +1,33 @@
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/*
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* Copyright (C) 2016 Freie Universität Berlin |
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* 2016 Inria |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_arduino-zero |
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* @{ |
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* |
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* @file |
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* @brief Board specific implementations for the Arduino Zero board |
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* |
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* @author Hauke Pertersen <hauke.pertersen@fu-berlin.de> |
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* @author Alexandre Abadie <alexandre.abadie@inria.fr> |
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* |
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* @} |
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*/ |
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#include "cpu.h" |
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#include "board.h" |
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#include "periph/gpio.h" |
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void board_init(void) |
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{ |
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/* initialize the CPU */ |
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cpu_init(); |
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/* initialize the on-board Amber "L" LED on pin PA17 */ |
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gpio_init(LED0_PIN, GPIO_OUT); |
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} |
@ -0,0 +1,7 @@
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source [find interface/cmsis-dap.cfg] |
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set CHIPNAME at91samd21g18 |
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set ENDIAN little |
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set telnet_port 0 |
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source [find target/at91samdXX.cfg] |
@ -0,0 +1,66 @@
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/*
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* Copyright (C) 2016 Freie Universität Berlin |
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* 2016 Inria |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_arduino-zero |
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* @{ |
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* |
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* @file |
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* @brief Board specific configuration for the Arduino API |
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* |
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de> |
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* @author Alexandre Abadie <alexandre.abadie@inria.fr> |
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*/ |
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#ifndef ARDUINO_BOARD_H |
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#define ARDUINO_BOARD_H |
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#include "arduino_pinmap.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @brief The on-board LED is connected to pin 13 on this board |
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*/ |
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#define ARDUINO_LED (13) |
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/**
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* @brief Look-up table for the Arduino's digital pins |
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*/ |
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static const gpio_t arduino_pinmap[] = { |
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ARDUINO_PIN_0, |
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ARDUINO_PIN_1, |
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ARDUINO_PIN_2, |
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ARDUINO_PIN_3, |
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ARDUINO_PIN_4, |
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ARDUINO_PIN_5, |
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ARDUINO_PIN_6, |
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ARDUINO_PIN_7, |
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ARDUINO_PIN_8, |
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ARDUINO_PIN_9, |
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ARDUINO_PIN_10, |
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ARDUINO_PIN_11, |
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ARDUINO_PIN_12, |
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ARDUINO_PIN_13, |
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ARDUINO_PIN_A0, |
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ARDUINO_PIN_A1, |
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ARDUINO_PIN_A2, |
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ARDUINO_PIN_A3, |
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ARDUINO_PIN_A4, |
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ARDUINO_PIN_A5, |
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}; |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* ARDUINO_BOARD_H */ |
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/** @} */ |
@ -0,0 +1,64 @@
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/*
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* Copyright (C) 2016 Inria |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_arduino-zero |
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* @{ |
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* |
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* @file |
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* @brief Mapping from MCU pins to Arduino pins |
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* |
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* You can use the defines in this file for simplified interaction with the |
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* Arduino specific pin numbers. |
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* |
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* @author Alexandre Abadie <alexandre.abadie@inria.fr> |
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*/ |
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#ifndef ARDUINO_PINMAP_H |
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#define ARDUINO_PINMAP_H |
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#include "periph/gpio.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @brief Mapping of MCU pins to Arduino pins |
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* @{ |
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*/ |
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#define ARDUINO_PIN_0 GPIO_PIN(PA, 11) |
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#define ARDUINO_PIN_1 GPIO_PIN(PA, 10) |
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#define ARDUINO_PIN_2 GPIO_PIN(PA, 14) |
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#define ARDUINO_PIN_3 GPIO_PIN(PA, 9) |
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#define ARDUINO_PIN_4 GPIO_PIN(PA, 8) |
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#define ARDUINO_PIN_5 GPIO_PIN(PA, 15) |
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#define ARDUINO_PIN_6 GPIO_PIN(PA, 20) |
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#define ARDUINO_PIN_7 GPIO_PIN(PA, 21) |
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#define ARDUINO_PIN_8 GPIO_PIN(PA, 6) |
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#define ARDUINO_PIN_9 GPIO_PIN(PA, 7) |
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#define ARDUINO_PIN_10 GPIO_PIN(PA, 18) |
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#define ARDUINO_PIN_11 GPIO_PIN(PA, 16) |
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#define ARDUINO_PIN_12 GPIO_PIN(PA, 19) |
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#define ARDUINO_PIN_13 GPIO_PIN(PA, 17) /* on-board LED */ |
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#define ARDUINO_PIN_A0 GPIO_PIN(PA, 2) |
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#define ARDUINO_PIN_A1 GPIO_PIN(PB, 8) |
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#define ARDUINO_PIN_A2 GPIO_PIN(PB, 9) |
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#define ARDUINO_PIN_A3 GPIO_PIN(PA, 4) |
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#define ARDUINO_PIN_A4 GPIO_PIN(PA, 5) |
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#define ARDUINO_PIN_A5 GPIO_PIN(PB, 2) |
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/** @ */ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* ARDUINO_PINMAP_H */ |
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/** @} */ |
@ -0,0 +1,66 @@
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/*
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* Copyright (C) 2016 Inria |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @defgroup boards_arduino-zero Arduino Zero |
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* @ingroup boards |
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* @brief Support for the Arduino Zero board. |
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* @{ |
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* |
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* @file |
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* @brief Board specific definitions for the Arduino Zero |
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* board |
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* |
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* @author Alexandre Abadie <alexandre.abadie@inria.fr> |
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*/ |
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#ifndef BOARD_H_ |
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#define BOARD_H_ |
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#include "cpu.h" |
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#include "periph_conf.h" |
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#include "periph_cpu.h" |
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#include "arduino_pinmap.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @brief xtimer configuration |
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* @{ |
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*/ |
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#define XTIMER TIMER_0 |
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#define XTIMER_CHAN (0) |
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/** @} */ |
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/**
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* @brief LED pin definitions and handlers |
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* @{ |
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*/ |
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#define LED0_PIN GPIO_PIN(PA, 17) |
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#define LED_PORT PORT->Group[PA] |
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#define LED0_MASK (1 << 17) |
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#define LED0_ON (LED_PORT.OUTSET.reg = LED0_MASK) |
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#define LED0_OFF (LED_PORT.OUTCLR.reg = LED0_MASK) |
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#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK) |
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/** @} */ |
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO |
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*/ |
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void board_init(void); |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* BOARD_H_ */ |
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/** @} */ |
@ -0,0 +1,48 @@
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/*
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* Copyright (C) 2016 Freie Universität Berlin |
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* 2016 Inria |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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|
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/**
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* @ingroup boards_arduino-zero |
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* @{ |
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* |
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* @file |
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* @brief Board specific configuration of direct mapped GPIOs |
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* |
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de> |
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* @author Alexandre Abadie <alexandre.abadie@inria.fr> |
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*/ |
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#ifndef GPIO_PARAMS_H |
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#define GPIO_PARAMS_H |
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#include "board.h" |
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#include "saul/periph.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @brief GPIO pin configuration |
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*/ |
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static const saul_gpio_params_t saul_gpio_params[] = |
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{ |
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{ |
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.name = "LED(orange)", |
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.pin = LED0_PIN, |
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.mode = GPIO_OUT |
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}, |
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}; |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* GPIO_PARAMS_H */ |
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/** @} */ |
@ -0,0 +1,241 @@
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/*
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* Copyright (C) 2016 Freie Universität Berlin |
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* 2016 Inria |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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|
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/**
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* @ingroup boards_arduino-zero |
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* @{ |
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* |
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* @file |
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* @brief Configuration of CPU peripherals for Arduino Zero board |
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* |
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* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de> |
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de> |
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* @author Peter Kietzmann <peter.kietzmann@haw-hamburg.de> |
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* @author Alexandre Abadie <alexandre.abadie@inria.fr> |
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*/ |
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#ifndef PERIPH_CONF_H_ |
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#define PERIPH_CONF_H_ |
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#include <stdint.h> |
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#include "cpu.h" |
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#include "periph_cpu.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @brief External oscillator and clock configuration |
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* |
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* For selection of the used CORECLOCK, we have implemented two choices: |
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* |
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* - usage of the PLL fed by the internal 8MHz oscillator divided by 8 |
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* - usage of the internal 8MHz oscillator directly, divided by N if needed |
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* |
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* |
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* The PLL option allows for the usage of a wider frequency range and a more |
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* stable clock with less jitter. This is why we use this option as default. |
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* |
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* The target frequency is computed from the PLL multiplier and the PLL divisor. |
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* Use the following formula to compute your values: |
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* |
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* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV |
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* |
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* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL |
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* frequency is 96MHz. So PLL_MULL must be between 31 and 95! |
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* |
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* |
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* The internal Oscillator used directly can lead to a slightly better power |
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* efficiency to the cost of a less stable clock. Use this option when you know |
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* what you are doing! The actual core frequency is adjusted as follows: |
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* |
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* CORECLOCK = 8MHz / DIV |
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* |
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* NOTE: A core clock frequency below 1MHz is not recommended |
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* |
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* @{ |
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*/ |
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#define CLOCK_USE_PLL (1) |
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|
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#if CLOCK_USE_PLL |
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/* edit these values to adjust the PLL output frequency */ |
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#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */ |
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#define CLOCK_PLL_DIV (1U) /* adjust to your needs */ |
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/* generate the actual used core clock frequency */ |
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#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV) |
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#else |
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/* edit this value to your needs */ |
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#define CLOCK_DIV (1U) |
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/* generate the actual core clock frequency */ |
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#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV) |
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#endif |
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/** @} */ |
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|
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/**
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* @name Timer peripheral configuration |
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* @{ |
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*/ |
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#define TIMER_NUMOF (2U) |
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#define TIMER_0_EN 1 |
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#define TIMER_1_EN 1 |
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|
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/* Timer 0 configuration */ |
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#define TIMER_0_DEV TC3->COUNT16 |
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#define TIMER_0_CHANNELS 2 |
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#define TIMER_0_MAX_VALUE (0xffff) |
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#define TIMER_0_ISR isr_tc3 |
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|
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/* Timer 1 configuration */ |
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#define TIMER_1_DEV TC4->COUNT32 |
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#define TIMER_1_CHANNELS 2 |
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#define TIMER_1_MAX_VALUE (0xffffffff) |
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#define TIMER_1_ISR isr_tc4 |
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|
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/** @} */ |
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|
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/**
|
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* @name UART configuration |
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* @{ |
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*/ |
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static const uart_conf_t uart_config[] = { |
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/* device, RX pin, TX pin, mux, RX pad, TX pad */ |
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{&SERCOM5->USART, GPIO_PIN(PB,23), GPIO_PIN(PB,22), GPIO_MUX_D, SERCOM_RX_PAD_3, UART_TX_PAD_2}, |
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{&SERCOM0->USART, GPIO_PIN(PA,11), GPIO_PIN(PA,10), GPIO_MUX_C, SERCOM_RX_PAD_3, UART_TX_PAD_2}, |
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}; |
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|
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/* interrupt function name mapping */ |
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#define UART_0_ISR isr_sercom5 |
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#define UART_1_ISR isr_sercom0 |
||||
|
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) |
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/** @} */ |
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|
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/**
|
||||
* @name PWM configuration |
||||
* @{ |
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*/ |
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#define PWM_0_EN 1 |
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#define PWM_1_EN 1 |
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#define PWM_MAX_CHANNELS 2 |
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/* for compatibility with test application */ |
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#define PWM_0_CHANNELS PWM_MAX_CHANNELS |
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#define PWM_1_CHANNELS PWM_MAX_CHANNELS |
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|
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/* PWM device configuration */ |
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static const pwm_conf_t pwm_config[] = { |
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#if PWM_0_EN |
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{TCC0, { |
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/* GPIO pin, MUX value, TCC channel */ |
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{ GPIO_PIN(PA, 8), GPIO_MUX_E, 0 }, |
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{ GPIO_PIN(PA, 9), GPIO_MUX_E, 1 }, |
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}}, |
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#endif |
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#if PWM_1_EN |
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{TCC1, { |
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/* GPIO pin, MUX value, TCC channel */ |
||||
{ GPIO_PIN(PA, 6), GPIO_MUX_E, 0 }, |
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{ GPIO_PIN(PA, 7), GPIO_MUX_E, 1 }, |
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}}, |
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#endif |
||||
}; |
||||
|
||||
/* number of devices that are actually defined */ |
||||
#define PWM_NUMOF (2U) |
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/** @} */ |
||||
|
||||
/**
|
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* @name ADC configuration |
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* @{ |
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*/ |
||||
#define ADC_CONFIG { \ |
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{ GPIO_PIN(PA, 2), 0, 0 }, \
|
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{ GPIO_PIN(PB, 8), 0, 2 }, \
|
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{ GPIO_PIN(PB, 9), 0, 3 }, \
|
||||
{ GPIO_PIN(PA, 4), 0, 4 }, \
|
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{ GPIO_PIN(PA, 5), 0, 5 }, \
|
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{ GPIO_PIN(PB, 2), 0, 10 }} |
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|
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#define ADC_NUMOF (6) |
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/** @} */ |
||||
|
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/**
|
||||
* @name SPI configuration |
||||
* @{ |
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*/ |
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#define SPI_NUMOF (1) |
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#define SPI_0_EN 1 |
||||
|
||||
/* SPI0 */ |
||||
#define SPI_0_DEV SERCOM4->SPI |
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#define SPI_IRQ_0 SERCOM4_IRQn |
||||
#define SPI_0_GCLK_ID SERCOM4_GCLK_ID_CORE |
||||
/* SPI 0 pin configuration */ |
||||
#define SPI_0_SCLK GPIO_PIN(PB, 11) |
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#define SPI_0_SCLK_MUX GPIO_MUX_D |
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#define SPI_0_MISO GPIO_PIN(PA, 12) |
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#define SPI_0_MISO_MUX GPIO_MUX_D |
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#define SPI_0_MISO_PAD SERCOM_RX_PAD_0 |
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#define SPI_0_MOSI GPIO_PIN(PB, 10) |
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#define SPI_0_MOSI_MUX GPIO_MUX_D |
||||
#define SPI_0_MOSI_PAD SPI_PAD_2_SCK_3 |
||||
|
||||
/** @} */ |
||||
|
||||
/**
|
||||
* @name I2C configuration |
||||
* @{ |
||||
*/ |
||||
#define I2C_NUMOF (1U) |
||||
#define I2C_0_EN 1 |
||||
#define I2C_1_EN 0 |
||||
#define I2C_2_EN 0 |
||||
#define I2C_3_EN 0 |
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#define I2C_IRQ_PRIO 1 |
||||
|
||||
#define I2C_0_DEV SERCOM3->I2CM |
||||
#define I2C_0_IRQ SERCOM3_IRQn |
||||
#define I2C_0_ISR isr_sercom3 |
||||
/* I2C 0 GCLK */ |
||||
#define I2C_0_GCLK_ID SERCOM3_GCLK_ID_CORE |
||||
#define I2C_0_GCLK_ID_SLOW SERCOM3_GCLK_ID_SLOW |
||||
/* I2C 0 pin configuration */ |
||||
#define I2C_0_SDA GPIO_PIN(PA, 22) |
||||
#define I2C_0_SCL GPIO_PIN(PA, 23) |
||||
#define I2C_0_MUX GPIO_MUX_C |
||||
|
||||
/**
|
||||
* @name RTC configuration |
||||
* @{ |
||||
*/ |
||||
#define RTC_NUMOF (1U) |
||||
#define RTC_DEV RTC->MODE2 |
||||
/** @} */ |
||||
|
||||
/**
|
||||
* @name RTT configuration |
||||
* @{ |
||||
*/ |
||||
#define RTT_NUMOF (1U) |
||||
#define RTT_DEV RTC->MODE0 |
||||
#define RTT_IRQ RTC_IRQn |
||||
#define RTT_IRQ_PRIO 10 |
||||
#define RTT_ISR isr_rtc |
||||
#define RTT_MAX_VALUE (0xffffffff) |
||||
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */ |
||||
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */ |
||||
/** @} */ |
||||
|
||||
#ifdef __cplusplus |
||||
} |
||||
#endif |
||||
|
||||
#endif /* PERIPH_CONF_H_ */ |
||||
/** @} */ |
@ -0,0 +1,27 @@
|
||||
/* |
||||
* Copyright (C) 2015, 2016 Freie Universität Berlin |
||||
* |
||||
* This file is subject to the terms and conditions of the GNU Lesser |
||||
* General Public License v2.1. See the file LICENSE in the top level |
||||
* directory for more details. |
||||
*/ |
||||
|
||||
/** |
||||
* @addtogroup cpu_samd21 |
||||
* @{ |
||||
* |
||||
* @file |
||||
* @brief Memory definitions for the SAMD21DG18A |
||||
* |
||||
* @author Hauke Petersen <hauke.petersen@fu-berlin.de> |
||||
* |
||||
* @} |
||||
*/ |
||||
|
||||
MEMORY |
||||
{ |
||||
rom (rx) : ORIGIN = 0x00000000, LENGTH = 256K |
||||
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K |
||||
} |
||||
|
||||
INCLUDE cortexm_base.ld |
Loading…
Reference in new issue