Merge pull request #5124 from locicontrols/fixes
cpu/cc2538: fix build errors when UART1 or the 32 kHz crystal is enabled
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commit
699410efc8
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@ -84,7 +84,7 @@ static void cpu_clock_init(void)
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#if SYS_CTRL_OSC32K_USE_XTAL
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/* Wait for the 32-kHz crystal oscillator to stabilize: */
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while ( SYS_CTRL->CLOCK_STAbits.SYNC_32K);
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while (!SYS_CTRL->CLOCK_STAbits.SYNC_32K);
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while ( SYS_CTRL->cc2538_sys_ctrl_clk_sta.CLOCK_STAbits.SYNC_32K);
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while (!SYS_CTRL->cc2538_sys_ctrl_clk_sta.CLOCK_STAbits.SYNC_32K);
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#endif
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}
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@ -61,10 +61,10 @@ enum {
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#define DIVFRAC_MASK ( (1 << DIVFRAC_NUM_BITS) - 1 )
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/** @brief Indicates if there are bytes available in the UART0 receive FIFO */
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#define uart0_rx_avail() ( UART0->FRbits.RXFE == 0 )
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#define uart0_rx_avail() ( UART0->cc2538_uart_fr.FRbits.RXFE == 0 )
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/** @brief Indicates if there are bytes available in the UART1 receive FIFO */
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#define uart1_rx_avail() ( UART1->FRbits.RXFE == 0 )
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#define uart1_rx_avail() ( UART1->cc2538_uart_fr.FRbits.RXFE == 0 )
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/** @brief Read one byte from the UART0 receive FIFO */
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#define uart0_read() ( UART0->DR )
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@ -139,7 +139,7 @@ void UART_1_ISR(void)
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mis = UART_1_DEV->cc2538_uart_mis.MIS;
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UART_1_DEV->ICR = mis;
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while (UART_1_DEV->FRbits.RXFE == 0) {
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while (UART_1_DEV->cc2538_uart_fr.FRbits.RXFE == 0) {
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uart_config[1].rx_cb(uart_config[1].arg, UART_1_DEV->DR);
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}
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