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@ -61,10 +61,10 @@ enum {
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#define DIVFRAC_MASK ( (1 << DIVFRAC_NUM_BITS) - 1 ) |
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/** @brief Indicates if there are bytes available in the UART0 receive FIFO */ |
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#define uart0_rx_avail() ( UART0->FRbits.RXFE == 0 ) |
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#define uart0_rx_avail() ( UART0->cc2538_uart_fr.FRbits.RXFE == 0 ) |
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/** @brief Indicates if there are bytes available in the UART1 receive FIFO */ |
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#define uart1_rx_avail() ( UART1->FRbits.RXFE == 0 ) |
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#define uart1_rx_avail() ( UART1->cc2538_uart_fr.FRbits.RXFE == 0 ) |
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/** @brief Read one byte from the UART0 receive FIFO */ |
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#define uart0_read() ( UART0->DR ) |
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@ -139,7 +139,7 @@ void UART_1_ISR(void)
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mis = UART_1_DEV->cc2538_uart_mis.MIS; |
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UART_1_DEV->ICR = mis; |
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while (UART_1_DEV->FRbits.RXFE == 0) { |
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while (UART_1_DEV->cc2538_uart_fr.FRbits.RXFE == 0) { |
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uart_config[1].rx_cb(uart_config[1].arg, UART_1_DEV->DR); |
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} |
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