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cpu: removed hwtimer code from msp430 CPUs

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dev/timer
Hauke Petersen 8 years ago
parent 824a81ff3a
commit 69e83bbab3
3 changed files with 0 additions and 384 deletions
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75
cpu/cc430/hwtimer_cc430.c
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/*
* Copyright (C) 2014 INRIA
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cc430
* @{
*/
/**
* @file
* @brief cc430 hardware timer driver
*
* @author Kévin Roussel <Kevin.Roussel@inria.fr>
* @author Oliver Hahm <oliver.hahm@inria.fr>
* @author Aleksandr Mikoff <sir.enmity@gmail.com>
*
*/
#include "cpu.h"
#include "hwtimer.h"
#include "arch/hwtimer_arch.h"
#define ENABLE_DEBUG (0)
#include "debug.h"
extern void (*int_handler)(int);
extern void timer_unset(short timer);
msp430_timer_t msp430_timer[HWTIMER_MAXTIMERS];
void timerA_init(void)
{
volatile unsigned int *ccr = &TA0CCR0;
volatile unsigned int *ctl = &TA0CCTL0;
TA0CTL = TASSEL_1 + TACLR; /* Clear the timer counter, set ACLK */
TA0CTL &= ~TAIFG; /* Clear the IFG */
TA0CTL &= ~TAIE; /* Disable TAIE (overflow IRQ) */
for (int i = 0; i < HWTIMER_MAXTIMERS; i++) {
*(ccr + i) = 0;
*(ctl + i) &= ~(CCIFG);
*(ctl + i) &= ~(CCIE);
}
TA0CTL |= MC_2;
}
interrupt(TIMER0_A0_VECTOR) __attribute__((naked)) timer0_a0_isr(void)
{
__enter_isr();
timer_unset(0);
int_handler(0);
__exit_isr();
}
interrupt(TIMER0_A1_VECTOR) __attribute__((naked)) timer0_a1_5_isr(void)
{
__enter_isr();
/* determine which CCR has been hit, and fire the appropriate callback */
short timer = TA0IV >> 1;
timer_unset(timer);
int_handler(timer);
__exit_isr();
}

182
cpu/msp430-common/hwtimer_cpu.c
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/*
* Copyright (C) 2014 Freie Universitaet Berlin (FUB) and INRIA. All rights reserved.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu
* @{
*/
/**
* @file
* @brief msp430 hardware timer driver generic functions
*
* @author Freie Universitaet Berlin, Computer Systems and Telematics group
* @author Oliver Hahm <oliver.hahm@inria.fr>
* @author Kévin Roussel <Kevin.Roussel@inria.fr>
*
*/
#include <stdint.h>
#include "cpu.h"
#include "panic.h"
#include "hwtimer.h"
#include "arch/hwtimer_arch.h"
#define ENABLE_DEBUG (0)
#include "debug.h"
void (*int_handler)(int);
extern void timerA_init(void);
#ifndef CC430
extern void timerB_init(void);
#endif
extern volatile msp430_timer_t msp430_timer[HWTIMER_MAXTIMERS];
/*
* the 3 following functions handle the diversity of timers
* we can encounter in the various MCUs in the MSP430 family
*/
static volatile unsigned int *get_control_reg_for_msp430_timer(int index)
{
volatile unsigned int *ptr = NULL;
#ifndef CC430
switch (msp430_timer[index].base_timer) {
case TIMER_A:
ptr = &TACCTL0;
break;
case TIMER_B:
ptr = &TBCCTL0;
break;
default:
core_panic(0x0, "Wrong timer kind for MSP430");
}
#else
ptr = &TA0CCTL0;
#endif
ptr += msp430_timer[index].ccr_num;
return ptr;
}
static volatile unsigned int *get_comparator_reg_for_msp430_timer(int index)
{
volatile unsigned int *ptr = NULL;
#ifndef CC430
switch (msp430_timer[index].base_timer) {
case TIMER_A:
ptr = &TACCR0;
break;
case TIMER_B:
ptr = &TBCCR0;
break;
default:
core_panic(0x0, "Wrong timer kind for MSP430");
}
#else
ptr = &TA0CCR0;
#endif
ptr += msp430_timer[index].ccr_num;
return ptr;
}
#ifdef CC430
/* CC430 have "TimerA0", "TimerA1" and so on... */
#define TIMER_VAL_REG (TA0R)
#else
/* ... while other MSP430 MCUs have "TimerA", "TimerB".
Cheers for TI and its consistency! */
#define TIMER_VAL_REG (TBR)
#endif
/* hardware-dependent functions */
static void timer_disable_interrupt(short timer)
{
volatile unsigned int *ptr = get_control_reg_for_msp430_timer(timer);
*ptr &= ~(CCIFG);
*ptr &= ~(CCIE);
}
static void timer_enable_interrupt(short timer)
{
volatile unsigned int *ptr = get_control_reg_for_msp430_timer(timer);
*ptr |= CCIE;
*ptr &= ~(CCIFG);
}
static void timer_set_nostart(uint32_t value, short timer)
{
volatile unsigned int *ptr = get_comparator_reg_for_msp430_timer(timer);
/* ensure we won't set the timer to a "past" tick */
if (value <= hwtimer_arch_now()) {
value = hwtimer_arch_now() + 2;
}
*ptr = (value & 0xFFFF);
}
static void timer_set(uint32_t value, short timer)
{
DEBUG("Setting timer %u to %lu\n", timer, value);
timer_set_nostart(value, timer);
timer_enable_interrupt(timer);
}
void timer_unset(short timer)
{
volatile unsigned int *ptr = get_comparator_reg_for_msp430_timer(timer);
timer_disable_interrupt(timer);
*ptr = 0;
}
unsigned long hwtimer_arch_now(void)
{
return (TIMER_VAL_REG & 0xffff);
}
void hwtimer_arch_init(void (*handler)(int), uint32_t fcpu)
{
(void) fcpu;
#ifndef CC430
timerB_init();
#endif
timerA_init();
int_handler = handler;
}
void hwtimer_arch_enable_interrupt(void)
{
for (int i = 0; i < HWTIMER_MAXTIMERS; i++) {
timer_enable_interrupt(i);
}
}
void hwtimer_arch_disable_interrupt(void)
{
for (int i = 0; i < HWTIMER_MAXTIMERS; i++) {
timer_disable_interrupt(i);
}
}
void hwtimer_arch_set(unsigned long offset, short timer)
{
uint32_t value = hwtimer_arch_now() + offset;
hwtimer_arch_set_absolute(value, timer);
}
void hwtimer_arch_set_absolute(unsigned long value, short timer)
{
timer_set(value, timer);
}
void hwtimer_arch_unset(short timer)
{
timer_unset(timer);
}

127
cpu/msp430fxyz/hwtimer_msp430.c
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/*
* Copyright (C) 2014 INRIA
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu
* @{
*
* @file
* @brief MSP430Fxyz timer functions
*
* @author Oliver Hahm <oliver.hahm@inria.fr>
* @author Milan Babel <babel@inf.fu-berlin.de>
* @author Kévin Roussel <Kevin.Roussel@inria.fr>
*
* @}
*/
#include "cpu.h"
#include "hwtimer.h"
#include "arch/hwtimer_arch.h"
#define ENABLE_DEBUG (0)
#include "debug.h"
extern void (*int_handler)(int);
extern void timer_unset(short timer);
msp430_timer_t msp430_timer[HWTIMER_MAXTIMERS];
#define CCRA_NUM_TO_INDEX(ccr) (ccr)
#define CCRB_NUM_TO_INDEX(ccr) ((ccr) + TIMER_A_MAXCOMP)
void timerA_init(void)
{
TACTL = TASSEL_1 + TACLR; /* Clear the timer counter, set ACLK */
TACTL &= ~(TAIFG); /* Clear the IFG */
TACTL &= ~(TAIE); /* Disable TAIE (overflow IRQ) */
for (uint8_t i = 0; i < TIMER_A_MAXCOMP; i++) {
volatile unsigned int *ccr = &TACCR0 + (i);
volatile unsigned int *ctl = &TACCTL0 + (i);
*ccr = 0;
*ctl &= ~(CCIFG);
*ctl &= ~(CCIE);
/* intialize the corresponding msp430_timer struct */
short index = CCRA_NUM_TO_INDEX(i);
msp430_timer[index].base_timer = TIMER_A;
msp430_timer[index].ccr_num = i;
}
TACTL |= MC_2;
}
void timerB_init(void)
{
TBCTL = TBSSEL_1 + TBCLR; /* Clear the timer counter, set ACLK */
TBCTL &= ~(TBIFG); /* Clear the IFG */
TBCTL &= ~(TBIE); /* Disable TBIE (overflow IRQ) */
for (uint8_t i = 0; i < TIMER_B_MAXCOMP; i++) {
volatile unsigned int *ccr = &TBCCR0 + (i);
volatile unsigned int *ctl = &TBCCTL0 + (i);
*ccr = 0;
*ctl &= ~(CCIFG);
*ctl &= ~(CCIE);
/* intialize the corresponding msp430_timer struct */
short index = CCRB_NUM_TO_INDEX(i);
msp430_timer[index].base_timer = TIMER_B;
msp430_timer[index].ccr_num = i;
}
TBCTL |= MC_2;
}
interrupt(TIMERA0_VECTOR) __attribute__((naked)) timerA_isr_ccr0(void)
{
__enter_isr();
short timer = CCRA_NUM_TO_INDEX(0);
timer_unset(timer);
int_handler(timer);
__exit_isr();
}
interrupt(TIMERA1_VECTOR) __attribute__((naked)) timerA_isr(void)
{
__enter_isr();
/* determine which CCR has been hit, and fire the appropriate callback */
short timer = CCRA_NUM_TO_INDEX(TAIV >> 1);
timer_unset(timer);
int_handler(timer);
__exit_isr();
}
interrupt(TIMERB0_VECTOR) __attribute__((naked)) timerB_isr_ccr0(void)
{
__enter_isr();
short timer = CCRB_NUM_TO_INDEX(0);
timer_unset(timer);
int_handler(timer);
__exit_isr();
}
interrupt(TIMERB1_VECTOR) __attribute__((naked)) timerB_isr(void)
{
__enter_isr();
/* determine which CCR has been hit, and fire the appropriate callback */
short timer = CCRB_NUM_TO_INDEX(TBIV >> 1);
timer_unset(timer);
int_handler(timer);
__exit_isr();
}
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