doc: some doxygen cleanups

* removed RIOT unrelated cpu documentation
* introduced cpu_specific prefix to mark such documentation
* put oneway_malloc and crypto into sys group

cpu/nrf51822/include/nrf51.h

@@ -44,11 +44,11 @@
 
 
 
-/** @addtogroup Nordic Semiconductor
+/** @addtogroup cpu_specific_Nordic Semiconductor
   * @{
   */
 
-/** @addtogroup nRF51
+/** @addtogroup cpu_specific_nRF51
   * @{
   */
 
@@ -124,7 +124,7 @@ typedef enum {
 /* ================================================================================ */
 
 
-/** @addtogroup Device_Peripheral_Registers
+/** @addtogroup cpu_specific_Device_Peripheral_Registers
   * @{
   */
 

cpu/samd21/include/samd21.h

@@ -45,8 +45,8 @@
 #define _SAMR21G18A_
 
 /**
- * \ingroup SAMR21_definitions
- * \addtogroup SAMR21G18A_definitions SAMR21G18A definitions
+ * \ingroup cpu_specific_SAMR21_definitions
+ * \addtogroup cpu_specific_SAMR21G18A_definitions SAMR21G18A definitions
  * This file defines all structures and symbols for SAMR21G18A:
  *   - registers and bitfields
  *   - peripheral base address
@@ -247,7 +247,7 @@ void I2S_Handler                 ( void );
 /* ************************************************************************** */
 /**  SOFTWARE PERIPHERAL API DEFINITION FOR SAMR21G18A */
 /* ************************************************************************** */
-/** \defgroup SAMR21G18A_api Peripheral Software API */
+/** \defgroup cpu_specific_SAMR21G18A_api Peripheral Software API */
 /*@{*/
 
 #include "component/component_ac.h"
@@ -275,7 +275,7 @@ void I2S_Handler                 ( void );
 /* ************************************************************************** */
 /**  REGISTERS ACCESS DEFINITIONS FOR SAMR21G18A */
 /* ************************************************************************** */
-/** \defgroup SAMR21G18A_reg Registers Access Definitions */
+/** \defgroup cpu_specific_SAMR21G18A_reg Registers Access Definitions */
 /*@{*/
 
 #include "instance/instance_ac.h"
@@ -314,7 +314,7 @@ void I2S_Handler                 ( void );
 /* ************************************************************************** */
 /**  PERIPHERAL ID DEFINITIONS FOR SAMR21G18A */
 /* ************************************************************************** */
-/** \defgroup SAMR21G18A_id Peripheral Ids Definitions */
+/** \defgroup cpu_specific_SAMR21G18A_id Peripheral Ids Definitions */
 /*@{*/
 
 // Peripheral instances on HPB0 bridge
@@ -361,7 +361,7 @@ void I2S_Handler                 ( void );
 /* ************************************************************************** */
 /**  BASE ADDRESS DEFINITIONS FOR SAMR21G18A */
 /* ************************************************************************** */
-/** \defgroup SAMR21G18A_base Peripheral Base Address Definitions */
+/** \defgroup cpu_specific_SAMR21G18A_base Peripheral Base Address Definitions */
 /*@{*/
 
 #if defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)
@@ -514,7 +514,7 @@ void I2S_Handler                 ( void );
 /* ************************************************************************** */
 /**  PORT DEFINITIONS FOR SAMR21G18A */
 /* ************************************************************************** */
-/** \defgroup SAMR21G18A_port PORT Definitions */
+/** \defgroup cpu_specific_SAMR21G18A_port PORT Definitions */
 /*@{*/
 
 #include "pio/pio_samr21g18a.h"

cpu/stm32f1/include/cpu-conf.h

@@ -9,7 +9,7 @@
 
 /**
  * @defgroup        cpu_stm32f1 STM32F1
- * @addtogroup      cpu
+ * @ingroup         cpu
  * @brief           CPU specific implementations for the STM32F1
  * @{
  *

cpu/stm32f1/include/stm32f10x.h

@@ -43,7 +43,7 @@
   * @{
   */
 
-/** @addtogroup stm32f10x
+/** @addtogroup cpu_specific_stm32f10x
   * @{
   */
 
@@ -54,7 +54,7 @@
  extern "C" {
 #endif
 
-/** @addtogroup Library_configuration_section
+/** @addtogroup cpu_specific_Library_configuration_section
   * @{
   */
 
@@ -480,7 +480,7 @@ typedef enum IRQn
 #include "core_cm3.h"
 #include <stdint.h>
 
-/** @addtogroup Exported_types
+/** @addtogroup cpu_specific_Exported_types
   * @{
   */
 
@@ -532,7 +532,7 @@ typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
   * @}
   */
 
-/** @addtogroup Peripheral_registers_structures
+/** @addtogroup cpu_specific_Peripheral_registers_structures
   * @{
   */
 
@@ -1265,7 +1265,7 @@ typedef struct
   * @}
   */
 
-/** @addtogroup Peripheral_memory_map
+/** @addtogroup cpu_specific_Peripheral_memory_map
   * @{
   */
 
@@ -1374,7 +1374,7 @@ typedef struct
   * @}
   */
 
-/** @addtogroup Peripheral_declaration
+/** @addtogroup cpu_specific_Peripheral_declaration
   * @{
   */
 
@@ -1457,11 +1457,11 @@ typedef struct
   * @}
   */
 
-/** @addtogroup Exported_constants
+/** @addtogroup cpu_specific_Exported_constants
   * @{
   */
 
-  /** @addtogroup Peripheral_Registers_Bits_Definition
+  /** @addtogroup cpu_specific_Peripheral_Registers_Bits_Definition
   * @{
   */
 
@@ -8298,7 +8298,7 @@ typedef struct
   #include "stm32f10x_conf.h"
 #endif
 
-/** @addtogroup Exported_macro
+/** @addtogroup cpu_specific_Exported_macro
   * @{
   */
 

doc/doxygen/riot.doxyfile

@@ -91,8 +91,8 @@ FILE_PATTERNS          = *.txt *.h
 RECURSIVE              = YES
 EXCLUDE                =
 EXCLUDE_SYMLINKS       = NO
-EXCLUDE_PATTERNS       = */board/*/tools/*
-EXCLUDE_SYMBOLS        =
+EXCLUDE_PATTERNS       = */board/*/tools/* */cpu/*/include/component/* */cpu/*/include/instance/*
+EXCLUDE_SYMBOLS        = *CMSIS* *cmsis* *cpu_specific*
 EXAMPLE_PATH           =
 EXAMPLE_PATTERNS       =
 EXAMPLE_RECURSIVE      = NO

sys/crypto/doc.txt

@@ -8,5 +8,6 @@
 
 /**
  * @defgroup    sys_crypto Crypto
+ * @ingroup     sys
  * @brief       The crypto module is a lose collection of different crypto and hash algorithms
  */

sys/oneway-malloc/include/malloc.h

@@ -7,7 +7,8 @@
  */
 
 /**
- * @addtogroup  oneway_malloc
+ * @defgroup    oneway_malloc
+ * @ingroup     sys
  * @{
  * @file        malloc.h
  * @brief       A malloc implementation for MSP-430 boards without free.