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remove legacy board specific cc110x code

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dev/timer
Kaspar Schleiser 8 years ago
parent 544cf33b17
commit 723d0b2479
3 changed files with 0 additions and 780 deletions
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347
boards/msb-430h/driver_cc110x.c
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/*
* Copyright (C) 2005, 2006, 2007, 2008 by Thomas Hillebrandt and Heiko Will
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
#include <stdio.h>
#include "board.h"
#include "cpu.h"
#include "irq.h"
#include "cc110x_legacy.h"
#define CC1100_GDO0 (P2IN & 0x02) // read serial I/O (GDO0)
#define CC1100_GDO1 (P3IN & 0x04) // read serial I/O (GDO1)
#define CC1100_GDO2 (P2IN & 0x01) // read serial I/O (GDO2)
#define CC1100_CS_LOW (P3OUT &= ~0x01)
#define CC1100_CS_HIGH (P3OUT |= 0x01)
#define CC1100_GDO1_LOW_COUNT (2700) // loop count (timeout ~ 500 us) to wait
#define CC1100_GDO1_LOW_RETRY (100) // max. retries for GDO1 to go low
volatile int abort_count;
volatile int retry_count = 0;
void cc110x_gdo0_enable(void)
{
P2IFG &= ~0x02; /* Clear IFG for GDO0 */
P2IE |= 0x02; /* Enable interrupt for GDO0 */
}
void cc110x_gdo0_disable(void)
{
P2IE &= ~0x02; /* Disable interrupt for GDO0 */
P2IFG &= ~0x02; /* Clear IFG for GDO0 */
}
void cc110x_gdo2_enable(void)
{
P2IFG &= ~0x01; /* Clear IFG for GDO2 */
P2IE |= 0x01; /* Enable interrupt for GDO2 */
}
void cc110x_gdo2_disable(void)
{
P2IE &= ~0x01; /* Disable interrupt for GDO2 */
P2IFG &= ~0x01; /* Clear IFG for GDO2 */
}
void cc110x_before_send(void)
{
// Disable GDO2 interrupt before sending packet
cc110x_gdo2_disable();
}
void cc110x_after_send(void)
{
// Enable GDO2 interrupt after sending packet
cc110x_gdo2_enable();
}
int cc110x_get_gdo0(void)
{
return CC1100_GDO0;
}
int cc110x_get_gdo1(void)
{
return CC1100_GDO1;
}
int cc110x_get_gdo2(void)
{
return CC1100_GDO2;
}
void cc110x_spi_cs(void)
{
CC1100_CS_LOW;
}
uint8_t cc110x_txrx(uint8_t data)
{
/* Ensure TX Buf is empty */
long c = 0;
IFG1 &= ~UTXIFG0;
IFG1 &= ~URXIFG0;
TXBUF0 = data;
while (!(IFG1 & UTXIFG0)) {
if (c++ == 1000000) {
puts("cc110x_txrx alarm()");
}
}
/* Wait for Byte received */
c = 0;
while (!(IFG1 & URXIFG0)) {
if (c++ == 1000000) {
puts("cc110x_txrx alarm()");
}
}
return RXBUF0;
}
void cc110x_spi_select(void)
{
// Switch to GDO mode
P3SEL &= ~0x04;
P3DIR &= ~0x04;
cs_low:
// CS to low
abort_count = 0;
CC1100_CS_LOW;
// Wait for SO to go low (voltage regulator
// has stabilized and the crystal is running)
loop:
// asm volatile ("nop");
if (CC1100_GDO1) {
abort_count++;
if (abort_count > CC1100_GDO1_LOW_COUNT) {
retry_count++;
if (retry_count > CC1100_GDO1_LOW_RETRY) {
puts("[CC1100 SPI] fatal error\n");
goto final;
}
CC1100_CS_HIGH;
goto cs_low; // try again
}
goto loop;
}
final:
/* Switch to SPI mode */
P3SEL |= 0x04;
}
void cc110x_spi_unselect(void)
{
CC1100_CS_HIGH;
}
void cc110x_init_interrupts(void)
{
unsigned int state = disableIRQ(); /* Disable all interrupts */
P2SEL = 0x00; /* must be <> 1 to use interrupts */
P2IES |= 0x01; /* Enables external interrupt on low edge (for GDO2) */
P2IE |= 0x01; /* Enable interrupt */
P2IFG &= ~0x01; /* Clears the interrupt flag */
P2IE &= ~0x02; /* Disable interrupt for GDO0 */
P2IFG &= ~0x02; /* Clear IFG for GDO0 */
restoreIRQ(state); /* Enable all interrupts */
}
void cc110x_spi_init(void)
{
// Switch off async UART
while (!(UTCTL0 & TXEPT)); // Wait for empty UxTXBUF register
IE1 &= ~(URXIE0 + UTXIE0); // Disable USART0 receive&transmit interrupt
ME1 &= ~(UTXE0 + URXE0);
P3SEL |= 0x0E; // Set pin as SPI
// Keep peripheral in reset state
UCTL0 = SWRST;
// 8-bit SPI Master 3-pin mode, with SMCLK as clock source
// CKPL works also, but not CKPH+CKPL or none of them!!
UCTL0 |= CHAR + SYNC + MM;
UTCTL0 = CKPH + SSEL1 + SSEL0 + STC;
// Ignore clockrate argument for now, just use clock source/2
// SMCLK = 7,3728 MHz
UBR00 = 0x02; // Ensure baud rate >= 2
UBR10 = 0x00;
UMCTL0 = 0x00; // No modulation
URCTL0 = 0x00; // Reset Receive Control Register
// Enable SPI mode
ME1 |= USPIE0;
// Release for operation
UCTL0 &= ~SWRST;
}
// #include <msp430x16x.h>
// #include <signal.h>
// #include "type.h"
// #include "cc110x_defines.h"
// #include "driver_cc110x.h"
// #include "driver_system.h"
// #include "spi0.h"
//
// static callback_t _paket_cb;
// static callback_t _cs_cb;
//
// //-------------------------------------------------------------------------------------------------------
// // Public CC1100 communication functions (SPI)
// //-------------------------------------------------------------------------------------------------------
//
// //-------------------------------------------------------------------------------------------------------
// // void spiInitTrx(void)
// //
// // DESCRIPTION:
// // This function puts the cc110x into spi mode. You have to call this bevore every spi transaction.
// //
// //-------------------------------------------------------------------------------------------------------
//
//
// void drivercc110x_spiwriteburstreg(uint8_t addr, unsigned char *buffer, uint8_t count)
// {
// uint8_t i;
// long c;
// drivercc110x_spiinittrx();
// drivercc110x_trxspi(addr | CC1100_WRITE_BURST);
// for (i = 0; i < count; i++)
// {
// c = 0;
// IFG1 &= ~UTXIFG0;
// IFG1 &= ~URXIFG0;
// TXBUF0 = buffer[i];
// /* Wait for TX to finish */
// while(!(IFG1 & UTXIFG0))
// {
// if (c++ == 1000000)
// alarm();
// }
// }
// /* Wait for Byte received */
// c = 0;
// while(!(IFG1 & URXIFG0))
// {
// if (c++ == 1000000)
// alarm();
// }
// CC1100_CS_HIGH;
// }
//
// void drivercc110x_spireadburstreg(uint8_t addr, char *buffer, uint8_t count)
// {
// uint8_t i;
// drivercc110x_spiinittrx();
// drivercc110x_trxspi(addr | CC1100_READ_BURST);
// for (i = 0; i < count; i++)
// {
// long c = 0;
// IFG1 &= ~UTXIFG0;
// IFG1 &= ~URXIFG0;
// TXBUF0 = NOBYTE;
// while(!(IFG1 & UTXIFG0))
// {
// if (c++ == 1000000)
// alarm();
// }
// /* Wait for Byte received */
// c = 0;
// while(!(IFG1 & URXIFG0))
// {
// if (c++ == 1000000)
// alarm();
// }
// buffer[i] = RXBUF0;
// }
// CC1100_CS_HIGH;
// }
//
// void drivercc110x_load(callback_t cs_cb,callback_t paket_cb)
// {
// _paket_cb = paket_cb;
// _cs_cb = cs_cb;
// spi0_init(0);
// }
//
// void drivercc110x_aftersend(void)
// {
// CLEAR(P2IFG, 0x01);
// SET(P2IE, 0x01); /* Enable interrupts on port 2 pin 0 */
// CLEAR(P4OUT, 0x08); /* Turn off Sending Led*/
// }
//
// void drivercc110x_initinterrupts(void)
// {
// _DINT(); /* Disable all interrupts */
// P2SEL = 0x00; /* must be <> 1 to use interrupts */
// SET(P2IES, 0x01); /* Enables external interrupt on low edge (for GDO2) */
// SET(P2IE, 0x01); /* Enable interrupt */
// CLEAR(P2IFG, 0x01); /* Clears the interrupt flag */
// CLEAR(P2IE, 0x02); /* Disable interrupt for GDO0 */
// CLEAR(P2IFG, 0x02); /* Clear IFG for GDO0 */
// _EINT(); /* Enable all interrupts */
// }
//
// void drivercc110x_beforesend(void)
// {
// /* Turn on Led while sending paket for debug reasons */
// SET(P4OUT, 0x08);
// /* Disable interrupts on port 2 pin 0 */
// CLEAR(P2IE, 0x01);
// }
//
//
// /*
// * Private functions
// */
//
//
/*
* CC1100 receive interrupt
*/
interrupt(PORT2_VECTOR) __attribute__((naked)) cc110x_isr(void)
{
__enter_isr();
// if (system_state.POWERDOWN) SPI_INIT; /* Initialize SPI after wakeup */
/* Check IFG */
if ((P2IFG & 0x01) != 0) {
P2IFG &= ~0x01;
cc110x_gdo2_irq();
}
else if ((P2IFG & 0x02) != 0) {
cc110x_gdo0_irq();
P2IE &= ~0x02; // Disable interrupt for GDO0
P2IFG &= ~0x02; // Clear IFG for GDO0
}
else {
puts("cc110x_isr(): unexpected IFG!");
/* Should not occur - only Port 2 Pin 0 interrupts are enabled */
// CLEAR(P2IFG, 0xFF); /* Clear all flags */
}
// if (system_state.POWERDOWN != 0) END_LPM3;
__exit_isr();
}

208
boards/wsn430-v1_3b/driver_cc110x.c
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/*
* driver_cc110x.c - Implementation of the board dependent cc1100 functions.
* Copyright (C) 2005, 2006, 2007, 2008 by Thomas Hillebrandt and Heiko Will
* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
#include <stdio.h>
#include "board.h"
#include "cpu.h"
#include "irq.h"
#include "cc110x_legacy.h"
#define CC1100_GDO0 (P1IN & 0x08) // read serial I/O (GDO0)
#define CC1100_GDO1 (P5IN & 0x04) // read serial I/O (GDO1)
#define CC1100_GDO2 (P1IN & 0x10) // read serial I/O (GDO2)
#define CC1100_CS_LOW (P4OUT &= ~0x04)
#define CC1100_CS_HIGH (P4OUT |= 0x04)
#define CC1100_GDO1_LOW_COUNT (2700) // loop count (timeout ~ 500 us) to wait
#define CC1100_GDO1_LOW_RETRY (100) // max. retries for GDO1 to go low
volatile int abort_count;
volatile int retry_count = 0;
void cc110x_gdo0_enable(void)
{
P1IFG &= ~0x08; /* Clear IFG for GDO0 */
P1IE |= 0x08; /* Enable interrupt for GDO0 */
}
void cc110x_gdo0_disable(void)
{
P1IE &= ~0x08; /* Disable interrupt for GDO0 */
P1IFG &= ~0x08; /* Clear IFG for GDO0 */
}
void cc110x_gdo2_enable(void)
{
P1IFG &= ~0x10; /* Clear IFG for GDO2 */
P1IE |= 0x10; /* Enable interrupt for GDO2 */
}
void cc110x_gdo2_disable(void)
{
P1IE &= ~0x10; /* Disable interrupt for GDO2 */
P1IFG &= ~0x10; /* Clear IFG for GDO2 */
}
void cc110x_before_send(void)
{
// Disable GDO2 interrupt before sending packet
cc110x_gdo2_disable();
}
void cc110x_after_send(void)
{
// Enable GDO2 interrupt after sending packet
cc110x_gdo2_enable();
}
int cc110x_get_gdo0(void) {
return CC1100_GDO0;
}
int cc110x_get_gdo1(void) {
return CC1100_GDO1;
}
int cc110x_get_gdo2(void) {
return CC1100_GDO2;
}
void cc110x_spi_cs(void)
{
CC1100_CS_LOW;
}
uint8_t cc110x_txrx(uint8_t data)
{
/* Ensure TX Buf is empty */
long c = 0;
IFG2 &= ~UTXIFG1;
IFG2 &= ~URXIFG1;
U1TXBUF = data;
while(!(IFG2 & UTXIFG1)) {
if (c++ == 1000000) {
puts("cc110x_txrx alarm()");
}
}
/* Wait for Byte received */
c = 0;
while(!(IFG2 & URXIFG1)) {
if (c++ == 1000000) {
puts("cc110x_txrx alarm()");
}
}
return U1RXBUF;
}
void cc110x_spi_select(void)
{
// Switch to GDO mode
P5SEL &= ~0x04;
P5DIR &= ~0x04;
cs_low:
// CS to low
abort_count = 0;
CC1100_CS_LOW;
// Wait for SO to go low (voltage regulator
// has stabilized and the crystal is running)
loop:
// asm volatile ("nop");
if (CC1100_GDO1) {
abort_count++;
if (abort_count > CC1100_GDO1_LOW_COUNT) {
retry_count++;
if (retry_count > CC1100_GDO1_LOW_RETRY) {
puts("[CC1100 SPI] fatal error\n");
goto final;
}
CC1100_CS_HIGH;
goto cs_low; // try again
}
goto loop;
}
final:
/* Switch to SPI mode */
P5SEL |= 0x04;
}
void cc110x_spi_unselect(void) {
CC1100_CS_HIGH;
}
void cc110x_init_interrupts(void)
{
unsigned int state = disableIRQ(); /* Disable all interrupts */
P1SEL = 0x00; /* must be <> 1 to use interrupts */
P1IES |= 0x10; /* Enables external interrupt on low edge (for GDO2) */
P1IE |= 0x10; /* Enable interrupt */
P1IFG &= ~0x10; /* Clears the interrupt flag */
P1IE &= ~0x08; /* Disable interrupt for GDO0 */
P1IFG &= ~0x08; /* Clear IFG for GDO0 */
restoreIRQ(state); /* Enable all interrupts */
}
void cc110x_spi_init(void)
{
// Switch off async UART
while(!(U1TCTL & TXEPT)); // Wait for empty UxTXBUF register
IE2 &= ~(URXIE1 + UTXIE1); // Disable USART1 receive&transmit interrupt
ME2 &= ~(UTXE1 + URXE1);
P5DIR |= 0x0A; // output for CLK and SIMO
P5DIR &= ~(0x04); // input for SOMI
P5SEL |= 0x0E; // Set pins as SPI
// Keep peripheral in reset state
U1CTL = SWRST;
// 8-bit SPI Master 3-pin mode, with SMCLK as clock source
// CKPL works also, but not CKPH+CKPL or none of them!!
U1CTL |= CHAR + SYNC + MM;
U1TCTL = CKPH + SSEL1 + SSEL0 + STC;
// Ignore clockrate argument for now, just use clock source/2
// SMCLK = 8 MHz
U1BR0 = 0x02; // Ensure baud rate >= 2
U1BR1 = 0x00;
U1MCTL = 0x00; // No modulation
U1RCTL = 0x00; // Reset Receive Control Register
// Enable SPI mode
ME2 |= USPIE1;
// Release for operation
U1CTL &= ~SWRST;
}
/*
* CC1100 receive interrupt
*/
interrupt (PORT1_VECTOR) __attribute__ ((naked)) cc110x_isr(void){
__enter_isr();
/* Check IFG */
if ((P1IFG & 0x10) != 0) {
P1IFG &= ~0x10;
cc110x_gdo2_irq();
}
else if ((P2IFG & 0x08) != 0) {
cc110x_gdo0_irq();
P1IE &= ~0x08; // Disable interrupt for GDO0
P1IFG &= ~0x08; // Clear IFG for GDO0
}
else {
puts("cc110x_isr(): unexpected IFG!");
/* Should not occur - only GDO1 and GDO2 interrupts are enabled */
}
__exit_isr();
}

225
cpu/cc430/cc110x_cc430.c
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/*
* Copyright (C) 2014 INRIA
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cc430
* @{
*/
/**
* @file
* @brief eZ430 radio driver (cpu dependent part)
*
* @author Oliver Hahm <oliver.hahm@inria.fr>
*
*/
#include <stdint.h>
#include "irq.h"
#include "cc110x_legacy.h"
#include "board.h"
#include "hwtimer.h"
/**************************************************************************************************
* @fn Strobe
* @brief Send command to radio.
* @param none
* @return none
*************************************************************************************************/
uint8_t cc110x_strobe(uint8_t c)
{
uint8_t statusByte = 0;
/* Check for valid strobe command */
if ((c == 0xBD) || ((c > RF_SRES) && (c < RF_SNOP))) {
uint16_t int_state = disableIRQ();
/* Clear the Status read flag */
RF1AIFCTL1 &= ~(RFSTATIFG);
/* Wait for radio to be ready for next instruction */
while (!(RF1AIFCTL1 & RFINSTRIFG));
/* Write the strobe instruction */
if ((c > RF_SRES) && (c < RF_SNOP)) {
uint16_t gdo_state = cc110x_read_reg(IOCFG2); /* buffer IOCFG2 state */
cc110x_write_reg(IOCFG2, 0x29); /* c-ready to GDO2 */
RF1AINSTRB = c;
if ((RF1AIN & 0x04) == 0x04) { /* chip at sleep mode */
if ((c == RF_SXOFF) || (c == RF_SPWD) || (c == RF_SWOR)) { }
else {
while ((RF1AIN & 0x04) == 0x04); /* c-ready ? */
hwtimer_wait(RTIMER_TICKS(9800)); /* Delay for ~810usec at 12MHz CPU clock */
}
}
cc110x_write_reg(IOCFG2, gdo_state); /* restore IOCFG2 setting */
}
else { /* chip active mode */
RF1AINSTRB = c;
}
statusByte = RF1ASTATB;
while (!(RF1AIFCTL1 & RFSTATIFG));
restoreIRQ(int_state);
}
return statusByte;
}
/***************************************************************************************************
* @fn cc110x_read_reg
* @brief Read byte from register.
* @param none
* @return none
***************************************************************************************************/
uint8_t cc110x_read_reg(uint8_t addr)
{
unsigned char x;
uint16_t int_state;
int_state = disableIRQ();
RF1AINSTR1B = (addr | RF_REGRD);
x = RF1ADOUT1B;
restoreIRQ(int_state);
return x;
}
/**************************************************************************************************
* @fn cc110x_write_reg
* @brief Write byte to register.
* @param none
* @return none
**************************************************************************************************/
void cc110x_write_reg(uint8_t addr, uint8_t value)
{
volatile unsigned int i;
uint16_t int_state;
int_state = disableIRQ();
while (!(RF1AIFCTL1 & RFINSTRIFG)); /* Wait for the Radio to be ready for the next instruction */
RF1AINSTRW = ((addr | RF_REGWR) << 8) + value; /* Send address + Instruction */
while (!(RFDINIFG & RF1AIFCTL1));
/* cppcheck: need to force a read to RF1ADOUTB to trigger reset */
/* cppcheck-suppress unreadVariable */
i = RF1ADOUTB; /* Reset RFDOUTIFG flag which contains status byte */
(void)i; /* Ignore variable 'i' set but not used [-Werror=unused-but-set-variable] */
restoreIRQ(int_state);
}
uint8_t cc110x_read_status(uint8_t addr)
{
unsigned char x;
uint16_t int_state;
int_state = disableIRQ();
RF1AINSTR1B = (addr | RF_STATREGRD);
x = RF1ADOUT1B;
restoreIRQ(int_state);
return x;
}
/****************************************************************************************************
* @fn cc110x_readburst_reg
* @brief Read sequence of bytes from register.
* @param none
* @return none
***************************************************************************************************/
void cc110x_readburst_reg(uint8_t addr, char *buffer, uint8_t count)
{
unsigned int i;
uint16_t int_state;
int_state = disableIRQ();
while (!(RF1AIFCTL1 & RFINSTRIFG)); /* Wait for the Radio to be ready for next instruction */
RF1AINSTR1B = (addr | RF_REGRD); /* Send address + Instruction */
for (i = 0; i < (count - 1); i++) {
while (!(RFDOUTIFG & RF1AIFCTL1)); /* Wait for the Radio Core to update the RF1ADOUTB reg */
buffer[i] = RF1ADOUT1B; /* Read DOUT from Radio Core + clears RFDOUTIFG */
/* Also initiates auo-read for next DOUT byte */
}
buffer[count - 1] = RF1ADOUT0B; /* Store the last DOUT from Radio Core */
restoreIRQ(int_state);
}
void cc110x_read_fifo(char *buffer, uint8_t count)
{
unsigned int i;
uint16_t int_state;
int_state = disableIRQ();
while (!(RF1AIFCTL1 & RFINSTRIFG)); /* Wait for the Radio to be ready for next instruction */
RF1AINSTR1B = (RF_RXFIFORD); /* Send address + Instruction */
for (i = 0; i < (count - 1); i++) {
while (!(RFDOUTIFG & RF1AIFCTL1)); /* Wait for the Radio Core to update the RF1ADOUTB reg */
buffer[i] = RF1ADOUT1B; /* Read DOUT from Radio Core + clears RFDOUTIFG */
/* Also initiates auo-read for next DOUT byte */
}
buffer[count - 1] = RF1ADOUT0B; /* Store the last DOUT from Radio Core */
restoreIRQ(int_state);
}
/***************************************************************************************************
* @fn cc110x_writeburst_reg
* @brief Write sequence of bytes to register.
* @param none
* @return none
**************************************************************************************************/
uint8_t cc110x_writeburst_reg(uint8_t addr, char *buffer, uint8_t count)
{
/* Write Burst works wordwise not bytewise - bug known already */
unsigned char i;
uint16_t int_state;
int_state = disableIRQ();
while (!(RF1AIFCTL1 & RFINSTRIFG)); /* Wait for the Radio to be ready for next instruction */
RF1AINSTRW = ((addr | RF_REGWR) << 8) + buffer[0]; /* Send address + Instruction */
for (i = 1; i < count; i++) {
RF1ADINB = buffer[i]; /* Send data */
while (!(RFDINIFG & RF1AIFCTL1)); /* Wait for TX to finish */
}
/* cppcheck: need to force a read to RF1ADOUTB to trigger reset */
/* cppcheck-suppress unreadVariable */
i = RF1ADOUTB; /* Reset RFDOUTIFG flag which contains status byte */
restoreIRQ(int_state);
return count;
}
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