[cpu lpc2387]
* added mci driver [sys shell] * added commands for memory card accessdev/timer
parent
aeb67a481b
commit
7b1b145b4f
@ -0,0 +1,96 @@
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@-----------------------------------------------------------@
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@ Fast Block Copy (declared in diskio.h)
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@-----------------------------------------------------------@
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.global Copy_un2al
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.arm
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Copy_un2al:
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STMFD SP!, {R4-R8}
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ANDS IP, R1, #3
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BEQ lb_align
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BIC R1, #3
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MOV IP, IP, LSL #3
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RSB R8, IP, #32
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LDMIA R1!, {R7}
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lb_l1: MOV R3, R7
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LDMIA R1!, {R4-R7}
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MOV R3, R3, LSR IP
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ORR R3, R3, R4, LSL R8
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MOV R4, R4, LSR IP
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ORR R4, R4, R5, LSL R8
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MOV R5, R5, LSR IP
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ORR R5, R5, R6, LSL R8
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MOV R6, R6, LSR IP
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ORR R6, R6, R7, LSL R8
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SUBS R2, R2, #16
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STMIA R0!, {R3-R6}
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BNE lb_l1
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LDMFD SP!, {R4-R8}
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BX LR
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lb_align:
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LDMIA R1!, {R3-R6}
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SUBS R2, R2, #16
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STMIA R0!, {R3-R6}
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BNE lb_align
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LDMFD SP!, {R4-R8}
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BX LR
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.global Copy_al2un
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.arm
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Copy_al2un:
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STMFD SP!, {R4-R8}
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ANDS IP, R0, #3
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BEQ sb_align
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MOV IP, IP, LSL #3
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RSB R8, IP, #32
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LDMIA R1!, {R4-R7}
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sb_p1: STRB R4, [R0], #1
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MOV R4, R4, LSR #8
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TST R0, #3
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BNE sb_p1
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ORR R4, R4, R5, LSL IP
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MOV R5, R5, LSR R8
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ORR R5, R5, R6, LSL IP
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MOV R6, R6, LSR R8
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ORR R6, R6, R7, LSL IP
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SUBS R2, R2, #16
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STMIA R0!, {R4-R6}
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sb_l1: MOV R3, R7
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LDMIA R1!, {R4-R7}
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MOV R3, R3, LSR R8
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ORR R3, R3, R4, LSL IP
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MOV R4, R4, LSR R8
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ORR R4, R4, R5, LSL IP
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MOV R5, R5, LSR R8
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ORR R5, R5, R6, LSL IP
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MOV R6, R6, LSR R8
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ORR R6, R6, R7, LSL IP
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SUBS R2, R2, #16
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STMIA R0!, {R3-R6}
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BNE sb_l1
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MOV R7, R7, LSR R8
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sb_p2: SUBS IP, IP, #8
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STRB R7, [R0], #1
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MOV R7, R7, LSR #8
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BNE sb_p2
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LDMFD SP!, {R4-R8}
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BX LR
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sb_align:
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LDMIA R1!, {R3-R6}
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SUBS R2, #16
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STMIA R0!, {R3-R6}
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BNE sb_align
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LDMFD SP!, {R4-R8}
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BX LR
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.end
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@ -0,0 +1,890 @@
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/*-----------------------------------------------------------------------*/
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/* MMCv3/SDv1/SDv2 (in native mode via MCI) control module (C)ChaN, 2010 */
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/*-----------------------------------------------------------------------*/
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/* This program is opened under license policy of following trems.
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/
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/ Copyright (C) 2010, ChaN, all right reserved.
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/
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/ * This program is a free software and there is NO WARRANTY.
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/ * No restriction on use. You can use, modify and redistribute it for
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/ personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY.
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/ * Redistributions of source code must retain the above copyright notice.
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/
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/---------------------------------------------------------------------------*/
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#include <string.h>
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#include "lpc23xx.h"
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#include "VIC.h"
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#include "hwtimer.h"
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#include "diskio.h"
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#define ENABLE_DEBUG
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#include "debug.h"
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extern unsigned long hwtimer_now(void);
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/* --- MCI configurations --- */
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#define N_BUF 4 /* Block transfer FIFO depth (>= 2) */
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#define USE_4BIT 1 /* Use wide bus mode if SDC is detected */
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#define PCLK 36000000UL /* PCLK supplied to MCI module */
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#define MCLK_ID 400000UL /* MCICLK for ID state (100k-400k) */
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#define MCLK_RW 18000000UL /* MCICLK for data transfer (PCLK divided by even number) */
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/* This MCI driver assumes that MCLK_RW is CCLK/4 or slower. If block buffer underrun/overrun
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/ occured due to any interrupt by higher priority process or slow external memory, increasing
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/ N_BUF or decreasing MCLK_RW will solve it. */
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/* ----- Port definitions ----- */
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#define SOCKINS !(FIO0PIN2 & 0x20) /* Card detect switch */
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#define SOCKWP (FIO0PIN2 & 0x04) /* Write protect switch */
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/* ----- MMC/SDC command ----- */
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#define CMD0 (0) /* GO_IDLE_STATE */
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#define CMD1 (1) /* SEND_OP_COND (MMC) */
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#define CMD2 (2) /* ALL_SEND_CID */
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#define CMD3 (3) /* SEND_RELATIVE_ADDR */
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#define ACMD6 (6|0x80) /* SET_BUS_WIDTH (SDC) */
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#define CMD7 (7) /* SELECT_CARD */
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#define CMD8 (8) /* SEND_IF_COND */
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#define CMD9 (9) /* SEND_CSD */
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#define CMD10 (10) /* SEND_CID */
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#define CMD12 (12) /* STOP_TRANSMISSION */
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#define CMD13 (13) /* SEND_STATUS */
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#define ACMD13 (13|0x80) /* SD_STATUS (SDC) */
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#define CMD16 (16) /* SET_BLOCKLEN */
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#define CMD17 (17) /* READ_SINGLE_BLOCK */
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#define CMD18 (18) /* READ_MULTIPLE_BLOCK */
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#define CMD23 (23) /* SET_BLK_COUNT (MMC) */
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#define ACMD23 (23|0x80) /* SET_WR_BLK_ERASE_COUNT (SDC) */
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#define CMD24 (24) /* WRITE_BLOCK */
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#define CMD25 (25) /* WRITE_MULTIPLE_BLOCK */
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#define CMD32 (32) /* ERASE_ER_BLK_START */
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#define CMD33 (33) /* ERASE_ER_BLK_END */
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#define CMD38 (38) /* ERASE */
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#define ACMD41 (41|0x80) /* SEND_OP_COND (SDC) */
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#define CMD55 (55) /* APP_CMD */
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/* Card type flags (CardType) */
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#define CT_MMC 0x01 /* MMC ver 3 */
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#define CT_SD1 0x02 /* SD ver 1 */
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#define CT_SD2 0x04 /* SD ver 2 */
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#define CT_SDC (CT_SD1|CT_SD2) /* SD */
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#define CT_BLOCK 0x08 /* Block addressing */
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/*--------------------------------------------------------------------------
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Module Private Functions
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---------------------------------------------------------------------------*/
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static volatile DSTATUS Stat = STA_NOINIT; /* Disk status */
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static unsigned short CardRCA; /* Assigned RCA */
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static unsigned char CardType, /* Card type flag */
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CardInfo[16+16+4]; /* CSD(16), CID(16), OCR(4) */
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static volatile unsigned char XferStat, /* b3:MCI error, b2:Overrun, b1:Write, b0:Read */
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XferWc, /* Write block counter */
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XferWp, XferRp; /* R/W index of block FIFO */
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static unsigned long DmaBuff[N_BUF][128] __attribute__ ((section(".usbdata"))); /* Block transfer FIFO */
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static unsigned long LinkList [N_BUF][4] __attribute__ ((section(".usbdata"))); /* DMA link list */
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void Isr_MCI (void) __attribute__ ((interrupt("IRQ")));
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void Isr_GPDMA (void) __attribute__ ((interrupt("IRQ")));
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/*-----------------------------------------------------------------------*/
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/* Interrupt service routine for data transfer */
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/*-----------------------------------------------------------------------*/
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void Isr_MCI (void) {
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unsigned long ms;
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unsigned char n, xs;
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ms = MCI_STATUS & 0x073A; /* Clear MCI interrupt status */
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MCI_CLEAR = ms;
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xs = XferStat;
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if (ms & 0x400) { /* A block transfer completed (DataBlockEnd) */
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if (xs & 1) { /* In card read operation */
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if (ms & 0x100) /* When last block is received (DataEnd), */
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GPDMA_SOFT_BREQ = 0x10; /* Pop off remaining data in the MCIFIFO */
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n = (XferWp + 1) % N_BUF; /* Next write buffer */
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XferWp = n;
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if (n == XferRp) xs |= 4; /* Check block overrun */
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}
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else { /* In card write operation */
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n = (XferRp + 1) % N_BUF; /* Next read buffer */
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XferRp = n;
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if (n == XferWp) xs |= 4; /* Check block underrun */
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}
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}
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else { /* An MCI error occured (not DataBlockEnd) */
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xs |= 8;
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}
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XferStat = xs;
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VICVectAddr = 0;
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}
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void Isr_GPDMA (void) {
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if(GPDMA_INT_TCSTAT & BIT0)
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{
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GPDMA_INT_TCCLR = 0x01; /* Clear GPDMA interrupt flag */
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if (XferStat & 2)
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{
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/* In write operation */
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if (--XferWc == N_BUF) /* Terminate LLI */
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{
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LinkList[XferRp % N_BUF][2] = 0;
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}
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}
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}
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else
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{
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GPDMA_INT_TCCLR = 0x3;
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}
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VICVectAddr = 0;
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}
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/*-----------------------------------------------------------------------*/
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/* Ready for data reception */
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/*-----------------------------------------------------------------------*/
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/**
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* @param blks Number of blocks to receive (1..127)
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* @param bs Block size (64 or 512)
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* */
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static void ready_reception (unsigned int blks, unsigned int bs) {
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unsigned int n;
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unsigned long dma_ctrl;
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/* ------ Setting up GPDMA Ch-0 ------ */
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GPDMA_CH0_CFG &= 0xFFF80420; /* Disable ch-0 */
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GPDMA_INT_TCCLR = 0x01; /* Clear interrupt flag */
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dma_ctrl = 0x88492000 | (bs / 4); /* 1_000_1_0_00_010_010_010_010_************ */
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/* Create link list */
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for (n = 0; n < N_BUF; n++) {
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LinkList[n][0] = (unsigned long)&MCI_FIFO;
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LinkList[n][1] = (unsigned long)DmaBuff[n];
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LinkList[n][2] = (unsigned long)LinkList[(n + 1) % N_BUF];
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LinkList[n][3] = dma_ctrl;
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}
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/* Load first LLI */
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GPDMA_CH0_SRC = LinkList[0][0];
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GPDMA_CH0_DEST = LinkList[0][1];
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GPDMA_CH0_LLI = LinkList[0][2];
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GPDMA_CH0_CTRL = LinkList[0][3];
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/* Enable ch-0 */
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GPDMA_CH0_CFG |= 0x19009; /* *************_0_0_1_1_0_010_*_0000_*_0100_1 */
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/* --------- Setting up MCI ---------- */
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XferRp = 0; XferWp = 0; /* Block FIFO R/W index */
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XferStat = 1; /* Transfer status: MCI --> Memory */
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MCI_DATA_LEN = bs * blks; /* Set total data length */
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MCI_DATA_TMR = (unsigned long)(MCLK_RW * 0.2); /* Data timer: 0.2sec */
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MCI_CLEAR = 0x72A; /* Clear status flags */
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MCI_MASK0 = 0x72A; /* DataBlockEnd StartBitErr DataEnd RxOverrun DataTimeOut DataCrcFail */
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for (n = 0; bs > 1; bs >>= 1, n += 0x10);
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MCI_DATA_CTRL = n | 0xB; /* Start to receive data blocks */
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}
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/*-----------------------------------------------------------------------*/
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/* Start to transmit a data block */
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/*-----------------------------------------------------------------------*/
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#if _READONLY == 0
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/*
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* @param blks Number of blocks to be transmitted (1..127)
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* */
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static void start_transmission ( unsigned char blks) {
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unsigned int n;
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unsigned long dma_ctrl;
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/* ------ Setting up GPDMA Ch-0 ------ */
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GPDMA_CH0_CFG &= 0xFFF80420; /* Disable ch-0 */
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GPDMA_INT_TCCLR = 0x01; /* Clear interrupt flag */
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dma_ctrl = 0x84492080; /* 1_000_0_1_00_010_010_010_010_000010000000 */
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/* Create link list */
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for (n = 0; n < N_BUF; n++) {
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LinkList[n][0] = (unsigned long)DmaBuff[n];
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LinkList[n][1] = (unsigned long)&MCI_FIFO;
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LinkList[n][2] = (n == blks - 1) ? 0 : (unsigned long)LinkList[(n + 1) % N_BUF];
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LinkList[n][3] = dma_ctrl;
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}
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/* Load first LLI */
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GPDMA_CH0_SRC = LinkList[0][0];
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GPDMA_CH0_DEST = LinkList[0][1];
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GPDMA_CH0_LLI = LinkList[0][2];
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GPDMA_CH0_CTRL = LinkList[0][3];
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/* Enable ch-0 */
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GPDMA_CH0_CFG |= 0x18901; /* *************_0_0_1_1_0_001_*_0100_*_0000_1 */
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/* --------- Setting up MCI ---------- */
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XferRp = 0; /* Block FIFO read index */
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XferWc = blks;
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XferStat = 2; /* Transfer status: Memroy --> MCI */
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MCI_DATA_LEN = 512 * (blks + 1); /* Set total data length */
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MCI_DATA_TMR = (unsigned long)(MCLK_RW * 0.5); /* Data timer: 0.5sec */
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MCI_CLEAR = 0x51A; /* Clear status flags */
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MCI_MASK0 = 0x51A; /* DataBlockEnd DataEnd TxUnderrun DataTimeOut DataCrcFail */
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MCI_DATA_CTRL = (9 << 4) | 0x9; /* Start to transmit data blocks */
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}
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#endif /* _READONLY */
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/*-----------------------------------------------------------------------*/
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/* Stop data transfer */
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/*-----------------------------------------------------------------------*/
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static void stop_transfer (void) {
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MCI_MASK0 = 0; /* Disable MCI interrupt */
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MCI_DATA_CTRL = 0; /* Stop MCI data transfer */
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GPDMA_CH0_CFG &= 0xFFF80420; /* Disable DMA ch-0 */
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}
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/*-----------------------------------------------------------------------*/
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/* Power Control (Device dependent) */
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/*-----------------------------------------------------------------------*/
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static int power_status (void) {
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return (MCI_POWER & 3) ? 1 : 0;
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}
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static void power_on (void) {
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/* Enable MCI and GPDMA clock */
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PCONP |= (3 << 28);
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/* Enable GPDMA controller with little-endian */
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GPDMA_CH0_CFG &= 0xFFF80000; /* Disable DMA ch-0 */
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GPDMA_CONFIG = 0x01;
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/* Select PCLK for MCI, CCLK/2 = 36MHz */
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PCLKSEL1 = (PCLKSEL1 & 0xFCFFFFFF) | 0x02000000;
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//0.19 0.20 0.21 0.22
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PINMODE1 &= ~( (BIT6 | BIT7) | (BIT8 | BIT9) | (BIT10 | BIT11) | (BIT12 | BIT13) );
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PINMODE1 |= (BIT7) | (BIT9) | (BIT11) | (BIT13); // no resistors
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//2.11 2.12 2.13
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PINMODE4 &= ~( (BIT22 | BIT23) | (BIT24 | BIT25) | (BIT26 | BIT27) );
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PINMODE4 |= (BIT23) | (BIT25) | (BIT27); // no resistors
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/* Attach MCI unit to I/O pad */
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PINSEL1 = (PINSEL1 & 0xFFFFC03F) | 0x00002A80; /* MCICLK, MCICMD, MCIDATA0, MCIPWR */
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#if USE_4BIT
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PINSEL4 = (PINSEL4 & 0xF03FFFFF) | 0x0A800000; /* MCIDATA1-3 */
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#endif
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MCI_MASK0 = 0;
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MCI_COMMAND = 0;
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MCI_DATA_CTRL = 0;
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// pin 0.21 high active
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SCS |= 0x08;
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/* Register interrupt handlers for MCI,DMA event */
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//RegisterIrq(MCI_INT, Isr_MCI, PRI_LOWEST-1);
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install_irq( MCI_INT, (void *)Isr_MCI, 5 );
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//RegisterIrq(GPDMA_INT, Isr_GPDMA, PRI_LOWEST-1);
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install_irq( GPDMA_INT, (void *)Isr_GPDMA, 5 );
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/* Power-on (VCC is always tied to the socket on this board) */
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MCI_POWER = 0x01; /* Power on */
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//for (Timer[0] = 10; Timer[0]; ) ; /* 10ms */
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hwtimer_wait(1000);
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MCI_POWER = 0x03; /* Enable signals */
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}
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static void power_off (void) {
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MCI_MASK0 = 0;
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MCI_COMMAND = 0;
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MCI_DATA_CTRL = 0;
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MCI_POWER = 0; /* Power-off */
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MCI_CLOCK = 0;
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// pin 0.21 low inactive
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SCS &= ~0x08;
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//0.21 MCI led Pin (turns sd card off, too)
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//0.19 0.20 0.21 0.22 with pull-down
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PINMODE1 |= (BIT6 | BIT7) | (BIT8 | BIT9) | (BIT10 | BIT11) | (BIT12 | BIT13);
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PINSEL1 &= ~( (BIT6 | BIT7) | (BIT8 | BIT9) | (BIT10 | BIT11) | (BIT12 | BIT13) );
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// Pins should be now configured as standard input (see board_init.c if you accidentally reconfigured them)
|
||||
|
||||
//2.11 2.12 2.13 with pull-down
|
||||
PINMODE4 |= (BIT22 | BIT23) | (BIT24 | BIT25) | (BIT26 | BIT27);
|
||||
PINSEL4 &= ~( (BIT22 | BIT23) | (BIT24 | BIT25) | (BIT26 | BIT27) );
|
||||
// Pins should be now configured as standard input (see board_init.c if you accidentally reconfigured them)
|
||||
|
||||
Stat |= STA_NOINIT;
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Send a command packet to the card and receive a response */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* @param idx Command index (bit[5..0]), ACMD flag (bit7)
|
||||
* @param arg Command argument
|
||||
* @param rt Expected response type. None(0), Short(1) or Long(2)
|
||||
* @param *buff Response return buffer
|
||||
* @return 1 when function succeeded otherwise returns 0
|
||||
* */
|
||||
static int send_cmd (unsigned int idx, unsigned long arg, unsigned int rt, unsigned long *buff) {
|
||||
unsigned int s, mc;
|
||||
|
||||
if (idx & 0x80) { /* Send a CMD55 prior to the specified command if it is ACMD class */
|
||||
if (!send_cmd(CMD55, (unsigned long)CardRCA << 16, 1, buff) /* When CMD55 is faild, */
|
||||
|| !(buff[0] & 0x00000020)) return 0; /* exit with error */
|
||||
}
|
||||
idx &= 0x3F; /* Mask out ACMD flag */
|
||||
|
||||
do { /* Wait while CmdActive bit is set */
|
||||
MCI_COMMAND = 0; /* Cancel to transmit command */
|
||||
MCI_CLEAR = 0x0C5; /* Clear status flags */
|
||||
for (s = 0; s < 10; s++) MCI_STATUS; /* Skip lock out time of command reg. */
|
||||
} while (MCI_STATUS & 0x00800);
|
||||
|
||||
MCI_ARGUMENT = arg; /* Set the argument into argument register */
|
||||
mc = 0x400 | idx; /* Enable bit + index */
|
||||
if (rt == 1) mc |= 0x040; /* Set Response bit to reveice short resp */
|
||||
if (rt > 1) mc |= 0x0C0; /* Set Response and LongResp bit to receive long resp */
|
||||
MCI_COMMAND = mc; /* Initiate command transaction */
|
||||
|
||||
//Timer[1] = 100;
|
||||
uint32_t timerstart = hwtimer_now();
|
||||
|
||||
for (;;) { /* Wait for end of the cmd/resp transaction */
|
||||
|
||||
//if (!Timer[1]) return 0;
|
||||
if(hwtimer_now() - timerstart > 10000)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
s = MCI_STATUS; /* Get the transaction status */
|
||||
|
||||
if (rt == 0)
|
||||
{
|
||||
if (s & 0x080)
|
||||
return 1; /* CmdSent */
|
||||
}
|
||||
else
|
||||
{
|
||||
if (s & 0x040)
|
||||
break; /* CmdRespEnd */
|
||||
if (s & 0x001)
|
||||
{ /* CmdCrcFail */
|
||||
if (idx == 1 || idx == 12 || idx == 41) /* Ignore CRC error on CMD1/12/41 */
|
||||
break;
|
||||
return 0;
|
||||
}
|
||||
if (s & 0x004)
|
||||
return 0; /* CmdTimeOut */
|
||||
}
|
||||
}
|
||||
|
||||
buff[0] = MCI_RESP0; /* Read the response words */
|
||||
if (rt == 2) {
|
||||
buff[1] = MCI_RESP1;
|
||||
buff[2] = MCI_RESP2;
|
||||
buff[3] = MCI_RESP3;
|
||||
}
|
||||
|
||||
return 1; /* Return with success */
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Wait card ready */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @param tmr Timeout in unit of 1ms
|
||||
* @returns 1 when card is tran state, otherwise returns 0
|
||||
*/
|
||||
static int wait_ready (unsigned short tmr) {
|
||||
unsigned long rc;
|
||||
|
||||
uint32_t stoppoll = hwtimer_now() + tmr * 100;
|
||||
bool bBreak = false;
|
||||
while (hwtimer_now() < stoppoll/*Timer[0]*/)
|
||||
{
|
||||
if (send_cmd(CMD13, (unsigned long) CardRCA << 16, 1, &rc) && ((rc & 0x01E00) == 0x00800))
|
||||
{
|
||||
bBreak = true;
|
||||
break;
|
||||
}
|
||||
/* This loop will take a time. Insert rot_rdq() here for multitask envilonment. */
|
||||
}
|
||||
return bBreak;//Timer[0] ? 1 : 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Swap byte order */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
static void bswap_cp (unsigned char *dst, const unsigned long *src) {
|
||||
unsigned long d;
|
||||
|
||||
|
||||
d = *src;
|
||||
*dst++ = (unsigned char)(d >> 24);
|
||||
*dst++ = (unsigned char)(d >> 16);
|
||||
*dst++ = (unsigned char)(d >> 8);
|
||||
*dst++ = (unsigned char)(d >> 0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------
|
||||
|
||||
Public Functions
|
||||
|
||||
---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Initialize Disk Drive */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
DSTATUS MCI_initialize (void) {
|
||||
unsigned int cmd, n;
|
||||
unsigned long resp[4];
|
||||
unsigned char ty;
|
||||
|
||||
if (Stat & STA_NODISK) return Stat; /* No card in the socket */
|
||||
|
||||
power_off();
|
||||
|
||||
hwtimer_wait(HWTIMER_TICKS(1000));
|
||||
|
||||
power_on(); /* Force socket power on */
|
||||
MCI_CLOCK = 0x100 | (PCLK/MCLK_ID/2-1); /* Set MCICLK = MCLK_ID */
|
||||
//for (Timer[0] = 2; Timer[0]; );
|
||||
hwtimer_wait(250);
|
||||
|
||||
send_cmd(CMD0, 0, 0, NULL); /* Enter idle state */
|
||||
CardRCA = 0;
|
||||
|
||||
/*---- Card is 'idle' state ----*/
|
||||
|
||||
/* Initialization timeout of 1000 msec */
|
||||
uint32_t start = hwtimer_now();
|
||||
|
||||
/* SDC Ver2 */
|
||||
if (send_cmd(CMD8, 0x1AA, 1, resp) && (resp[0] & 0xFFF) == 0x1AA) {
|
||||
/* The card can work at vdd range of 2.7-3.6V */
|
||||
DEBUG("SDC Ver. 2\n");
|
||||
|
||||
do { /* Wait while card is busy state (use ACMD41 with HCS bit) */
|
||||
/* This loop will take a time. Insert wai_tsk(1) here for multitask envilonment. */
|
||||
if (hwtimer_now() > start + 1000000/*!Timer[0]*/) {
|
||||
DEBUG("%s, %d: Timeout #1\n", __FILE__, __LINE__);
|
||||
goto di_fail;
|
||||
}
|
||||
} while (!send_cmd(ACMD41, 0x40FF8000, 1, resp) || !(resp[0] & 0x80000000));
|
||||
|
||||
ty = (resp[0] & 0x40000000) ? CT_SD2|CT_BLOCK : CT_SD2; /* Check CCS bit in the OCR */
|
||||
}
|
||||
else { /* SDC Ver1 or MMC */
|
||||
if (send_cmd(ACMD41, 0x00FF8000, 1, resp)) {
|
||||
DEBUG("SDC Ver. 1\n");
|
||||
ty = CT_SD1;
|
||||
cmd = ACMD41; /* ACMD41 is accepted -> SDC Ver1 */
|
||||
}
|
||||
else {
|
||||
DEBUG("MMC\n");
|
||||
ty = CT_MMC;
|
||||
cmd = CMD1; /* ACMD41 is rejected -> MMC */
|
||||
}
|
||||
do { /* Wait while card is busy state (use ACMD41 or CMD1) */
|
||||
DEBUG("%s, %d: %lX\n", __FILE__, __LINE__, resp[0]);
|
||||
/* This loop will take a time. Insert wai_tsk(1) here for multitask envilonment. */
|
||||
if (hwtimer_now() > start + 1000000/*!Timer[0]*/) {
|
||||
DEBUG("now: %lu, started at: %lu\n", hwtimer_now(), start);
|
||||
DEBUG("%s, %d: Timeout #2\n", __FILE__, __LINE__);
|
||||
goto di_fail;
|
||||
}
|
||||
} while (!send_cmd(cmd, 0x00FF8000, 1, resp) || !(resp[0] & 0x80000000));
|
||||
}
|
||||
|
||||
CardType = ty; /* Save card type */
|
||||
bswap_cp(&CardInfo[32], resp); /* Save OCR */
|
||||
|
||||
/*---- Card is 'ready' state ----*/
|
||||
|
||||
if (!send_cmd(CMD2, 0, 2, resp)) {
|
||||
DEBUG("%s, %d: Failed entering ident state", __FILE__, __LINE__);
|
||||
goto di_fail; /* Enter ident state */
|
||||
}
|
||||
for (n = 0; n < 4; n++) bswap_cp(&CardInfo[n * 4 + 16], &resp[n]); /* Save CID */
|
||||
|
||||
/*---- Card is 'ident' state ----*/
|
||||
|
||||
if (ty & CT_SDC) { /* SDC: Get generated RCA and save it */
|
||||
if (!send_cmd(CMD3, 0, 1, resp)) {
|
||||
DEBUG("%s, %d: Failed generating RCA\n", __FILE__, __LINE__);
|
||||
goto di_fail;
|
||||
}
|
||||
CardRCA = (unsigned short)(resp[0] >> 16);
|
||||
} else { /* MMC: Assign RCA to the card */
|
||||
if (!send_cmd(CMD3, 1 << 16, 1, resp)) goto di_fail;
|
||||
CardRCA = 1;
|
||||
}
|
||||
|
||||
/*---- Card is 'stby' state ----*/
|
||||
|
||||
if (!send_cmd(CMD9, (unsigned long)CardRCA << 16, 2, resp)) /* Get CSD and save it */
|
||||
{
|
||||
//printf("MCI CMD9 fail\n");
|
||||
goto di_fail;
|
||||
}
|
||||
for (n = 0; n < 4; n++) bswap_cp(&CardInfo[n * 4], &resp[n]);
|
||||
|
||||
if (!send_cmd(CMD7, (unsigned long)CardRCA << 16, 1, resp)) /* Select card */
|
||||
{
|
||||
//printf("MCI CMD7 fail\n");
|
||||
goto di_fail;
|
||||
}
|
||||
|
||||
/*---- Card is 'tran' state ----*/
|
||||
|
||||
if (!(ty & CT_BLOCK)) { /* Set data block length to 512 (for byte addressing cards) */
|
||||
if (!send_cmd(CMD16, 512, 1, resp) || (resp[0] & 0xFDF90000))
|
||||
{
|
||||
//printf("MCI CMD16 fail\n");
|
||||
goto di_fail;
|
||||
}
|
||||
}
|
||||
|
||||
#if USE_4BIT
|
||||
if (ty & CT_SDC) { /* Set wide bus mode (for SDCs) */
|
||||
if (!send_cmd(ACMD6, 2, 1, resp) /* Set bus mode of SDC */
|
||||
|| (resp[0] & 0xFDF90000))
|
||||
{
|
||||
//printf("MCI ACMD6 fail\n");
|
||||
goto di_fail;
|
||||
}
|
||||
MCI_CLOCK |= 0x800; /* Set bus mode of MCI */
|
||||
}
|
||||
#endif
|
||||
|
||||
MCI_CLOCK = (MCI_CLOCK & 0xF00) | 0x200 | (PCLK/MCLK_RW/2-1); /* Set MCICLK = MCLK_RW, power-save mode */
|
||||
|
||||
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT */
|
||||
return Stat;
|
||||
|
||||
di_fail:
|
||||
power_off();
|
||||
Stat |= STA_NOINIT; /* Set STA_NOINIT */
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Get Disk Status */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DSTATUS MCI_status (void) {
|
||||
return Stat;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Read Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
/**
|
||||
* @param buff Pointer to the data buffer to store read data
|
||||
* @param sector Start sector number (LBA)
|
||||
* @param count Sector count (1..127)
|
||||
*/
|
||||
DRESULT MCI_read (unsigned char *buff, unsigned long sector, unsigned char count) {
|
||||
unsigned long resp;
|
||||
unsigned int cmd;
|
||||
unsigned char rp;
|
||||
|
||||
|
||||
if (count < 1 || count > 127) return RES_PARERR; /* Check parameter */
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert LBA to byte address if needed */
|
||||
if (!wait_ready(500)) return RES_ERROR; /* Make sure that card is tran state */
|
||||
|
||||
ready_reception(count, 512); /* Ready to receive data blocks */
|
||||
|
||||
cmd = (count > 1) ? CMD18 : CMD17; /* Transfer type: Single block or Multiple block */
|
||||
|
||||
if (send_cmd(cmd, sector, 1, &resp) /* Start to read */
|
||||
&& !(resp & 0xC0580000))
|
||||
{
|
||||
rp = 0;
|
||||
do
|
||||
{
|
||||
while ((rp == XferWp) && !(XferStat & 0xC))
|
||||
{ /* Wait for block arrival */
|
||||
/* This loop will take a time. Replace it with sync process for multitask envilonment. */
|
||||
}
|
||||
if (XferStat & 0xC)
|
||||
{
|
||||
break; /* Abort if any error has occured */
|
||||
}
|
||||
|
||||
Copy_al2un(buff, DmaBuff[rp], 512); /* Pop an block */
|
||||
|
||||
XferRp = rp = (rp + 1) % N_BUF; /* Next DMA buffer */
|
||||
if (XferStat & 0xC)
|
||||
{
|
||||
break; /* Abort if overrun has occured */
|
||||
}
|
||||
buff += 512; /* Next user buffer address */
|
||||
}
|
||||
while (--count);
|
||||
if (cmd == CMD18) /* Terminate to read (MB) */
|
||||
send_cmd(CMD12, 0, 1, &resp);
|
||||
}
|
||||
|
||||
stop_transfer(); /* Close data path */
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Write Sector(s) */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
#if _READONLY == 0
|
||||
|
||||
/**
|
||||
* @param buff Pointer to the data to be written
|
||||
* @param sector Start sector number (LBA)
|
||||
* @param count Sector count (1..127)
|
||||
* */
|
||||
DRESULT MCI_write (const unsigned char *buff, unsigned long sector, unsigned char count) {
|
||||
unsigned long rc;
|
||||
unsigned int cmd;
|
||||
unsigned char wp, xc;
|
||||
|
||||
if (count < 1 || count > 127) return RES_PARERR; /* Check parameter */
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY; /* Check drive status */
|
||||
if (Stat & STA_PROTECT) return RES_WRPRT; /* Check write protection */
|
||||
|
||||
if (!(CardType & CT_BLOCK)) sector *= 512; /* Convert LBA to byte address if needed */
|
||||
if (!wait_ready(500)) return RES_ERROR; /* Make sure that card is tran state */
|
||||
|
||||
if (count == 1) { /* Single block write */
|
||||
cmd = CMD24;
|
||||
}
|
||||
else { /* Multiple block write */
|
||||
cmd = (CardType & CT_SDC) ? ACMD23 : CMD23;
|
||||
if (!send_cmd(cmd, count, 1, &rc) /* Preset number of blocks to write */
|
||||
|| (rc & 0xC0580000)) {
|
||||
return RES_ERROR;
|
||||
}
|
||||
cmd = CMD25;
|
||||
}
|
||||
|
||||
if (!send_cmd(cmd, sector, 1, &rc) /* Send a write command */
|
||||
|| (rc & 0xC0580000)) {
|
||||
return RES_ERROR;
|
||||
}
|
||||
|
||||
wp = 0;
|
||||
xc = count;
|
||||
do { /* Fill block FIFO */
|
||||
Copy_un2al(DmaBuff[wp], (unsigned char*)(unsigned int)buff, 512); /* Push a block */
|
||||
wp++; /* Next DMA buffer */
|
||||
count--;
|
||||
buff += 512; /* Next user buffer address */
|
||||
} while (count && wp < N_BUF);
|
||||
XferWp = wp = wp % N_BUF;
|
||||
start_transmission(xc); /* Start transmission */
|
||||
|
||||
while (count) {
|
||||
while((wp == XferRp) && !(XferStat & 0xC)) { /* Wait for block FIFO not full */
|
||||
/* This loop will take a time. Replace it with sync process for multitask envilonment. */
|
||||
}
|
||||
if (XferStat & 0xC) break; /* Abort if block underrun or any MCI error has occured */
|
||||
Copy_un2al(DmaBuff[wp], (unsigned char*)(unsigned int)buff, 512); /* Push a block */
|
||||
XferWp = wp = (wp + 1) % N_BUF; /* Next DMA buffer */
|
||||
if (XferStat & 0xC) break; /* Abort if block underrun has occured */
|
||||
count--;
|
||||
buff += 512; /* Next user buffer address */
|
||||
}
|
||||
|
||||
while (!(XferStat & 0xC)); /* Wait for all blocks sent (block underrun) */
|
||||
if (XferStat & 0x8) count = 1; /* Abort if any MCI error has occured */
|
||||
|
||||
stop_transfer(); /* Close data path */
|
||||
if (cmd == CMD25 && (CardType & CT_SDC)) /* Terminate to write (SDC w/MB) */
|
||||
send_cmd(CMD12, 0, 1, &rc);
|
||||
|
||||
return count ? RES_ERROR : RES_OK;
|
||||
}
|
||||
#endif /* _READONLY */
|
||||
|
||||
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------*/
|
||||
/* Miscellaneous Functions */
|
||||
/*-----------------------------------------------------------------------*/
|
||||
|
||||
DRESULT MCI_ioctl (
|
||||
unsigned char ctrl, /* Control code */
|
||||
void *buff /* Buffer to send/receive data block */
|
||||
)
|
||||
{
|
||||
DRESULT res;
|
||||
unsigned char b, *ptr = buff;
|
||||
unsigned long resp[4], d, *dp, st, ed;
|
||||
|
||||
|
||||
if (Stat & STA_NOINIT) return RES_NOTRDY;
|
||||
|
||||
res = RES_ERROR;
|
||||
|
||||
switch (ctrl) {
|
||||
case CTRL_SYNC : /* Make sure that all data has been written on the media */
|
||||
if (wait_ready(500)) /* Wait for card enters tarn state */
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case GET_SECTOR_COUNT : /* Get number of sectors on the disk (unsigned long) */
|
||||
if ((CardInfo[0] >> 6) == 1) { /* SDC CSD v2.0 */
|
||||
d = ((unsigned short)CardInfo[8] << 8) + CardInfo[9] + 1;
|
||||
*(unsigned long*)buff = d << 10;
|
||||
} else { /* MMC or SDC CSD v1.0 */
|
||||
b = (CardInfo[5] & 15) + ((CardInfo[10] & 128) >> 7) + ((CardInfo[9] & 3) << 1) + 2;
|
||||
d = (CardInfo[8] >> 6) + ((unsigned short)CardInfo[7] << 2) + ((unsigned short)(CardInfo[6] & 3) << 10) + 1;
|
||||
*(unsigned long*)buff = d << (b - 9);
|
||||
}
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case GET_SECTOR_SIZE : /* Get sectors on the disk (unsigned short) */
|
||||
*(unsigned short*)buff = 512;
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case GET_BLOCK_SIZE : /* Get erase block size in unit of sectors (unsigned long) */
|
||||
if (CardType & CT_SD2) { /* SDC ver 2.00 */
|
||||
*(unsigned long*)buff = 16UL << (CardInfo[10] >> 4);
|
||||
} else { /* SDC ver 1.XX or MMC */
|
||||
if (CardType & CT_SD1) /* SDC v1 */
|
||||
*(unsigned long*)buff = (((CardInfo[10] & 63) << 1) + ((unsigned short)(CardInfo[11] & 128) >> 7) + 1) << ((CardInfo[13] >> 6) - 1);
|
||||
else /* MMC */
|
||||
*(unsigned long*)buff = ((unsigned short)((CardInfo[10] & 124) >> 2) + 1) * (((CardInfo[11] & 3) << 3) + ((CardInfo[11] & 224) >> 5) + 1);
|
||||
}
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case CTRL_ERASE_SECTOR : /* Erase a block of sectors */
|
||||
if (!(CardType & CT_SDC) || (!(CardInfo[0] >> 6) && !(CardInfo[10] & 0x40))) break; /* Check if sector erase can be applied to the card */
|
||||
dp = buff; st = dp[0]; ed = dp[1];
|
||||
if (!(CardType & CT_BLOCK)) {
|
||||
st *= 512; ed *= 512;
|
||||
}
|
||||
if (send_cmd(CMD32, st, 1, resp) && send_cmd(CMD33, ed, 1, resp) && send_cmd(CMD38, 0, 1, resp) && wait_ready(30000))
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case CTRL_POWER :
|
||||
switch (ptr[0]) {
|
||||
case 0: /* Sub control code == 0 (POWER_OFF) */
|
||||
power_off(); /* Power off */
|
||||
res = RES_OK;
|
||||
break;
|
||||
case 1: /* Sub control code == 1 (POWER_GET) */
|
||||
ptr[1] = (unsigned char)power_status();
|
||||
res = RES_OK;
|
||||
break;
|
||||
default :
|
||||
res = RES_PARERR;
|
||||
}
|
||||
break;
|
||||
|
||||
case MMC_GET_TYPE : /* Get card type flags (1 byte) */
|
||||
*ptr = CardType;
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CSD : /* Get CSD (16 bytes) */
|
||||
memcpy(buff, &CardInfo[0], 16);
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_CID : /* Get CID (16 bytes) */
|
||||
memcpy(buff, &CardInfo[16], 16);
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_OCR : /* Get OCR (4 bytes) */
|
||||
memcpy(buff, &CardInfo[32], 4);
|
||||
res = RES_OK;
|
||||
break;
|
||||
|
||||
case MMC_GET_SDSTAT : /* Receive SD status as a data block (64 bytes) */
|
||||
if (CardType & CT_SDC) { /* SDC */
|
||||
if (wait_ready(500)) {
|
||||
ready_reception(1, 64); /* Ready to receive data blocks */
|
||||
if (send_cmd(ACMD13, 0, 1, resp) /* Start to read */
|
||||
&& !(resp[0] & 0xC0580000)) {
|
||||
while ((XferWp == 0) && !(XferStat & 0xC));
|
||||
if (!(XferStat & 0xC)) {
|
||||
Copy_al2un(buff, DmaBuff[0], 64);
|
||||
res = RES_OK;
|
||||
}
|
||||
}
|
||||
}
|
||||
stop_transfer(); /* Close data path */
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
res = RES_PARERR;
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
@ -0,0 +1,107 @@
|
||||
/*-----------------------------------------------------------------------
|
||||
/ Low level disk interface modlue include file (C)ChaN, 2010
|
||||
/-----------------------------------------------------------------------*/
|
||||
|
||||
#ifndef DEF_DISKIO
|
||||
#define DEF_DISKIO
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#define DN_MCI 0 /* Physical drive number for MCI */
|
||||
#define DN_NAND 1 /* Physical drive number for NAND flash */
|
||||
|
||||
/**
|
||||
* @def MCI_PWRSAVE
|
||||
* @ingroup conf
|
||||
* @brief Powerdown mode to use between mci operations
|
||||
*/
|
||||
#ifndef MCI_PWRSAVE
|
||||
#define MCI_PWRSAVE 0
|
||||
#endif
|
||||
|
||||
/* These functions are defined in asmfunc.S */
|
||||
void Copy_al2un (unsigned char *dst, const unsigned long *src, int count); /* Copy aligned to unaligned. */
|
||||
void Copy_un2al (unsigned long *dst, const unsigned char *src, int count); /* Copy unaligned to aligned. */
|
||||
|
||||
|
||||
/* Status of Disk Functions */
|
||||
typedef unsigned char DSTATUS;
|
||||
|
||||
/* Results of Disk Functions */
|
||||
typedef enum {
|
||||
RES_OK = 0, /* 0: Successful */
|
||||
RES_ERROR, /* 1: R/W Error */
|
||||
RES_WRPRT, /* 2: Write Protected */
|
||||
RES_NOTRDY, /* 3: Not Ready */
|
||||
RES_PARERR /* 4: Invalid Parameter */
|
||||
} DRESULT;
|
||||
|
||||
|
||||
/*---------------------------------------*/
|
||||
/* Prototypes for disk control functions */
|
||||
|
||||
DSTATUS disk_initialize (unsigned char);
|
||||
DSTATUS disk_status (unsigned char);
|
||||
DRESULT disk_read (unsigned char, unsigned char*, unsigned long, unsigned char);
|
||||
DRESULT disk_write (unsigned char, const unsigned char*, unsigned long, unsigned char);
|
||||
DRESULT disk_ioctl (unsigned char, unsigned char, void*);
|
||||
|
||||
|
||||
|
||||
/* Disk Status Bits (DSTATUS) */
|
||||
|
||||
#define STA_NOINIT 0x01 /* Drive not initialized */
|
||||
#define STA_NODISK 0x02 /* No medium in the drive */
|
||||
#define STA_PROTECT 0x04 /* Write protected */
|
||||
|
||||
|
||||
/* Command code for disk_ioctrl fucntion */
|
||||
|
||||
/* Generic ioctl command (defined for FatFs) */
|
||||
#define CTRL_SYNC 0 /* Flush disk cache (for write functions) */
|
||||
#define GET_SECTOR_COUNT 1 /* Get media size (for only f_mkfs()) */
|
||||
#define GET_SECTOR_SIZE 2 /* Get sector size (for multiple sector size (_MAX_SS >= 1024)) */
|
||||
#define GET_BLOCK_SIZE 3 /* Get erase block size (for only f_mkfs()) */
|
||||
#define CTRL_ERASE_SECTOR 4 /* Force erased a block of sectors (for only _USE_ERASE) */
|
||||
|
||||
/* Generic ioctl command */
|
||||
#define CTRL_POWER 5 /* Get/Set power status */
|
||||
#define CTRL_LOCK 6 /* Lock/Unlock media removal */
|
||||
#define CTRL_EJECT 7 /* Eject media */
|
||||
|
||||
/* MMC/SDC specific ioctl command */
|
||||
#define MMC_GET_TYPE 10 /* Get card type */
|
||||
#define MMC_GET_CSD 11 /* Get CSD */
|
||||
#define MMC_GET_CID 12 /* Get CID */
|
||||
#define MMC_GET_OCR 13 /* Get OCR */
|
||||
#define MMC_GET_SDSTAT 14 /* Get SD status */
|
||||
|
||||
/* ATA/CF specific ioctl command */
|
||||
#define ATA_GET_REV 20 /* Get F/W revision */
|
||||
#define ATA_GET_MODEL 21 /* Get model name */
|
||||
#define ATA_GET_SN 22 /* Get serial number */
|
||||
|
||||
/* NAND specific ioctl command */
|
||||
#define NAND_FORMAT 30 /* Create physical format */
|
||||
|
||||
|
||||
|
||||
/*---------------------------------------------*/
|
||||
/* Prototypes for each physical disk functions */
|
||||
|
||||
|
||||
DSTATUS NAND_initialize (void);
|
||||
DSTATUS NAND_status (void);
|
||||
DRESULT NAND_read (unsigned char*, unsigned long, unsigned char);
|
||||
DRESULT NAND_write (const unsigned char*, unsigned long, unsigned char);
|
||||
DRESULT NAND_ioctl (unsigned char, void*);
|
||||
|
||||
DSTATUS MCI_initialize (void);
|
||||
DSTATUS MCI_status (void);
|
||||
DRESULT MCI_read (unsigned char*, unsigned long, unsigned char);
|
||||
DRESULT MCI_write (const unsigned char*, unsigned long, unsigned char);
|
||||
DRESULT MCI_ioctl (unsigned char, void*);
|
||||
void MCI_timerproc (void);
|
||||
|
||||
|
||||
#endif
|
@ -0,0 +1,123 @@
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "shell_commands.h"
|
||||
#include "diskio.h"
|
||||
|
||||
static inline uint8_t sector_read(unsigned char *read_buf, unsigned long sector, unsigned long length, unsigned long offset) {
|
||||
unsigned long i;
|
||||
if (MCI_read(read_buf, sector, 1) == RES_OK) {
|
||||
printf("[disk] Read sector %lu (%lu):\n", sector, offset);
|
||||
for (i = offset + 1; i <= offset + length; i++) {
|
||||
printf(" %u", read_buf[i-1]);
|
||||
if (!(i % 16)) {
|
||||
puts("");
|
||||
}
|
||||
}
|
||||
puts("");
|
||||
return 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
void _get_sectorsize(char *unused) {
|
||||
unsigned short ssize;
|
||||
if (MCI_ioctl(GET_SECTOR_SIZE, &ssize) == RES_OK) {
|
||||
printf("[disk] sector size is %u\n", ssize);
|
||||
}
|
||||
else {
|
||||
puts("[disk] Failed to fetch sector size. Card inserted?");
|
||||
}
|
||||
}
|
||||
|
||||
void _get_blocksize(char *unused) {
|
||||
unsigned long bsize;
|
||||
if (MCI_ioctl(GET_BLOCK_SIZE, &bsize) == RES_OK) {
|
||||
printf("[disk] block size is %lu\n", bsize);
|
||||
}
|
||||
else {
|
||||
puts("[disk] Failed to fetch block size. Card inserted?");
|
||||
}
|
||||
}
|
||||
|
||||
void _get_sectorcount(char *unused) {
|
||||
unsigned long scount;
|
||||
if (MCI_ioctl(GET_SECTOR_COUNT, &scount) == RES_OK) {
|
||||
printf("[disk] sector count is %lu\n", scount);
|
||||
}
|
||||
else {
|
||||
puts("[disk] Failed to fetch sector count. Card inserted?");
|
||||
}
|
||||
}
|
||||
|
||||
void _read_sector(char *sector) {
|
||||
unsigned long sectornr, scount;
|
||||
unsigned short ssize;
|
||||
|
||||
if (strlen(sector) > strlen(DISK_READ_SECTOR_CMD) + 1) {
|
||||
|
||||
sectornr = (unsigned short) atol(sector + strlen(DISK_READ_SECTOR_CMD) + 1);
|
||||
if ((MCI_ioctl(GET_SECTOR_COUNT, &scount) == RES_OK) && (MCI_ioctl(GET_SECTOR_SIZE, &ssize) == RES_OK)) {
|
||||
unsigned char read_buf[ssize];
|
||||
if (sector_read(read_buf, sectornr, ssize, 0)) {
|
||||
return;
|
||||
}
|
||||
}
|
||||
printf("[disk] Error while reading sector %lu\n", sectornr);
|
||||
}
|
||||
else {
|
||||
printf("[disk] Usage:\n%s <SECTOR>\n", DISK_READ_SECTOR_CMD);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
void _read_bytes(char *bytes) {
|
||||
unsigned long sector = 1, scount, offset;
|
||||
unsigned short ssize, length;
|
||||
char *tok;
|
||||
|
||||
/* tokenize user input */
|
||||
tok = strtok(bytes + strlen(DISK_READ_BYTES_CMD) + 1, " ");
|
||||
if (tok) {
|
||||
offset = atol(tok);
|
||||
tok = strtok(NULL, " ");
|
||||
if (tok) {
|
||||
length = atoi(tok);
|
||||
if (length) {
|
||||
/* get card info */
|
||||
if ((MCI_ioctl(GET_SECTOR_COUNT, &scount) == RES_OK) && (MCI_ioctl(GET_SECTOR_SIZE, &ssize) == RES_OK)) {
|
||||
/* calculate sector and offset position */
|
||||
sector = (offset / ssize) + 1;
|
||||
offset = (offset % ssize);
|
||||
/* preapre buffer (size must be a multiple of sector size) */
|
||||
unsigned char read_buf[((length / ssize) + 1) * 512];
|
||||
/* read from several sectors */
|
||||
if (length > (ssize - offset)) {
|
||||
/* buffer offset */
|
||||
unsigned long j = 0;
|
||||
/* chunk from current sector */
|
||||
unsigned short tmp = ssize - offset;
|
||||
while (length) {
|
||||
sector_read(read_buf + j, sector++, tmp, offset);
|
||||
/* decrease length and recalculate chunk */
|
||||
length -= tmp;
|
||||
tmp = (length >= ssize) ? ssize : length;
|
||||
}
|
||||
|
||||
return;
|
||||
} /* length > (ssize - offset) */
|
||||
/* read only one sector */
|
||||
else {
|
||||
if (sector_read(read_buf, sector, length, offset)) {
|
||||
return;
|
||||
}
|
||||
} /* length < (ssize - offset) */
|
||||
} /* ioctl */
|
||||
printf("[disk] Error while reading sector %lu\n", sector);
|
||||
return;
|
||||
} /* length */
|
||||
} /* strtok #2 */
|
||||
} /* strtok #1 */
|
||||
printf("[disk] Usage:\n%s <OFFSET> <LENGTH>\n", DISK_READ_BYTES_CMD);
|
||||
}
|
Loading…
Reference in New Issue