Martine Lenders
6 years ago
committed by
GitHub
13 changed files with 496 additions and 4 deletions
@ -0,0 +1,3 @@
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MODULE = board
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include $(RIOTBASE)/Makefile.base |
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@ -0,0 +1,3 @@
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ifneq (,$(filter saul_default,$(USEMODULE))) |
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USEMODULE += saul_gpio
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endif |
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@ -0,0 +1,16 @@
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_rtc
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FEATURES_PROVIDED += periph_rtt
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Various other features (if any)
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FEATURES_PROVIDED += cpp
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = cortex_m0_2
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@ -0,0 +1,25 @@
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# define the cpu used by SAMD21 Xplained Pro board
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export CPU = samd21
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export CPU_MODEL = samd21j18a
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# set default port depending on operating system
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PORT_LINUX ?= /dev/ttyACM0
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PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
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# setup serial terminal
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include $(RIOTMAKE)/tools/serial.inc.mk |
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# Add board selector (USB serial) to OpenOCD options if specified.
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# Use /dist/tools/usb-serial/list-ttys.sh to find out serial number.
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# Usage: SERIAL="ATML..." BOARD="samd21-xpro" make flash
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ifneq (,$(SERIAL)) |
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export OPENOCD_EXTRA_INIT += "-c cmsis_dap_serial $(SERIAL)"
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SERIAL_TTY = $(firstword $(shell $(RIOTBASE)/dist/tools/usb-serial/find-tty.sh $(SERIAL)))
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ifeq (,$(SERIAL_TTY))
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$(error Did not find a device with serial $(SERIAL))
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endif
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PORT_LINUX := $(SERIAL_TTY)
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endif |
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# this board uses openocd
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include $(RIOTMAKE)/tools/openocd.inc.mk |
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@ -0,0 +1,37 @@
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/*
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* Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com> |
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* Copyright (C) 2017 Dan Evans <photonthunder@gmail.com> |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_samd21-xpro |
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* @{ |
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* |
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* @file |
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* @brief Board specific implementations for the Atmel SAM D21 Xplained |
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* Pro board |
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* |
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* @author Travis Griggs <travisgriggs@gmail.com> |
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* @author Dan Evans <photonthunder@gmail.com> |
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* |
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* @} |
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*/ |
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#include "board.h" |
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#include "periph/gpio.h" |
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void board_init(void) |
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{ |
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/* initialize the on-board LED */ |
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gpio_init(LED0_PIN, GPIO_OUT); |
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/* initialize the on-board button */ |
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gpio_init(BUTTON_GPIO, GPIO_IN_PU); |
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/* initialize the CPU */ |
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cpu_init(); |
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} |
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@ -0,0 +1,2 @@
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source [find board/atmel_samd21_xplained_pro.cfg] |
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$_TARGETNAME configure -rtos auto |
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@ -0,0 +1,76 @@
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/*
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* Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com> |
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* Copyright (C) 2017 Dan Evans <photonthunder@gmail.com> |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @defgroup boards_samd21-xpro Atmel SAM D21 Xplained Pro |
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* @ingroup boards |
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* @brief Support for the Atmel SAM D21 Xplained Pro board. |
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* @{ |
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* |
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* @file |
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* @brief Board specific definitions for the Atmel SAM D21 Xplained Pro |
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* board |
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* |
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* @author Travis Griggs <travisgriggs@gmail.com> |
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* @author Dan Evans <photonthunder@gmail.com> |
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*/ |
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#ifndef BOARD_H |
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#define BOARD_H |
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#include "cpu.h" |
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#include "periph_conf.h" |
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#include "periph_cpu.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @name xtimer configuration |
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* @{ |
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*/ |
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#define XTIMER_DEV TIMER_1 |
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#define XTIMER_CHAN (0) |
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/** @} */ |
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/**
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* @name LED pin definitions and handlers |
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* @{ |
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*/ |
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#define LED0_PIN GPIO_PIN(PB, 30) |
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#define LED_PORT PORT->Group[PB] |
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#define LED0_MASK (1 << 30) |
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#define LED0_ON (LED_PORT.OUTCLR.reg = LED0_MASK) |
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#define LED0_OFF (LED_PORT.OUTSET.reg = LED0_MASK) |
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#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK) |
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/** @} */ |
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/**
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* @name SW0 (Button) pin definitions |
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* @{ |
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*/ |
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#define BUTTON_PORT PORT->Group[PA] |
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#define BUTTON_PIN (15) |
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#define BUTTON_GPIO GPIO_PIN(PA, BUTTON_PIN) |
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/** @} */ |
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO |
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*/ |
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void board_init(void); |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* BOARD_H */ |
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/** @} */ |
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@ -0,0 +1,53 @@
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/*
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* Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com> |
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* Copyright (C) 2017 Dan Evans <photonthunder@gmail.com> |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_samd21-xpro |
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* @{ |
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* |
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* @file |
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* @brief Board specific configuration of direct mapped GPIOs |
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* |
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* @author Travis Griggs <travisgriggs@gmail.com> |
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* @author Dan Evans <photonthunder@gmail.com> |
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*/ |
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#ifndef GPIO_PARAMS_H |
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#define GPIO_PARAMS_H |
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#include "board.h" |
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#include "saul/periph.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @brief GPIO pin configuration |
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*/ |
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static const saul_gpio_params_t saul_gpio_params[] = |
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{ |
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{ |
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.name = "LED(orange)", |
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.pin = LED0_PIN, |
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.mode = GPIO_OUT |
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}, |
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{ |
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.name = "Button(SW0)", |
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.pin = BUTTON_GPIO, |
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.mode = GPIO_IN_PU |
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}, |
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}; |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* GPIO_PARAMS_H */ |
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/** @} */ |
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@ -0,0 +1,275 @@
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/*
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* Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com> |
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* Copyright (C) 2017 Dan Evans <photonthunder@gmail.com> |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/**
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* @ingroup boards_samd21-xpro |
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* @{ |
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* |
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* @file |
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* @brief Configuration of CPU peripherals for the Atmel SAM D21 Xplained |
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* Pro board |
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* |
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* @author Travis Griggs <travisgriggs@gmail.com> |
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* @author Dan Evans <photonthunder@gmail.com> |
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*/ |
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#ifndef PERIPH_CONF_H |
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#define PERIPH_CONF_H |
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#include <stdint.h> |
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#include "cpu.h" |
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#include "periph_cpu.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/**
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* @name External oscillator and clock configuration |
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* |
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* There are two choices for selection of CORECLOCK: |
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* |
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* - usage of the PLL fed by the internal 8MHz oscillator divided by 8 |
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* - usage of the internal 8MHz oscillator directly, divided by N if needed |
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* |
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* |
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* The PLL option allows for the usage of a wider frequency range and a more |
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* stable clock with less jitter. This is why this option is default. |
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* |
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* The target frequency is computed from the PLL multiplier and the PLL divisor. |
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* Use the following formula to compute your values: |
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* |
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* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV |
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* |
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* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL |
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* frequency is 96MHz. So PLL_MULL must be between 31 and 95! |
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* |
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* |
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* The internal Oscillator used directly can lead to a slightly better power |
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* efficiency to the cost of a less stable clock. Use this option when you know |
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* what you are doing! The actual core frequency is adjusted as follows: |
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* |
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* CORECLOCK = 8MHz / DIV |
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* |
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* NOTE: A core clock frequency below 1MHz is not recommended |
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* |
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* @{ |
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*/ |
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#define CLOCK_USE_PLL (1) |
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#if CLOCK_USE_PLL |
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/* edit these values to adjust the PLL output frequency */ |
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#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */ |
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#define CLOCK_PLL_DIV (1U) /* adjust to your needs */ |
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/* generate the actual used core clock frequency */ |
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#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV) |
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#else |
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/* edit this value to your needs */ |
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#define CLOCK_DIV (1U) |
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/* generate the actual core clock frequency */ |
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#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV) |
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#endif |
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/** @} */ |
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/**
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* @name Timer peripheral configuration |
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* @{ |
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*/ |
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#define TIMER_NUMOF (2U) |
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#define TIMER_0_EN 1 |
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#define TIMER_1_EN 1 |
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/* Timer 0 configuration */ |
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#define TIMER_0_DEV TC3->COUNT16 |
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#define TIMER_0_CHANNELS 2 |
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#define TIMER_0_MAX_VALUE (0xffff) |
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#define TIMER_0_ISR isr_tc3 |
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/* Timer 1 configuration */ |
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#define TIMER_1_DEV TC4->COUNT32 |
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#define TIMER_1_CHANNELS 2 |
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#define TIMER_1_MAX_VALUE (0xffffffff) |
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#define TIMER_1_ISR isr_tc4 |
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/** @} */ |
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/**
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* @name UART configuration |
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* @{ |
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*/ |
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static const uart_conf_t uart_config[] = { |
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{ /* Virtual COM Port */ |
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.dev = &SERCOM3->USART, |
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.rx_pin = GPIO_PIN(PA,23), |
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.tx_pin = GPIO_PIN(PA,22), |
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.mux = GPIO_MUX_C, |
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.rx_pad = UART_PAD_RX_1, |
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.tx_pad = UART_PAD_TX_0 |
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}, |
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{ /* EXT1 */ |
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.dev = &SERCOM4->USART, |
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.rx_pin = GPIO_PIN(PB,9), |
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.tx_pin = GPIO_PIN(PB,8), |
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.mux = GPIO_MUX_D, |
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.rx_pad = UART_PAD_RX_1, |
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.tx_pad = UART_PAD_TX_0 |
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}, |
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{ /* EXT2/3 */ |
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.dev = &SERCOM4->USART, |
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.rx_pin = GPIO_PIN(PB,11), |
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.tx_pin = GPIO_PIN(PB,10), |
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.mux = GPIO_MUX_D, |
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.rx_pad = UART_PAD_RX_3, |
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.tx_pad = UART_PAD_TX_2 |
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} |
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}; |
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/* interrupt function name mapping */ |
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#define UART_0_ISR isr_sercom3 |
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#define UART_1_ISR isr_sercom4 |
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#define UART_2_ISR isr_sercom5 |
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) |
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/** @} */ |
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/**
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* @name PWM configuration |
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* @{ |
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*/ |
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#define PWM_0_EN 1 |
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#define PWM_1_EN 0 |
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#define PWM_2_EN 0 |
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#define PWM_MAX_CHANNELS 2 |
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/* for compatibility with test application */ |
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#define PWM_0_CHANNELS PWM_MAX_CHANNELS |
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#define PWM_1_CHANNELS PWM_MAX_CHANNELS |
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#define PWM_2_CHANNELS PWM_MAX_CHANNELS |
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/* PWM device configuration */ |
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static const pwm_conf_t pwm_config[] = { |
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#if PWM_0_EN |
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{TCC2, { |
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/* GPIO pin, MUX value, TCC channel */ |
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{ GPIO_PIN(PA, 12), GPIO_MUX_E, 0 }, |
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{ GPIO_PIN(PA, 13), GPIO_MUX_E, 1 }, |
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}}, |
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#endif |
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#if PWM_1_EN |
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{TC4, { |
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/* GPIO pin, MUX value, TCC channel */ |
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{ GPIO_PIN(PB, 12), GPIO_MUX_E, 0 }, |
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{ GPIO_PIN(PB, 13), GPIO_MUX_E, 1 }, |
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}} |
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#endif |
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#if PWM_2_EN |
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{TC6, { |
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/* GPIO pin, MUX value, TCC channel */ |
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{ GPIO_PIN(PB, 02), GPIO_MUX_E, 0 }, |
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{ GPIO_PIN(PB, 03), GPIO_MUX_E, 1 }, |
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}} |
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#endif |
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}; |
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/* number of devices that are actually defined */ |
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#define PWM_NUMOF (3U) |
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/** @} */ |
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/**
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* @name SPI configuration |
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* @{ |
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*/ |
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static const spi_conf_t spi_config[] = { |
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{ |
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.dev = &SERCOM0->SPI, |
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.miso_pin = GPIO_PIN(PA, 4), |
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.mosi_pin = GPIO_PIN(PA, 6), |
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.clk_pin = GPIO_PIN(PA, 7), |
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.miso_mux = GPIO_MUX_D, |
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.mosi_mux = GPIO_MUX_D, |
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.clk_mux = GPIO_MUX_D, |
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.miso_pad = SPI_PAD_MISO_0, |
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.mosi_pad = SPI_PAD_MOSI_2_SCK_3 |
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}, |
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{ |
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.dev = &SERCOM1->SPI, |
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.miso_pin = GPIO_PIN(PA, 16), |
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.mosi_pin = GPIO_PIN(PA, 18), |
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.clk_pin = GPIO_PIN(PA, 19), |
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.miso_mux = GPIO_MUX_C, |
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.mosi_mux = GPIO_MUX_C, |
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.clk_mux = GPIO_MUX_C, |
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.miso_pad = SPI_PAD_MISO_0, |
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.mosi_pad = SPI_PAD_MOSI_2_SCK_3 |
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}, |
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{ |
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.dev = &SERCOM5->SPI, |
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.miso_pin = GPIO_PIN(PB, 16), |
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.mosi_pin = GPIO_PIN(PB, 22), |
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.clk_pin = GPIO_PIN(PB, 23), |
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.miso_mux = GPIO_MUX_C, |
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.mosi_mux = GPIO_MUX_C, |
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.clk_mux = GPIO_MUX_C, |
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.miso_pad = SPI_PAD_MISO_0, |
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.mosi_pad = SPI_PAD_MOSI_2_SCK_3 |
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} |
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}; |
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#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0])) |
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/** @} */ |
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/**
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* @name I2C configuration |
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* @{ |
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*/ |
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#define I2C_NUMOF (1U) |
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#define I2C_0_EN 1 |
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#define I2C_1_EN 0 |
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#define I2C_2_EN 0 |
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#define I2C_3_EN 0 |
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#define I2C_IRQ_PRIO 1 |
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#define I2C_0_DEV SERCOM2->I2CM |
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#define I2C_0_IRQ SERCOM2_IRQn |
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#define I2C_0_ISR isr_sercom2 |
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/* I2C 0 GCLK */ |
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#define I2C_0_GCLK_ID SERCOM2_GCLK_ID_CORE |
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#define I2C_0_GCLK_ID_SLOW SERCOM2_GCLK_ID_SLOW |
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/* I2C 0 pin configuration */ |
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#define I2C_0_SDA GPIO_PIN(PA, 8) |
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#define I2C_0_SCL GPIO_PIN(PA, 9) |
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#define I2C_0_MUX GPIO_MUX_D |
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/**
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* @name RTC configuration |
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* @{ |
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*/ |
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#define RTC_NUMOF (1U) |
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#define RTC_DEV RTC->MODE2 |
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/** @} */ |
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/**
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* @name RTT configuration |
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* @{ |
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*/ |
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#define RTT_NUMOF (1U) |
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#define RTT_DEV RTC->MODE0 |
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#define RTT_IRQ RTC_IRQn |
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#define RTT_IRQ_PRIO 10 |
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#define RTT_ISR isr_rtc |
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#define RTT_MAX_VALUE (0xffffffff) |
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#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */ |
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#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */ |
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/** @} */ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* PERIPH_CONF_H */ |
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/** @} */ |
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