|
|
|
@ -14,6 +14,7 @@
|
|
|
|
|
* |
|
|
|
|
* @author Johann Fischer <j.fischer@phytec.de> |
|
|
|
|
* @author Jonas Remmert <j.remmert@phytec.de> |
|
|
|
|
* @author Sebastian Meiling <s@mlng.net> |
|
|
|
|
* @} |
|
|
|
|
*/ |
|
|
|
|
#include "kw2xrf.h" |
|
|
|
@ -27,55 +28,76 @@
|
|
|
|
|
#define ENABLE_DEBUG (0) |
|
|
|
|
#include "debug.h" |
|
|
|
|
|
|
|
|
|
#define SPI_MODE (SPI_MODE_0) |
|
|
|
|
#define SPIDEV (dev->params.spi) |
|
|
|
|
#define SPICLK (dev->params.spi_clk) |
|
|
|
|
#define CSPIN (dev->params.cs_pin) |
|
|
|
|
#define SPIMODE (SPI_MODE_0) |
|
|
|
|
|
|
|
|
|
#define KW2XRF_IBUF_LENGTH (9) |
|
|
|
|
|
|
|
|
|
static uint8_t ibuf[KW2XRF_IBUF_LENGTH]; |
|
|
|
|
|
|
|
|
|
void kw2xrf_spi_transfer_head(kw2xrf_t *dev) |
|
|
|
|
{ |
|
|
|
|
spi_acquire(SPIDEV, CSPIN, SPIMODE, SPICLK); |
|
|
|
|
#if KW2XRF_SHARED_SPI |
|
|
|
|
spi_acquire(dev->params.spi); |
|
|
|
|
gpio_clear(dev->params.cs_pin); |
|
|
|
|
gpio_clear(CSPIN); |
|
|
|
|
#endif |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
void kw2xrf_spi_transfer_tail(kw2xrf_t *dev) |
|
|
|
|
{ |
|
|
|
|
#if KW2XRF_SHARED_SPI |
|
|
|
|
gpio_set(dev->params.cs_pin); |
|
|
|
|
spi_release(dev->params.spi); |
|
|
|
|
gpio_set(CSPIN); |
|
|
|
|
#endif |
|
|
|
|
spi_release(SPIDEV); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
int kw2xrf_spi_init(kw2xrf_t *dev) |
|
|
|
|
{ |
|
|
|
|
DEBUG("[kw2xrf_spi] kw2xrf_spi_init\n"); |
|
|
|
|
int res; |
|
|
|
|
|
|
|
|
|
#if KW2XRF_SHARED_SPI |
|
|
|
|
spi_acquire(dev->params.spi); |
|
|
|
|
spi_acquire(SPIDEV, CSPIN, SPIMODE, SPICLK); |
|
|
|
|
#endif |
|
|
|
|
res = spi_init_master(dev->params.spi, SPI_CONF_FIRST_RISING, dev->params.spi_speed); |
|
|
|
|
res = spi_init_cs(SPIDEV, CSPIN); |
|
|
|
|
#if KW2XRF_SHARED_SPI |
|
|
|
|
spi_release(dev->params.spi); |
|
|
|
|
|
|
|
|
|
gpio_init(dev->params.cs_pin, GPIO_OUT); |
|
|
|
|
gpio_set(dev->params.cs_pin); |
|
|
|
|
spi_release(SPIDEV); |
|
|
|
|
gpio_init(CSPIN, GPIO_OUT); |
|
|
|
|
gpio_set(CSPIN); |
|
|
|
|
#endif |
|
|
|
|
|
|
|
|
|
if (res < 0) { |
|
|
|
|
DEBUG("[kw2xrf]: error initializing SPI_%i device (code %i)\n", |
|
|
|
|
kw2xrf_spi, res); |
|
|
|
|
return -1; |
|
|
|
|
if (res != SPI_OK) { |
|
|
|
|
DEBUG("[kw2xrf_spi] error: initializing SPI_%i device (code %i)\n", |
|
|
|
|
SPIDEV, res); |
|
|
|
|
return 1; |
|
|
|
|
} |
|
|
|
|
/* verify SPI params */ |
|
|
|
|
res = spi_acquire(SPIDEV, CSPIN, SPIMODE, SPICLK); |
|
|
|
|
if (res == SPI_NOMODE) { |
|
|
|
|
puts("[kw2xrf_spi] error: given SPI mode is not supported"); |
|
|
|
|
return 1; |
|
|
|
|
} |
|
|
|
|
else if (res == SPI_NOCLK) { |
|
|
|
|
puts("[kw2xrf_spi] error: targeted clock speed is not supported"); |
|
|
|
|
return 1; |
|
|
|
|
} |
|
|
|
|
else if (res != SPI_OK) { |
|
|
|
|
puts("[kw2xrf_spi] error: unable to acquire bus with given parameters"); |
|
|
|
|
return 1; |
|
|
|
|
} |
|
|
|
|
spi_release(SPIDEV); |
|
|
|
|
|
|
|
|
|
DEBUG("[kw2xrf_spi] SPI_DEV(%i) initialized: mode: %i, clk: %i, cs_pin: %i\n", |
|
|
|
|
SPIDEV, SPIMODE, SPICLK, CSPIN); |
|
|
|
|
return 0; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
void kw2xrf_write_dreg(kw2xrf_t *dev, uint8_t addr, uint8_t value) |
|
|
|
|
{ |
|
|
|
|
DEBUG("[kw2xrf_spi] kw2xrf_write_dreg, addr %u, value %u\n", addr, value); |
|
|
|
|
kw2xrf_spi_transfer_head(dev); |
|
|
|
|
spi_transfer_reg(dev->params.spi, dev->params.cs_pin, addr, value); |
|
|
|
|
spi_transfer_reg(SPIDEV, CSPIN, addr, value); |
|
|
|
|
kw2xrf_spi_transfer_tail(dev); |
|
|
|
|
return; |
|
|
|
|
} |
|
|
|
@ -84,27 +106,26 @@ uint8_t kw2xrf_read_dreg(kw2xrf_t *dev, uint8_t addr)
|
|
|
|
|
{ |
|
|
|
|
uint8_t value; |
|
|
|
|
kw2xrf_spi_transfer_head(dev); |
|
|
|
|
value = spi_transfer_reg(dev->params.spi, dev->params.cs_pin, |
|
|
|
|
(addr | MKW2XDRF_REG_READ), 0x0); |
|
|
|
|
value = spi_transfer_reg(SPIDEV, CSPIN, (addr | MKW2XDRF_REG_READ), 0x0); |
|
|
|
|
kw2xrf_spi_transfer_tail(dev); |
|
|
|
|
DEBUG("[kw2xrf_spi] kw2xrf_read_dreg, addr %u, value %u\n", addr, value); |
|
|
|
|
return value; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
size_t kw2xrf_write_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length) |
|
|
|
|
void kw2xrf_write_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length) |
|
|
|
|
{ |
|
|
|
|
DEBUG("[kw2xrf_spi] kw2xrf_write_dregs, addr %u, length %u\n", addr, length); |
|
|
|
|
kw2xrf_spi_transfer_head(dev); |
|
|
|
|
size_t i = spi_transfer_regs(dev->params.spi, addr, (char *)buf, NULL, length); |
|
|
|
|
spi_transfer_regs(SPIDEV, CSPIN, addr, buf, NULL, length); |
|
|
|
|
kw2xrf_spi_transfer_tail(dev); |
|
|
|
|
return i; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
size_t kw2xrf_read_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length) |
|
|
|
|
void kw2xrf_read_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length) |
|
|
|
|
{ |
|
|
|
|
kw2xrf_spi_transfer_head(dev); |
|
|
|
|
size_t i = spi_transfer_regs(dev->params.spi, (addr | MKW2XDRF_REG_READ), |
|
|
|
|
NULL, (char *)buf, length); |
|
|
|
|
spi_transfer_regs(SPIDEV, CSPIN, (addr | MKW2XDRF_REG_READ), NULL, buf, length); |
|
|
|
|
DEBUG("[kw2xrf_spi] kw2xrf_read_dregs, addr %u, length %u\n", addr, length); |
|
|
|
|
kw2xrf_spi_transfer_tail(dev); |
|
|
|
|
return i; |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
|
|
|
|
@ -121,8 +142,7 @@ void kw2xrf_write_iregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t lengt
|
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
kw2xrf_spi_transfer_head(dev); |
|
|
|
|
spi_transfer_regs(dev->params.spi, dev->params.cs_pin, MKW2XDM_IAR_INDEX, |
|
|
|
|
ibuf, NULL, length + 1); |
|
|
|
|
spi_transfer_regs(SPIDEV, CSPIN, MKW2XDM_IAR_INDEX, ibuf, NULL, length + 1); |
|
|
|
|
kw2xrf_spi_transfer_tail(dev); |
|
|
|
|
|
|
|
|
|
return; |
|
|
|
@ -137,8 +157,7 @@ void kw2xrf_read_iregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length
|
|
|
|
|
ibuf[0] = addr; |
|
|
|
|
|
|
|
|
|
kw2xrf_spi_transfer_head(dev); |
|
|
|
|
spi_transfer_regs(dev->params.spi, dev->params.cs_pin, |
|
|
|
|
(MKW2XDM_IAR_INDEX | MKW2XDRF_REG_READ), |
|
|
|
|
spi_transfer_regs(SPIDEV, CSPIN, (MKW2XDM_IAR_INDEX | MKW2XDRF_REG_READ), |
|
|
|
|
ibuf, ibuf, length + 1); |
|
|
|
|
kw2xrf_spi_transfer_tail(dev); |
|
|
|
|
|
|
|
|
@ -152,15 +171,13 @@ void kw2xrf_read_iregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length
|
|
|
|
|
void kw2xrf_write_fifo(kw2xrf_t *dev, uint8_t *data, uint8_t length) |
|
|
|
|
{ |
|
|
|
|
kw2xrf_spi_transfer_head(dev); |
|
|
|
|
spi_transfer_regs(dev->params.spi, dev->params.cs_pin, |
|
|
|
|
MKW2XDRF_BUF_WRITE, data, NULL, length); |
|
|
|
|
spi_transfer_regs(SPIDEV, CSPIN, MKW2XDRF_BUF_WRITE, data, NULL, length); |
|
|
|
|
kw2xrf_spi_transfer_tail(dev); |
|
|
|
|
} |
|
|
|
|
|
|
|
|
|
void kw2xrf_read_fifo(kw2xrf_t *dev, uint8_t *data, uint8_t length) |
|
|
|
|
{ |
|
|
|
|
kw2xrf_spi_transfer_head(dev); |
|
|
|
|
spi_transfer_regs(dev->params.spi, dev->params.cs_pin, |
|
|
|
|
MKW2XDRF_BUF_READ, NULL, data, length); |
|
|
|
|
spi_transfer_regs(SPIDEV, CSPIN, MKW2XDRF_BUF_READ, NULL, data, length); |
|
|
|
|
kw2xrf_spi_transfer_tail(dev); |
|
|
|
|
} |
|
|
|
|