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@ -140,19 +140,6 @@ extern "C"
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/** IRQ channel for hwtimer interrupts */ |
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#define LPTIMER_IRQ_CHAN LPTMR0_IRQn |
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#if K60_CPU_REV == 1 |
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/*
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* The CNR register latching in LPTMR0 was added in silicon rev 2.x. With |
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* rev 1.x we do not need to do anything in order to read the current timer counter |
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* value |
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*/ |
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#define LPTIMER_CNR_NEEDS_LATCHING 0 |
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#elif K60_CPU_REV == 2 |
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#define LPTIMER_CNR_NEEDS_LATCHING 1 |
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#endif |
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/** @} */ |
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/**
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