Merge pull request #6192 from aabadie/nucleo_f401_pwm

boards/nucleo-f401: configure PWM on 7 pins
pr/spi.typo
Alexandre Abadie 6 years ago committed by GitHub
commit 93abe83ddb

@ -2,6 +2,7 @@
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

@ -53,13 +53,6 @@ extern "C" {
* @{
*/
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
@ -69,8 +62,7 @@ static const timer_conf_t timer_config[] = {
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_1_ISR isr_tim5
#define TIMER_0_ISR isr_tim5
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
@ -118,6 +110,36 @@ static const uart_conf_t uart_config[] = {
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @brief PWM configuration
* @{
*/
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM2,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.chan = { { .pin = GPIO_PIN(PORT_A, 15) , .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_B, 3) /* D3 */, .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_B, 10) /* D6 */, .cc_chan = 2 },
{ .pin = GPIO_UNDEF, .cc_chan = 0 } },
.af = GPIO_AF1,
.bus = APB1
},
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_C, 7) /* D9 */, .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
.af = GPIO_AF2,
.bus = APB1
},
};
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
/** @} */
/**
* @name SPI configuration
* @{

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