x86: Add atomic_cas implementation

dev/timer
René Kijewski 8 years ago committed by Joakim Gebart
parent afc1dd3a6d
commit 96ca6a6bef

@ -26,8 +26,8 @@
* @author René Kijewski <rene.kijewski@fu-berlin.de>
*/
#ifndef CPU__X86__CPU__H__
#define CPU__X86__CPU__H__
#ifndef CPU_X86_CPU_H_
#define CPU_X86_CPU_H_
#include "attributes.h"
#include "irq.h"
@ -46,7 +46,8 @@ extern "C" {
/**
* @brief x86 has architecture specific atomic operations in x86_atomic.c.
*/
#define ARCH_HAS_ATOMIC_INT 1
#define ARCH_HAS_ATOMIC_SET_RETURN 1
#define ARCH_HAS_ATOMIC_COMPARE_AND_SWAP 1
static inline void __attribute__((always_inline)) dINT(void)
{

@ -1,5 +1,5 @@
/*
* Copyright (C) 2014 René Kijewski <rene.kijewski@fu-berlin.de>
* Copyright (C) 2014-2015 René Kijewski <rene.kijewski@fu-berlin.de>
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
@ -28,6 +28,7 @@
* @}
*/
#include <stdint.h>
#include "atomic.h"
unsigned int atomic_set_return(unsigned int *val, unsigned int set)
@ -35,3 +36,14 @@ unsigned int atomic_set_return(unsigned int *val, unsigned int set)
asm volatile ("lock xchg %0, %1" : "+m"(*val), "+r"(set));
return set;
}
int atomic_cas(atomic_int_t *dest, int known_value, int new_value)
{
uint8_t successful;
asm volatile ("lock cmpxchgl %2, %0\n"
"seteb %1"
: "+m"(ATOMIC_VALUE(*dest)), "=g"(successful)
: "r"(new_value), "a"(known_value)
: "flags");
return successful;
}

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