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cpu/stm32f7: add support of stm32f769

master
Vincent Dupont 6 years ago
parent
commit
a7acc844c7
  1. 8
      cpu/stm32f7/include/cpu_conf.h
  2. 21765
      cpu/stm32f7/include/vendor/stm32f769xx.h
  3. 30
      cpu/stm32f7/ldscripts/stm32f769ni.ld
  4. 30
      cpu/stm32f7/vectors.c

8
cpu/stm32f7/include/cpu_conf.h

@ -23,8 +23,10 @@
#include "cpu_conf_common.h"
#ifdef CPU_MODEL_STM32F746ZG
#if defined(CPU_MODEL_STM32F746ZG)
#include "vendor/stm32f746xx.h"
#elif defined(CPU_MODEL_STM32F769NI)
#include "vendor/stm32f769xx.h"
#endif
#ifdef __cplusplus
@ -36,7 +38,11 @@ extern "C" {
* @{
*/
#define CPU_DEFAULT_IRQ_PRIO (1U)
#if defined(CPU_MODEL_STM32F746ZG)
#define CPU_IRQ_NUMOF (98U)
#elif defined(CPU_MODEL_STM32F769NI)
#define CPU_IRQ_NUMOF (110U)
#endif
/** @} */
#ifdef __cplusplus

21765
cpu/stm32f7/include/vendor/stm32f769xx.h vendored

File diff suppressed because it is too large Load Diff

30
cpu/stm32f7/ldscripts/stm32f769ni.ld

@ -0,0 +1,30 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f7
* @{
*
* @file
* @brief Memory definitions for the STM32F769NI
*
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 512K
cpuid (r) : ORIGIN = 0x1ff0f420, LENGTH = 12
}
_cpuid_address = ORIGIN(cpuid);
INCLUDE cortexm_base.ld

30
cpu/stm32f7/vectors.c

@ -126,6 +126,20 @@ WEAK_DEFAULT void isr_cec(void);
WEAK_DEFAULT void isr_i2c4_ev(void);
WEAK_DEFAULT void isr_i2c4_er(void);
WEAK_DEFAULT void isr_spdif_rx(void);
#if defined(CPU_MODEL_STM32F769NI)
WEAK_DEFAULT void isr_dsi(void);
WEAK_DEFAULT void isr_dfsdm1_flt0(void);
WEAK_DEFAULT void isr_dfsdm1_flt1(void);
WEAK_DEFAULT void isr_dfsdm1_flt2(void);
WEAK_DEFAULT void isr_dfsdm1_flt3(void);
WEAK_DEFAULT void isr_sdmmc2(void);
WEAK_DEFAULT void isr_can3_tx(void);
WEAK_DEFAULT void isr_can3_rx0(void);
WEAK_DEFAULT void isr_can3_rx1(void);
WEAK_DEFAULT void isr_can3_sce(void);
WEAK_DEFAULT void isr_jpeg(void);
WEAK_DEFAULT void isr_mdios(void);
#endif
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
@ -247,5 +261,19 @@ ISR_VECTORS const void *interrupt_vector[] = {
(void*) isr_cec,
(void*) isr_i2c4_ev,
(void*) isr_i2c4_er,
(void*) isr_spdif_rx
(void*) isr_spdif_rx,
#if defined(CPU_MODEL_STM32F769NI)
(void*) isr_dsi,
(void*) isr_dfsdm1_flt0,
(void*) isr_dfsdm1_flt1,
(void*) isr_dfsdm1_flt2,
(void*) isr_dfsdm1_flt3,
(void*) isr_sdmmc2,
(void*) isr_can3_tx,
(void*) isr_can3_rx0,
(void*) isr_can3_rx1,
(void*) isr_can3_sce,
(void*) isr_jpeg,
(void*) isr_mdios,
#endif
};

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