cpu/lpc1768: adapted to centralized cpu conf

dev/timer
Hauke Petersen 8 years ago
parent 6102896f7a
commit aa728e0506

@ -24,6 +24,6 @@
*/
void cpu_init(void)
{
/* set pendSV interrupt to lowest possible priority */
NVIC_SetPriority(PendSV_IRQn, 0xff);
/* initialize the Cortex-M core */
cortexm_init();
}

@ -14,7 +14,7 @@
*
* @file
* @brief CPU specific hwtimer configuration options
*12
*
* @author Hauke Petersen <hauke.peterse@fu-berlin.de>
*/
@ -28,32 +28,12 @@ extern "C" {
#endif
/**
* @name Kernel configuration
*
* The absolute minimum stack size is 140 byte (68 byte for the tcb + 72 byte
* for a complete context save).
*
* TODO: measure and adjust for the Cortex-M3
* @brief ARM Cortex-M specific CPU configuration
* @{
*/
#define THREAD_EXTRA_STACKSIZE_PRINTF (1024)
#ifndef THREAD_STACKSIZE_DEFAULT
#define THREAD_STACKSIZE_DEFAULT (1024)
#endif
#define THREAD_STACKSIZE_IDLE (256)
/** @} */
/**
* @name UART0 buffer size definition for compatibility reasons
*
* TODO: remove once the remodeling of the uart0 driver is done
* @{
*/
#ifndef UART0_BUFSIZE
#define UART0_BUFSIZE (128)
#endif
#define CPU_DEFAULT_IRQ_PRIO (1U)
#define CPU_IRQ_NUMOF (35U)
#define CPU_FLASH_BASE LPC_FLASH_BASE
/** @} */
#ifdef __cplusplus

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