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boards/stm32-based: adapted timer configurations

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pr/spi.typo
Hauke Petersen 6 years ago
parent 2a62ec5f6b
commit ab12d60d05
22 changed files with 255 additions and 233 deletions
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41
boards/f4vi1/include/periph_conf.h
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@ -51,31 +51,30 @@ extern "C" {
/** @} */
/**
* @name Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK / 2)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
/* Timer 1 configuration */
#define TIMER_1_DEV TIM5
#define TIMER_1_CHANNELS 4
#define TIMER_1_FREQ (CLOCK_CORECLOCK / 2)
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
#define TIMER_1_ISR isr_tim5
#define TIMER_1_IRQ_CHAN TIM5_IRQn
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

2
boards/fox/include/periph_conf.h
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@ -67,12 +67,14 @@ extern "C" {
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM3,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn

2
boards/iotlab-common/include/periph_conf_common.h
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@ -68,12 +68,14 @@ extern "C" {
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM3,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn

42
boards/msbiot/include/periph_conf.h
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@ -48,33 +48,31 @@ extern "C" {
#define CLOCK_APB1 (CLOCK_CORECLOCK / 4)
/** @} */
/**
* @name Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (84000000U)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
/* Timer 1 configuration */
#define TIMER_1_DEV TIM5
#define TIMER_1_CHANNELS 4
#define TIMER_1_FREQ (84000000U)
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
#define TIMER_1_ISR isr_tim5
#define TIMER_1_IRQ_CHAN TIM5_IRQn
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

27
boards/nucleo-f030/include/periph_conf.h
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@ -21,6 +21,8 @@
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -42,21 +44,22 @@ extern "C" {
/** @} */
/**
* @brief Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM3
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0x0000ffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
#define TIMER_0_IRQ_CHAN TIM3_IRQn
static const timer_conf_t timer_config[] = {
{
.dev = TIM3,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
}
};
#define TIMER_0_ISR isr_tim3
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

27
boards/nucleo-f070/include/periph_conf.h
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@ -21,6 +21,8 @@
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -42,21 +44,22 @@ extern "C" {
/** @} */
/**
* @brief Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM3
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
#define TIMER_0_IRQ_CHAN TIM3_IRQn
static const timer_conf_t timer_config[] = {
{
.dev = TIM3,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
}
};
#define TIMER_0_ISR isr_tim3
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

27
boards/nucleo-f072/include/periph_conf.h
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@ -20,6 +20,8 @@
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -41,21 +43,22 @@ extern "C" {
/** @} */
/**
* @brief Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
#define TIMER_0_IRQ_CHAN TIM2_IRQn
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

25
boards/nucleo-f091/include/periph_conf.h
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@ -42,21 +42,22 @@ extern "C" {
/** @} */
/**
* @brief Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
#define TIMER_0_IRQ_CHAN TIM2_IRQn
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

3
boards/nucleo-f103/include/periph_conf.h
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@ -68,12 +68,15 @@ extern "C" {
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM3,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn

37
boards/nucleo-f207/include/periph_conf.h
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@ -73,52 +73,37 @@ static const pwm_conf_t pwm_config[PWM_NUMOF] = {
/** @} */
/**
* @name Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (4U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
#define TIMER_2_EN 1
#define TIMER_3_EN 1
#define TIMER_IRQ_PRIO 1
static const timer_conf_t timer_config[TIMER_NUMOF] = {
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.channels = 4,
.freq = (CLOCK_APB1 * 2),
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn,
.priority = TIMER_IRQ_PRIO
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.channels = 4,
.freq = (CLOCK_APB1 * 2),
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn,
.priority = TIMER_IRQ_PRIO
.irqn = TIM5_IRQn
},
{
.dev = TIM3,
.channels = 4,
.freq = (CLOCK_APB1 * 2),
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn,
.priority = TIMER_IRQ_PRIO
.irqn = TIM3_IRQn
},
{
.dev = TIM4,
.channels = 4,
.freq = (CLOCK_APB1 * 2),
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM4EN,
.bus = APB1,
.irqn = TIM4_IRQn,
.priority = TIMER_IRQ_PRIO
.irqn = TIM4_IRQn
}
};
@ -126,6 +111,8 @@ static const timer_conf_t timer_config[TIMER_NUMOF] = {
#define TIMER_1_ISR isr_tim5
#define TIMER_2_ISR isr_tim3
#define TIMER_3_ISR isr_tim4
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

27
boards/nucleo-f303/include/periph_conf.h
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@ -21,6 +21,8 @@
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -53,21 +55,22 @@ extern "C" {
/** @} */
/**
* @brief Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
#define TIMER_0_IRQ_CHAN TIM2_IRQn
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

34
boards/nucleo-f334/include/periph_conf.h
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@ -20,6 +20,8 @@
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -51,22 +53,30 @@ extern "C" {
#define DAC_NUMOF (0)
/** @} */
/**
* @brief DAC configuration
* @{
*/
#define DAC_NUMOF (0)
/** @} */
/**
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
};
#define TIMER_0_ISR (isr_tim2)
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

2
boards/nucleo-f401/include/board.h
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@ -31,7 +31,7 @@ extern "C" {
* @name xtimer configuration
* @{
*/
#define XTIMER_DEV TIMER_0
#define XTIMER_DEV TIMER_DEV(0)
#define XTIMER_CHAN (0)
#define XTIMER_OVERHEAD (6)
#define XTIMER_BACKOFF (5)

41
boards/nucleo-f401/include/periph_conf.h
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@ -49,31 +49,30 @@ extern "C" {
/** @} */
/**
* @name Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
/* Timer 1 configuration */
#define TIMER_1_DEV TIM5
#define TIMER_1_CHANNELS 4
#define TIMER_1_FREQ (CLOCK_CORECLOCK)
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
#define TIMER_1_ISR isr_tim5
#define TIMER_1_IRQ_CHAN TIM5_IRQn
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

2
boards/nucleo-f446/include/board.h
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@ -31,7 +31,7 @@ extern "C" {
* @name xtimer configuration
* @{
*/
#define XTIMER_DEV TIMER_0
#define XTIMER_DEV TIMER_DEV(0)
#define XTIMER_CHAN (0)
#define XTIMER_OVERHEAD (6)
#define XTIMER_BACKOFF (5)

41
boards/nucleo-f446/include/periph_conf.h
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@ -49,31 +49,30 @@ extern "C" {
/** @} */
/**
* @name Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
/* Timer 1 configuration */
#define TIMER_1_DEV TIM5
#define TIMER_1_CHANNELS 4
#define TIMER_1_FREQ (CLOCK_CORECLOCK)
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
#define TIMER_1_ISR isr_tim5
#define TIMER_1_IRQ_CHAN TIM5_IRQn
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

13
boards/nucleo-l1/include/periph_conf.h
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@ -60,12 +60,17 @@ extern "C" {
* @{
*/
static const timer_conf_t timer_config[] = {
/* device, RCC bit, IRQ bit */
{TIM5, 3, TIM5_IRQn},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
};
/* interrupt routines */
#define TIMER_0_ISR (isr_tim5)
/* number of defined timers */
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */

2
boards/spark-core/include/periph_conf.h
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@ -67,12 +67,14 @@
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM3,
.max = 0x0000ffff,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn

25
boards/stm32f0discovery/include/periph_conf.h
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@ -42,21 +42,22 @@ extern "C" {
/** @} */
/**
* @name Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
};
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

25
boards/stm32f3discovery/include/periph_conf.h
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@ -19,6 +19,8 @@
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
@ -55,21 +57,22 @@ extern "C" {
/** @} */
/**
* @brief Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
}
};
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**

2
boards/stm32f4discovery/include/board.h
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@ -32,7 +32,7 @@ extern "C" {
* @name xtimer configuration
* @{
*/
#define XTIMER_DEV TIMER_0
#define XTIMER_DEV TIMER_DEV(0)
#define XTIMER_CHAN (0)
#define XTIMER_OVERHEAD (6)
#define XTIMER_BACKOFF (10)

41
boards/stm32f4discovery/include/periph_conf.h
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@ -50,31 +50,30 @@ extern "C" {
/** @} */
/**
* @name Timer configuration
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
#define TIMER_IRQ_PRIO 1
static const timer_conf_t timer_config[] = {
{
.dev = TIM2,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM2EN,
.bus = APB1,
.irqn = TIM2_IRQn
},
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
};
/* Timer 0 configuration */
#define TIMER_0_DEV TIM2
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK / 2)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM2EN)
#define TIMER_0_ISR isr_tim2
#define TIMER_0_IRQ_CHAN TIM2_IRQn
/* Timer 1 configuration */
#define TIMER_1_DEV TIM5
#define TIMER_1_CHANNELS 4
#define TIMER_1_FREQ (CLOCK_CORECLOCK / 2)
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM5EN)
#define TIMER_1_ISR isr_tim5
#define TIMER_1_IRQ_CHAN TIM5_IRQn
#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
/** @} */
/**
@ -103,7 +102,7 @@ static const uart_conf_t uart_config[] = {
.irqn = USART3_IRQn,
.dma_stream = 3,
.dma_chan = 4
},
}
};
/* assign ISR vector names */

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