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cpu/samd21(common): cleaned up pad selection macros

- renamed uart and spi pad selection macros to consistent style
- adapted uart and spi implementation to use new names
pr/spi.typo
Hauke Petersen 6 years ago
parent
commit
ac6b73a35c
  1. 45
      cpu/sam21_common/include/periph_cpu_common.h
  2. 4
      cpu/samd21/include/periph_cpu.h
  3. 16
      cpu/samd21/periph/spi.c
  4. 6
      cpu/samd21/periph/uart.c

45
cpu/sam21_common/include/periph_cpu_common.h

@ -87,33 +87,44 @@ typedef enum {
} gpio_mux_t;
/**
* @brief Possible pad selections for SERCOM RX (inspired by Arduino)
* @brief Available values for SERCOM UART RX pad selection
*/
typedef enum {
SERCOM_RX_PAD_0 = 0x0, /**< select pad 0 */
SERCOM_RX_PAD_1 = 0x1, /**< select pad 1 */
SERCOM_RX_PAD_2 = 0x2, /**< select pad 2 */
SERCOM_RX_PAD_3 = 0x3, /**< select pad 3 */
} sercom_rxpad_t;
UART_PAD_RX_0 = 0x0, /**< use pad 0 for RX line */
UART_PAD_RX_1 = 0x1, /**< select pad 1 */
UART_PAD_RX_2 = 0x2, /**< select pad 2 */
UART_PAD_RX_3 = 0x3, /**< select pad 3 */
} uart_rxpad_t;
/**
* @brief Possible pad selections for SERCOM UART TX (inspired by Arduino)
* @brief Available values for SERCOM UART TX pad selection
*/
typedef enum {
UART_TX_PAD_0 = 0x0, /**< select pad 0, only UART */
UART_TX_PAD_2 = 0x1, /**< select pad 2, only UART */
UART_TX_RTS_CTS_PAD_0_2_3 = 0x2, /**< select pad 0, 2 and 3, only UART, TX on PAD0, RTS on PAD2 and CTS on PAD3 */
} sercom_uart_txpad_t;
UART_PAD_TX_0 = 0x0, /**< select pad 0 */
UART_PAD_TX_2 = 0x1, /**< select pad 2 */
UART_PAD_TX_0_RTS_2_CTS_3 = 0x2, /**< TX is pad 0, on top RTS on pad 2
* and CTS on pad 3 */
} uart_txpad_t;
/**
* @brief Possible pad selections for SERCOM SPI output (inspired by Arduino)
* @brief Available values for SERCOM SPI MISO pad selection
*/
typedef enum {
SPI_PAD_0_SCK_1 = 0, /**< select pad 0, SCK pad1, only SPI */
SPI_PAD_2_SCK_3 = 1, /**< select pad 2, SCK pad3, only SPI */
SPI_PAD_3_SCK_1 = 2, /**< select pad 3, SCK pad1, only SPI */
SPI_PAD_0_SCK_3 = 3, /**< select pad 0, SCK pad3, only SPI */
} sercom_spi_txpad_t;
SPI_PAD_MISO_0 = 0x0, /**< use pad 0 for MISO line */
SPI_PAD_MISO_1 = 0x1, /**< use pad 0 for MISO line */
SPI_PAD_MISO_2 = 0x2, /**< use pad 0 for MISO line */
SPI_PAD_MISO_3 = 0x3, /**< use pad 0 for MISO line */
} spi_misopad_t;
/**
* @brief Available values for SERCOM SPI MOSI and SCK pad selection
*/
typedef enum {
SPI_PAD_MOSI_0_SCK_1 = 0x0, /**< use pad 0 for MOSI, pad 1 for SCK */
SPI_PAD_MOSI_2_SCK_3 = 0x1, /**< use pad 2 for MOSI, pad 3 for SCK */
SPI_PAD_MOSI_3_SCK_1 = 0x2, /**< use pad 3 for MOSI, pad 1 for SCK */
SPI_PAD_MOSI_0_SCK_3 = 0x3, /**< use pad 0 for MOSI, pad 3 for SCK */
} spi_mosipad_t;
/**
* @brief Possible selections for SERCOM SPI clock mode (inspired by Arduino)

4
cpu/samd21/include/periph_cpu.h

@ -86,8 +86,8 @@ typedef struct {
gpio_t rx_pin; /**< pin used for RX */
gpio_t tx_pin; /**< pin used for TX */
gpio_mux_t mux; /**< alternative function for pins */
sercom_rxpad_t rx_pad; /**< pad selection for RX */
sercom_uart_txpad_t tx_pad; /**< pad selection for TX */
uart_rxpad_t rx_pad; /**< pad selection for RX line */
uart_txpad_t tx_pad; /**< pad selection for TX line */
} uart_conf_t;
/**

16
cpu/samd21/periph/spi.c

@ -67,8 +67,8 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
gpio_mux_t mux_sclk = 0;
gpio_mux_t mux_miso = 0;
gpio_mux_t mux_mosi = 0;
sercom_spi_txpad_t dopo = 0;
sercom_rxpad_t dipo = 0;
spi_mosipad_t mosi_pad = 0;
spi_misopad_t miso_pad = 0;
uint32_t cpha = 0;
uint32_t cpol = 0;
uint32_t f_baud = 0;
@ -129,8 +129,8 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
mux_miso = SPI_0_MISO_MUX;
pin_mosi = SPI_0_MOSI;
mux_mosi = SPI_0_MOSI_MUX;
dopo = SPI_0_MOSI_PAD;
dipo = SPI_0_MISO_PAD;
mosi_pad = SPI_0_MOSI_PAD;
miso_pad = SPI_0_MISO_PAD;
break;
#endif
#if SPI_1_EN
@ -143,8 +143,8 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
mux_miso = SPI_1_MISO_MUX;
pin_mosi = SPI_1_MOSI;
mux_mosi = SPI_1_MOSI_MUX;
dopo = SPI_1_MOSI_PAD;
dipo = SPI_1_MISO_PAD;
mosi_pad = SPI_1_MOSI_PAD;
miso_pad = SPI_1_MISO_PAD;
break;
#endif
default:
@ -191,8 +191,8 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
spi_dev->BAUD.bit.BAUD = (uint8_t) (((uint32_t)CLOCK_CORECLOCK) / (2 * f_baud) - 1); /* Synchronous mode*/
spi_dev->CTRLA.reg |= SERCOM_SPI_CTRLA_DOPO(dopo)
| SERCOM_SPI_CTRLA_DIPO(dipo)
spi_dev->CTRLA.reg |= SERCOM_SPI_CTRLA_DOPO(mosi_pad)
| SERCOM_SPI_CTRLA_DIPO(miso_pad)
| cpha
| cpol;
while (spi_dev->SYNCBUSY.reg) {} // ???? not needed

6
cpu/samd21/periph/uart.c

@ -86,12 +86,12 @@ static int init_base(uart_t uart, uint32_t baudrate)
/* reset the UART device */
dev->CTRLA.reg = SERCOM_USART_CTRLA_SWRST;
while (dev->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_SWRST) {}
/* set asynchronous mode w/o parity, LSB first, PADn to TX, PADn to RX and
* use internal clock */
/* set asynchronous mode w/o parity, LSB first, TX and RX pad as specified
* by the board in the periph_conf.h, x16 sampling and use internal clock */
dev->CTRLA.reg = (SERCOM_USART_CTRLA_DORD |
SERCOM_USART_CTRLA_SAMPR(0x1) |
SERCOM_USART_CTRLA_TXPO(uart_config[uart].tx_pad) |
SERCOM_USART_CTRLA_RXPO(uart_config[uart].rx_pad) |
SERCOM_USART_CTRLA_SAMPR(0x1) | // 1: x16 sample rate
SERCOM_USART_CTRLA_MODE_USART_INT_CLK);
/* set baudrate */
dev->BAUD.FRAC.FP = (baud % 10);

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