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cpus: use default isr_ctx struct in GPIO drivers

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pr/gpio
Hauke Petersen 7 years ago
parent 555c010623
commit ad0abdcadd
15 changed files with 20 additions and 120 deletions
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7
cpu/atmega2560/periph/gpio.c
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@ -34,12 +34,7 @@
#define GPIO_OFFSET_PIN_PIN (0x03)
#define GPIO_EXT_INT_NUMOF (8U)
typedef struct {
gpio_cb_t cb;
void *arg;
} gpio_state_t;
static gpio_state_t config[GPIO_EXT_INT_NUMOF];
static gpio_isr_ctx_t config[GPIO_EXT_INT_NUMOF];
/**
* @brief Extract the pin number of the given pin

15
cpu/cc2538/periph/gpio.c
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@ -44,12 +44,7 @@
*/
#define gpio_enabled(dev) ( (enable_lut >> (dev)) & 1 )
typedef struct {
gpio_cb_t cb; /**< callback called from GPIO interrupt */
void *arg; /**< argument passed to the callback */
} gpio_state_t;
static gpio_state_t gpio_config[GPIO_NUMOF];
static gpio_isr_ctx_t gpio_config[GPIO_NUMOF];
const uint32_t enable_lut = 0
#if GPIO_0_EN
@ -514,7 +509,7 @@ void gpio_write(gpio_t dev, int value)
void isr_gpioa(void)
{
int mis, bit;
gpio_state_t* state;
gpio_isr_ctx_t* state;
/* Latch and clear the interrupt status early on: */
mis = GPIO_A->MIS;
@ -539,7 +534,7 @@ void isr_gpioa(void)
void isr_gpiob(void)
{
int mis, bit;
gpio_state_t* state;
gpio_isr_ctx_t* state;
/* Latch and clear the interrupt status early on: */
mis = GPIO_B->MIS;
@ -564,7 +559,7 @@ void isr_gpiob(void)
void isr_gpioc(void)
{
int mis, bit;
gpio_state_t* state;
gpio_isr_ctx_t* state;
/* Latch and clear the interrupt status early on: */
mis = GPIO_C->MIS;
@ -589,7 +584,7 @@ void isr_gpioc(void)
void isr_gpiod(void)
{
int mis, bit;
gpio_state_t* state;
gpio_isr_ctx_t* state;
/* Latch and clear the interrupt status early on: */
mis = GPIO_D->MIS;

11
cpu/ezr32wg/periph/gpio.c
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@ -31,19 +31,10 @@
* @brief Number of external interrupt lines
*/
#define NUMOF_IRQS (16U)
/**
* @brief Datatype to use for saving the interrupt contexts
*/
typedef struct {
gpio_cb_t cb; /**< callback to call on GPIO interrupt */
void *arg; /**< argument passed to the callback */
} gpio_exti_t;
/**
* @brief Hold one interrupt context per interrupt line
*/
static gpio_exti_t isr_ctx[NUMOF_IRQS];
static gpio_isr_ctx_t isr_ctx[NUMOF_IRQS];
static inline int _port_num(gpio_t pin)
{

7
cpu/lpc11u34/periph/gpio.c
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@ -22,11 +22,6 @@
#include "thread.h"
#include "periph/gpio.h"
typedef struct {
gpio_cb_t cb;
void *arg;
} gpio_state_t;
/* Static IOCON registers definition */
volatile uint32_t * const lpc_pin_registers[] = {
/* PORT 0 (PIO0_0 -> PIO0_23) */
@ -63,7 +58,7 @@ volatile uint32_t * const lpc_pin_registers[] = {
static int8_t flex_int_mapping[GPIO_NUMOF];
static gpio_state_t gpio_config[GPIO_NUMOF];
static gpio_isr_ctx_t gpio_config[GPIO_NUMOF];
static uint8_t gpio_int_id = 0;
/* static port mappings */

7
cpu/lpc2387/periph/gpio.c
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@ -34,12 +34,7 @@
static BITFIELD(_gpio_config_bitfield, GPIO_NUM_ISR);
typedef struct {
gpio_cb_t cb; /**< callback called from GPIO interrupt */
void *arg; /**< argument passed to the callback */
} gpio_state_t;
static gpio_state_t _gpio_states[GPIO_NUM_ISR];
static gpio_isr_ctx_t _gpio_states[GPIO_NUM_ISR];
static BITFIELD(_gpio_rising, GPIO_NUM_ISR);
static BITFIELD(_gpio_falling, GPIO_NUM_ISR);
static uint8_t _gpio_isr_map[64]; /* only ports 0+2 can have ISRs */

10
cpu/msp430fxyz/periph/gpio.c
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@ -32,18 +32,10 @@
*/
#define PINS_PER_PORT (8U)
/**
* @brief Datatype to use for saving the interrupt contexts
*/
typedef struct {
gpio_cb_t cb; /**< callback to call on GPIO interrupt */
void *arg; /**< argument passed to the callback */
} isr_ctx_t;
/**
* @brief Interrupt context for each interrupt line
*/
static isr_ctx_t isr_ctx[ISR_NUMOF];
static gpio_isr_ctx_t isr_ctx[ISR_NUMOF];
static msp_port_t *_port(gpio_t pin)

10
cpu/nrf51/periph/gpio.c
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@ -29,18 +29,10 @@
#include "periph/gpio.h"
#include "periph_conf.h"
/**
* @brief Datastructure to hold an interrupt context
*/
typedef struct {
void (*cb)(void *arg); /**< interrupt callback routine */
void *arg; /**< optional argument */
} exti_ctx_t;
/**
* @brief Place to store the interrupt context
*/
static exti_ctx_t exti_chan;
static gpio_isr_ctx_t exti_chan;
int gpio_init(gpio_t pin, gpio_dir_t dir, gpio_pp_t pullup)
{

10
cpu/sam3/periph/gpio.c
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@ -42,18 +42,10 @@
*/
#define CTX_NUMOF (7U)
/**
* @brief Context information needed for interrupts
*/
typedef struct {
gpio_cb_t cb; /**< callback called from GPIO interrupt */
void *arg; /**< argument passed to the callback */
} exti_ctx_t;
/**
* @brief Allocation of memory for 7 independent interrupt slots
*/
static exti_ctx_t exti_ctx[CTX_NUMOF] = {
static gpio_isr_ctx_t exti_ctx[CTX_NUMOF] = {
{NULL, NULL}, {NULL, NULL}, {NULL, NULL}, {NULL, NULL},
{NULL, NULL}, {NULL, NULL}, {NULL, NULL}
};

10
cpu/samd21/periph/gpio.c
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@ -44,18 +44,10 @@ static const int8_t exti_config[2][32] = {
0, 1, -1, -1, -1, -1, 6, 7, -1, -1, -1, 15, 8, -1, 10, 11},
};
/**
* @brief Datatype to use for saving the interrupt contexts
*/
typedef struct {
gpio_cb_t cb; /**< callback to call on GPIO interrupt */
void *arg; /**< argument passed to the callback */
} gpio_exti_t;
/**
* @brief Hold one interrupt context per interrupt line
*/
static gpio_exti_t gpio_config[NUMOF_IRQS];
static gpio_isr_ctx_t gpio_config[NUMOF_IRQS];
static inline PortGroup *_port(gpio_t pin)
{

7
cpu/saml21/periph/gpio.c
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@ -51,12 +51,7 @@ static const int8_t exti_config[2][32] = {
0, 1, -1, -1, -1, -1, 6, 7, -1, -1, -1, -1, -1, -1, 14, 15},
};
typedef struct {
gpio_cb_t cb; /**< callback called from GPIO interrupt */
void *arg; /**< argument passed to the callback */
} gpio_state_t;
static gpio_state_t gpio_config[NUMOF_IRQS];
static gpio_isr_ctx_t gpio_config[NUMOF_IRQS];
static inline PortGroup *_port(gpio_t pin)

7
cpu/stm32f0/periph/gpio.c
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@ -24,12 +24,7 @@
#include "periph/gpio.h"
#include "periph_conf.h"
typedef struct {
gpio_cb_t cb;
void *arg;
} gpio_state_t;
static gpio_state_t gpio_config[GPIO_NUMOF];
static gpio_isr_ctx_t gpio_config[GPIO_NUMOF];
/* static port mappings */
static GPIO_TypeDef *const gpio_port_map[GPIO_NUMOF] = {

7
cpu/stm32f1/periph/gpio.c
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@ -35,15 +35,10 @@
*/
#define GPIO_ISR_CHAN_NUMOF (16U)
typedef struct {
gpio_cb_t cb; /**< callback called from GPIO interrupt */
void *arg; /**< argument passed to the callback */
} exti_ctx_t;
/**
* @brief Allocate memory for one callback and argument per EXTI channel
*/
static exti_ctx_t exti_ctx[GPIO_ISR_CHAN_NUMOF];
static gpio_isr_ctx_t exti_ctx[GPIO_ISR_CHAN_NUMOF];
/**
* @brief Extract the pin's port base address from the given pin identifier

10
cpu/stm32f3/periph/gpio.c
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@ -32,18 +32,10 @@
*/
#define EXTI_NUMOF (16U)
/**
* @brief Datastructure to hold an interrupt context
*/
typedef struct {
gpio_cb_t cb; /**< callback called from GPIO interrupt */
void *arg; /**< argument passed to the callback */
} gpio_state_t;
/**
* @brief Hold one callback function pointer for each interrupt line
*/
static gpio_state_t exti_chan[EXTI_NUMOF];
static gpio_isr_ctx_t exti_chan[EXTI_NUMOF];
/**
* @brief Extract the port base address from the given pin identifier

10
cpu/stm32f4/periph/gpio.c
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@ -30,18 +30,10 @@
*/
#define GPIO_ISR_CHAN_NUMOF (16U)
/**
* @brief Datastructure to hold an interrupt context
*/
typedef struct {
void (*cb)(void *arg); /**< interrupt callback routine */
void *arg; /**< optional argument */
} exti_ctx_t;
/**
* @brief Hold one callback function pointer for each interrupt line
*/
static exti_ctx_t exti_chan[GPIO_ISR_CHAN_NUMOF];
static gpio_isr_ctx_t exti_chan[GPIO_ISR_CHAN_NUMOF];
/**
* @brief Extract the port base address from the given pin identifier

12
cpu/stm32l1/periph/gpio.c
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@ -26,23 +26,15 @@
#include "periph/gpio.h"
#include "periph_conf.h"
#/**
/**
* @brief Number of available external interrupt lines
*/
#define GPIO_ISR_CHAN_NUMOF (16U)
/**
* @brief Datastructure to hold an interrupt context
*/
typedef struct {
void (*cb)(void *arg); /**< interrupt callback routine */
void *arg; /**< optional argument */
} exti_ctx_t;
/**
* @brief Hold one callback function pointer for each interrupt line
*/
static exti_ctx_t exti_chan[GPIO_ISR_CHAN_NUMOF];
static gpio_isr_ctx_t exti_chan[GPIO_ISR_CHAN_NUMOF];
/**
* @brief Extract the port base address from the given pin identifier

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