@ -382,34 +382,34 @@
/* F_cco0 = (2 * M * F_in) / N */
# define __ M (((PLL0CFG_Val ) & 0x7FFF) + 1)
# define __ N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
# define __ FCCO(__ F_IN) ((2ULL * __ M * __ F_IN) / __ N)
# define __ CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)
# define M (((PLL0CFG_Val ) & 0x7FFF) + 1)
# define N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
# define FCCO(F_IN) ((2ULL * M * F_IN) / N)
# define CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)
/* Determine core clock frequency according to settings */
# if (PLL0_SETUP)
# if ((CLKSRCSEL_Val & 0x03) == 1)
# define __ CORE_CLK (__ FCCO(OSC_CLK) / __ CCLK_DIV)
# define CORE_CLK (FCCO(OSC_CLK) / CCLK_DIV)
# elif ((CLKSRCSEL_Val & 0x03) == 2)
# define __ CORE_CLK (__ FCCO(RTC_CLK) / __ CCLK_DIV)
# define CORE_CLK (FCCO(RTC_CLK) / CCLK_DIV)
# else
# define __ CORE_CLK (__ FCCO(IRC_OSC) / __ CCLK_DIV)
# define CORE_CLK (FCCO(IRC_OSC) / CCLK_DIV)
# endif
# else
# if ((CLKSRCSEL_Val & 0x03) == 1)
# define __ CORE_CLK (OSC_CLK / __ CCLK_DIV)
# define CORE_CLK (OSC_CLK / CCLK_DIV)
# elif ((CLKSRCSEL_Val & 0x03) == 2)
# define __ CORE_CLK (RTC_CLK / __ CCLK_DIV)
# define CORE_CLK (RTC_CLK / CCLK_DIV)
# else
# define __ CORE_CLK (IRC_OSC / __ CCLK_DIV)
# define CORE_CLK (IRC_OSC / CCLK_DIV)
# endif
# endif
/*----------------------------------------------------------------------------
Clock Variable definitions
* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
uint32_t system_clock = __ CORE_CLK; /*!< System Clock Frequency (Core Clock)*/
uint32_t system_clock = CORE_CLK; /*!< System Clock Frequency (Core Clock)*/
/*----------------------------------------------------------------------------