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boards/samd21-xpro: add initial support

master
Travis Griggs 6 years ago
parent
commit
bc4cd53946
  1. 3
      boards/samd21-xpro/Makefile
  2. 3
      boards/samd21-xpro/Makefile.dep
  3. 16
      boards/samd21-xpro/Makefile.features
  4. 25
      boards/samd21-xpro/Makefile.include
  5. 37
      boards/samd21-xpro/board.c
  6. 2
      boards/samd21-xpro/dist/openocd.cfg
  7. 76
      boards/samd21-xpro/include/board.h
  8. 53
      boards/samd21-xpro/include/gpio_params.h
  9. 275
      boards/samd21-xpro/include/periph_conf.h

3
boards/samd21-xpro/Makefile

@ -0,0 +1,3 @@
MODULE = board
include $(RIOTBASE)/Makefile.base

3
boards/samd21-xpro/Makefile.dep

@ -0,0 +1,3 @@
ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += saul_gpio
endif

16
boards/samd21-xpro/Makefile.features

@ -0,0 +1,16 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# Various other features (if any)
FEATURES_PROVIDED += cpp
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = cortex_m0_2

25
boards/samd21-xpro/Makefile.include

@ -0,0 +1,25 @@
# define the cpu used by SAMD21 Xplained Pro board
export CPU = samd21
export CPU_MODEL = samd21j18a
# set default port depending on operating system
PORT_LINUX ?= /dev/ttyACM0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
# setup serial terminal
include $(RIOTMAKE)/tools/serial.inc.mk
# Add board selector (USB serial) to OpenOCD options if specified.
# Use /dist/tools/usb-serial/list-ttys.sh to find out serial number.
# Usage: SERIAL="ATML..." BOARD="samd21-xpro" make flash
ifneq (,$(SERIAL))
export OPENOCD_EXTRA_INIT += "-c cmsis_dap_serial $(SERIAL)"
SERIAL_TTY = $(firstword $(shell $(RIOTBASE)/dist/tools/usb-serial/find-tty.sh $(SERIAL)))
ifeq (,$(SERIAL_TTY))
$(error Did not find a device with serial $(SERIAL))
endif
PORT_LINUX := $(SERIAL_TTY)
endif
# this board uses openocd
include $(RIOTMAKE)/tools/openocd.inc.mk

37
boards/samd21-xpro/board.c

@ -0,0 +1,37 @@
/*
* Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
* Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_samd21-xpro
* @{
*
* @file
* @brief Board specific implementations for the Atmel SAM D21 Xplained
* Pro board
*
* @author Travis Griggs <travisgriggs@gmail.com>
* @author Dan Evans <photonthunder@gmail.com>
*
* @}
*/
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the on-board LED */
gpio_init(LED0_PIN, GPIO_OUT);
/* initialize the on-board button */
gpio_init(BUTTON_GPIO, GPIO_IN_PU);
/* initialize the CPU */
cpu_init();
}

2
boards/samd21-xpro/dist/openocd.cfg vendored

@ -0,0 +1,2 @@
source [find board/atmel_samd21_xplained_pro.cfg]
$_TARGETNAME configure -rtos auto

76
boards/samd21-xpro/include/board.h

@ -0,0 +1,76 @@
/*
* Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
* Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_samd21-xpro Atmel SAM D21 Xplained Pro
* @ingroup boards
* @brief Support for the Atmel SAM D21 Xplained Pro board.
* @{
*
* @file
* @brief Board specific definitions for the Atmel SAM D21 Xplained Pro
* board
*
* @author Travis Griggs <travisgriggs@gmail.com>
* @author Dan Evans <photonthunder@gmail.com>
*/
#ifndef BOARD_H
#define BOARD_H
#include "cpu.h"
#include "periph_conf.h"
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name xtimer configuration
* @{
*/
#define XTIMER_DEV TIMER_1
#define XTIMER_CHAN (0)
/** @} */
/**
* @name LED pin definitions and handlers
* @{
*/
#define LED0_PIN GPIO_PIN(PB, 30)
#define LED_PORT PORT->Group[PB]
#define LED0_MASK (1 << 30)
#define LED0_ON (LED_PORT.OUTCLR.reg = LED0_MASK)
#define LED0_OFF (LED_PORT.OUTSET.reg = LED0_MASK)
#define LED0_TOGGLE (LED_PORT.OUTTGL.reg = LED0_MASK)
/** @} */
/**
* @name SW0 (Button) pin definitions
* @{
*/
#define BUTTON_PORT PORT->Group[PA]
#define BUTTON_PIN (15)
#define BUTTON_GPIO GPIO_PIN(PA, BUTTON_PIN)
/** @} */
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H */
/** @} */

53
boards/samd21-xpro/include/gpio_params.h

@ -0,0 +1,53 @@
/*
* Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
* Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_samd21-xpro
* @{
*
* @file
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Travis Griggs <travisgriggs@gmail.com>
* @author Dan Evans <photonthunder@gmail.com>
*/
#ifndef GPIO_PARAMS_H
#define GPIO_PARAMS_H
#include "board.h"
#include "saul/periph.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GPIO pin configuration
*/
static const saul_gpio_params_t saul_gpio_params[] =
{
{
.name = "LED(orange)",
.pin = LED0_PIN,
.mode = GPIO_OUT
},
{
.name = "Button(SW0)",
.pin = BUTTON_GPIO,
.mode = GPIO_IN_PU
},
};
#ifdef __cplusplus
}
#endif
#endif /* GPIO_PARAMS_H */
/** @} */

275
boards/samd21-xpro/include/periph_conf.h

@ -0,0 +1,275 @@
/*
* Copyright (C) 2017 Travis Griggs <travisgriggs@gmail.com>
* Copyright (C) 2017 Dan Evans <photonthunder@gmail.com>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_samd21-xpro
* @{
*
* @file
* @brief Configuration of CPU peripherals for the Atmel SAM D21 Xplained
* Pro board
*
* @author Travis Griggs <travisgriggs@gmail.com>
* @author Dan Evans <photonthunder@gmail.com>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#include <stdint.h>
#include "cpu.h"
#include "periph_cpu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name External oscillator and clock configuration
*
* There are two choices for selection of CORECLOCK:
*
* - usage of the PLL fed by the internal 8MHz oscillator divided by 8
* - usage of the internal 8MHz oscillator directly, divided by N if needed
*
*
* The PLL option allows for the usage of a wider frequency range and a more
* stable clock with less jitter. This is why this option is default.
*
* The target frequency is computed from the PLL multiplier and the PLL divisor.
* Use the following formula to compute your values:
*
* CORECLOCK = ((PLL_MUL + 1) * 1MHz) / PLL_DIV
*
* NOTE: The PLL circuit does not run with less than 32MHz while the maximum PLL
* frequency is 96MHz. So PLL_MULL must be between 31 and 95!
*
*
* The internal Oscillator used directly can lead to a slightly better power
* efficiency to the cost of a less stable clock. Use this option when you know
* what you are doing! The actual core frequency is adjusted as follows:
*
* CORECLOCK = 8MHz / DIV
*
* NOTE: A core clock frequency below 1MHz is not recommended
*
* @{
*/
#define CLOCK_USE_PLL (1)
#if CLOCK_USE_PLL
/* edit these values to adjust the PLL output frequency */
#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
/* generate the actual used core clock frequency */
#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
#else
/* edit this value to your needs */
#define CLOCK_DIV (1U)
/* generate the actual core clock frequency */
#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
#endif
/** @} */
/**
* @name Timer peripheral configuration
* @{
*/
#define TIMER_NUMOF (2U)
#define TIMER_0_EN 1
#define TIMER_1_EN 1
/* Timer 0 configuration */
#define TIMER_0_DEV TC3->COUNT16
#define TIMER_0_CHANNELS 2
#define TIMER_0_MAX_VALUE (0xffff)
#define TIMER_0_ISR isr_tc3
/* Timer 1 configuration */
#define TIMER_1_DEV TC4->COUNT32
#define TIMER_1_CHANNELS 2
#define TIMER_1_MAX_VALUE (0xffffffff)
#define TIMER_1_ISR isr_tc4
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{ /* Virtual COM Port */
.dev = &SERCOM3->USART,
.rx_pin = GPIO_PIN(PA,23),
.tx_pin = GPIO_PIN(PA,22),
.mux = GPIO_MUX_C,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0
},
{ /* EXT1 */
.dev = &SERCOM4->USART,
.rx_pin = GPIO_PIN(PB,9),
.tx_pin = GPIO_PIN(PB,8),
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_1,
.tx_pad = UART_PAD_TX_0
},
{ /* EXT2/3 */
.dev = &SERCOM4->USART,
.rx_pin = GPIO_PIN(PB,11),
.tx_pin = GPIO_PIN(PB,10),
.mux = GPIO_MUX_D,
.rx_pad = UART_PAD_RX_3,
.tx_pad = UART_PAD_TX_2
}
};
/* interrupt function name mapping */
#define UART_0_ISR isr_sercom3
#define UART_1_ISR isr_sercom4
#define UART_2_ISR isr_sercom5
#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
/** @} */
/**
* @name PWM configuration
* @{
*/
#define PWM_0_EN 1
#define PWM_1_EN 0
#define PWM_2_EN 0
#define PWM_MAX_CHANNELS 2
/* for compatibility with test application */
#define PWM_0_CHANNELS PWM_MAX_CHANNELS
#define PWM_1_CHANNELS PWM_MAX_CHANNELS
#define PWM_2_CHANNELS PWM_MAX_CHANNELS
/* PWM device configuration */
static const pwm_conf_t pwm_config[] = {
#if PWM_0_EN
{TCC2, {
/* GPIO pin, MUX value, TCC channel */
{ GPIO_PIN(PA, 12), GPIO_MUX_E, 0 },
{ GPIO_PIN(PA, 13), GPIO_MUX_E, 1 },
}},
#endif
#if PWM_1_EN
{TC4, {
/* GPIO pin, MUX value, TCC channel */
{ GPIO_PIN(PB, 12), GPIO_MUX_E, 0 },
{ GPIO_PIN(PB, 13), GPIO_MUX_E, 1 },
}}
#endif
#if PWM_2_EN
{TC6, {
/* GPIO pin, MUX value, TCC channel */
{ GPIO_PIN(PB, 02), GPIO_MUX_E, 0 },
{ GPIO_PIN(PB, 03), GPIO_MUX_E, 1 },
}}
#endif
};
/* number of devices that are actually defined */
#define PWM_NUMOF (3U)
/** @} */
/**
* @name SPI configuration
* @{
*/
static const spi_conf_t spi_config[] = {
{
.dev = &SERCOM0->SPI,
.miso_pin = GPIO_PIN(PA, 4),
.mosi_pin = GPIO_PIN(PA, 6),
.clk_pin = GPIO_PIN(PA, 7),
.miso_mux = GPIO_MUX_D,
.mosi_mux = GPIO_MUX_D,
.clk_mux = GPIO_MUX_D,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
},
{
.dev = &SERCOM1->SPI,
.miso_pin = GPIO_PIN(PA, 16),
.mosi_pin = GPIO_PIN(PA, 18),
.clk_pin = GPIO_PIN(PA, 19),
.miso_mux = GPIO_MUX_C,
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
},
{
.dev = &SERCOM5->SPI,
.miso_pin = GPIO_PIN(PB, 16),
.mosi_pin = GPIO_PIN(PB, 22),
.clk_pin = GPIO_PIN(PB, 23),
.miso_mux = GPIO_MUX_C,
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_0,
.mosi_pad = SPI_PAD_MOSI_2_SCK_3
}
};
#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
/** @} */
/**
* @name I2C configuration
* @{
*/
#define I2C_NUMOF (1U)
#define I2C_0_EN 1
#define I2C_1_EN 0
#define I2C_2_EN 0
#define I2C_3_EN 0
#define I2C_IRQ_PRIO 1
#define I2C_0_DEV SERCOM2->I2CM
#define I2C_0_IRQ SERCOM2_IRQn
#define I2C_0_ISR isr_sercom2
/* I2C 0 GCLK */
#define I2C_0_GCLK_ID SERCOM2_GCLK_ID_CORE
#define I2C_0_GCLK_ID_SLOW SERCOM2_GCLK_ID_SLOW
/* I2C 0 pin configuration */
#define I2C_0_SDA GPIO_PIN(PA, 8)
#define I2C_0_SCL GPIO_PIN(PA, 9)
#define I2C_0_MUX GPIO_MUX_D
/**
* @name RTC configuration
* @{
*/
#define RTC_NUMOF (1U)
#define RTC_DEV RTC->MODE2
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_NUMOF (1U)
#define RTT_DEV RTC->MODE0
#define RTT_IRQ RTC_IRQn
#define RTT_IRQ_PRIO 10
#define RTT_ISR isr_rtc
#define RTT_MAX_VALUE (0xffffffff)
#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
#define RTT_RUNSTDBY (1) /* Keep RTT running in sleep states */
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H */
/** @} */
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