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cpu/stm32f1: modernized the GPIO driver

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dev/timer
Hauke Petersen 8 years ago
parent a0c7df6726
commit bcb9aebadd
7 changed files with 229 additions and 981 deletions
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77
cpu/stm32f1/include/periph_cpu.h
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@ -19,13 +19,88 @@
#ifndef PERIPH_CPU_H_
#define PERIPH_CPU_H_
#include "cpu.h"
#include "periph/dev_enums.h"
#ifdef __cplusplus
extern "C" {
#endif
/* nothing defined here so far... */
/**
* @brief Overwrite the default gpio_t type definition
* @{
*/
#define HAVE_GPIO_T
typedef uint32_t gpio_t;
/** @} */
/**
* @brief Definition of a fitting UNDEF value
*/
#define GPIO_UNDEF (0xffffffff)
/**
* @brief Define a CPU specific GPIO pin generator macro
*/
#define GPIO(x, y) ((GPIOA_BASE + (x << 10)) | y)
/**
* @brief Override values for pull register configuration
* @{
*/
#define HAVE_GPIO_PP_T
typedef enum {
GPIO_NOPULL = 4, /**< do not use internal pull resistors */
GPIO_PULLUP = 9, /**< enable internal pull-up resistor */
GPIO_PULLDOWN = 8 /**< enable internal pull-down resistor */
} gpio_pp_t;
/** @} */
/**
* @brief Override flank configuration values
* @{
*/
#define HAVE_GPIO_FLANK_T
typedef enum {
GPIO_RISING = 1, /**< emit interrupt on rising flank */
GPIO_FALLING = 2, /**< emit interrupt on falling flank */
GPIO_BOTH = 3 /**< emit interrupt on both flanks */
} gpio_flank_t;
/** @} */
/**
* @brief Available ports on the STM32F1 family
*/
enum {
PORT_A = 0, /**< port A */
PORT_B = 1, /**< port B */
PORT_C = 2, /**< port C */
PORT_D = 3, /**< port D */
PORT_E = 4, /**< port E */
PORT_F = 5, /**< port F */
PORT_G = 6, /**< port G */
};
/**
* @brief Define alternate function modes
*
* On this CPU, only the output pins have alternate function modes. The input
* pins have to be configured using the default gpio_init() function.
*/
typedef enum {
GPIO_AF_OUT_PP = 0xb, /**< alternate function output - push-pull */
GPIO_AF_OUT_OD = 0xf, /**< alternate function output - open-drain */
} gpio_af_out_t;
/**
* @brief Configure the alternate function for the given pin
*
* @note This is meant for internal use in STM32F1 peripheral drivers only
*
* @param[in] pin pin to configure
* @param[in] af alternate function to use
*/
void gpio_init_af(gpio_t pin, gpio_af_out_t af);
#ifdef __cplusplus
}

3
cpu/stm32f1/include/stm32f10x.h
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@ -1009,8 +1009,7 @@ typedef struct
typedef struct
{
__IO uint32_t CRL;
__IO uint32_t CRH;
__IO uint32_t CR[2];
__IO uint32_t IDR;
__IO uint32_t ODR;
__IO uint32_t BSRR;

1068
cpu/stm32f1/periph/gpio.c
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File diff suppressed because it is too large Load Diff

16
cpu/stm32f1/periph/i2c.c
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@ -147,16 +147,16 @@ static void _pin_config(GPIO_TypeDef *port_scl, GPIO_TypeDef *port_sda, int pin_
{
/* configure pins, alternate output, open-drain, output mode with 50MHz */
if (pin_scl < 8) {
port_scl->CRL |= (0xf << (pin_scl * 4));
port_scl->CR[0] |= (0xf << (pin_scl * 4));
}
else {
port_scl->CRH |= (0xf << ((pin_scl - 8) * 4));
port_scl->CR[1] |= (0xf << ((pin_scl - 8) * 4));
}
if (pin_sda < 8) {
port_sda->CRL |= (0xf << (pin_sda * 4));
port_sda->CR[0] |= (0xf << (pin_sda * 4));
}
else {
port_sda->CRH |= (0xf << ((pin_sda - 8) * 4));
port_sda->CR[1] |= (0xf << ((pin_sda - 8) * 4));
}
}
@ -164,16 +164,16 @@ static void _toggle_pins(GPIO_TypeDef *port_scl, GPIO_TypeDef *port_sda, int pin
{
/* configure pins, output, open-drain, output mode with 50MHz */
if (pin_scl < 8) {
port_scl->CRL |= (0x7 << (pin_scl * 4));
port_scl->CR[0] |= (0x7 << (pin_scl * 4));
}
else {
port_scl->CRH |= (0x7 << ((pin_scl - 8) * 4));
port_scl->CR[1] |= (0x7 << ((pin_scl - 8) * 4));
}
if (pin_sda < 8) {
port_sda->CRL |= (0x7 << (pin_sda * 4));
port_sda->CR[0] |= (0x7 << (pin_sda * 4));
}
else {
port_sda->CRH |= (0x7 << ((pin_sda - 8) * 4));
port_sda->CR[1] |= (0x7 << ((pin_sda - 8) * 4));
}
/* set both to high */
port_scl->ODR |= (1 << pin_scl);

8
cpu/stm32f1/periph/spi.c
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@ -131,12 +131,12 @@ int spi_conf_pins(spi_t dev)
for (int i = 0; i < 3; i++) {
int crbitval = (i < 2) ? 0xb : 0x4;
if (pin[i] < 8) {
port[i]->CRL &= ~(0xf << (pin[i] * 4));
port[i]->CRL |= (crbitval << (pin[i] * 4));
port[i]->CR[0] &= ~(0xf << (pin[i] * 4));
port[i]->CR[0] |= (crbitval << (pin[i] * 4));
}
else {
port[i]->CRH &= ~(0xf << ((pin[i] - 8) * 4));
port[i]->CRH |= (crbitval << ((pin[i] - 8) * 4));
port[i]->CR[1] &= ~(0xf << ((pin[i] - 8) * 4));
port[i]->CR[1] |= (crbitval << ((pin[i] - 8) * 4));
}
}

16
cpu/stm32f1/periph/uart.c
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@ -136,21 +136,21 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
}
/* Configure USART Tx as alternate function push-pull and 50MHz*/
if (tx_pin < 8) {
port->CRL &= ~(0xf << (tx_pin * 4));
port->CRL |= (0xB << (tx_pin * 4));
port->CR[0] &= ~(0xf << (tx_pin * 4));
port->CR[0] |= (0xB << (tx_pin * 4));
}
else {
port->CRH &= ~(0xf << ((tx_pin-8) * 4));
port->CRH |= (0xB << ((tx_pin-8) * 4));
port->CR[1] &= ~(0xf << ((tx_pin-8) * 4));
port->CR[1] |= (0xB << ((tx_pin-8) * 4));
}
/* Configure USART Rx as floating input */
if (rx_pin < 8) {
port->CRL &= ~(0xf << (rx_pin * 4));
port->CRL |= (0x4 << (rx_pin * 4));
port->CR[0] &= ~(0xf << (rx_pin * 4));
port->CR[0] |= (0x4 << (rx_pin * 4));
}
else {
port->CRH &= ~(0xf << ((rx_pin-8) * 4));
port->CRH |= (0x4 << ((rx_pin-8) * 4));
port->CR[1] &= ~(0xf << ((rx_pin-8) * 4));
port->CR[1] |= (0x4 << ((rx_pin-8) * 4));
}
/* configure UART to mode 8N1 with given baudrate */

22
cpu/stm32f1/vectors.c
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@ -42,11 +42,7 @@ WEAK_DEFAULT void isr_tamper(void);
WEAK_DEFAULT void isr_rtc(void);
WEAK_DEFAULT void isr_flash(void);
WEAK_DEFAULT void isr_rcc(void);
WEAK_DEFAULT void isr_exti0(void);
WEAK_DEFAULT void isr_exti1(void);
WEAK_DEFAULT void isr_exti2(void);
WEAK_DEFAULT void isr_exti3(void);
WEAK_DEFAULT void isr_exti4(void);
WEAK_DEFAULT void isr_exti(void);
WEAK_DEFAULT void isr_dma1_ch1(void);
WEAK_DEFAULT void isr_dma1_ch2(void);
WEAK_DEFAULT void isr_dma1_ch3(void);
@ -59,7 +55,6 @@ WEAK_DEFAULT void isr_usb_hp_can1_tx(void);
WEAK_DEFAULT void isr_usb_lp_can1_rx0(void);
WEAK_DEFAULT void isr_can1_rx1(void);
WEAK_DEFAULT void isr_can1_sce(void);
WEAK_DEFAULT void isr_exti9_5(void);
WEAK_DEFAULT void isr_tim1_brk(void);
WEAK_DEFAULT void isr_tim1_up(void);
WEAK_DEFAULT void isr_tim1_trg_com(void);
@ -76,7 +71,6 @@ WEAK_DEFAULT void isr_spi2(void);
WEAK_DEFAULT void isr_usart1(void);
WEAK_DEFAULT void isr_usart2(void);
WEAK_DEFAULT void isr_usart3(void);
WEAK_DEFAULT void isr_exti15_10(void);
WEAK_DEFAULT void isr_rtc_alarm(void);
WEAK_DEFAULT void isr_usb_wakeup(void);
WEAK_DEFAULT void isr_tim8_brk(void);
@ -126,11 +120,11 @@ ISR_VECTORS const void *interrupt_vector[] = {
(void*) isr_rtc,
(void*) isr_flash,
(void*) isr_rcc,
(void*) isr_exti0,
(void*) isr_exti1,
(void*) isr_exti2,
(void*) isr_exti3,
(void*) isr_exti4,
(void*) isr_exti,
(void*) isr_exti,
(void*) isr_exti,
(void*) isr_exti,
(void*) isr_exti,
(void*) isr_dma1_ch1,
(void*) isr_dma1_ch2,
(void*) isr_dma1_ch3,
@ -143,7 +137,7 @@ ISR_VECTORS const void *interrupt_vector[] = {
(void*) isr_usb_lp_can1_rx0,
(void*) isr_can1_rx1,
(void*) isr_can1_sce,
(void*) isr_exti9_5,
(void*) isr_exti,
(void*) isr_tim1_brk,
(void*) isr_tim1_up,
(void*) isr_tim1_trg_com,
@ -160,7 +154,7 @@ ISR_VECTORS const void *interrupt_vector[] = {
(void*) isr_usart1,
(void*) isr_usart2,
(void*) isr_usart3,
(void*) isr_exti15_10,
(void*) isr_exti,
(void*) isr_rtc_alarm,
(void*) isr_usb_wakeup,
(void*) isr_tim8_brk,

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