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Merge pull request #1505 from haukepetersen/add_stm32f0_adc

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cpu/board: added ADC driver for stm32f0discovery
dev/timer
Hauke Petersen 9 years ago
parent 8890470783 3a45a062d1
commit c54594632f
2 changed files with 227 additions and 45 deletions
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68
boards/stm32f0discovery/include/periph_conf.h
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@ -100,57 +100,35 @@
* @name ADC configuration
* @{
*/
#define ADC_NUMOF (0U)
#define ADC_0_EN 0
#define ADC_1_EN 0
#define ADC_NUMOF (1U)
#define ADC_0_EN 1
#define ADC_MAX_CHANNELS 6
/* ADC 0 configuration */
#define ADC_0_DEV ADC1 /* TODO */
#define ADC_0_SAMPLE_TIMER
#define ADC_0_DEV ADC1
#define ADC_0_CHANNELS 6
#define ADC_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_ADCEN)
#define ADC_0_CLKDIS() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADCEN))
#define ADC_0_PORT GPIOC
#define ADC_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
/* ADC 0 channel 0 pin config */
#define ADC_0_C0_PORT
#define ADC_0_C0_PIN
#define ADC_0_C0_CLKEN()
#define ADC_0_C0_AFCFG()
#define ADC_0_CH0 10
#define ADC_0_CH0_PIN 0
/* ADC 0 channel 1 pin config */
#define ADC_0_C1_PORT
#define ADC_0_C1_PIN
#define ADC_0_C1_CLKEN()
#define ADC_0_C1_AFCFG()
#define ADC_0_CH1 11
#define ADC_0_CH1_PIN 1
/* ADC 0 channel 2 pin config */
#define ADC_0_C2_PORT
#define ADC_0_C2_PIN
#define ADC_0_C2_CLKEN()
#define ADC_0_C2_AFCFG()
#define ADC_0_CH2 12
#define ADC_0_CH2_PIN 2
/* ADC 0 channel 3 pin config */
#define ADC_0_C3_PORT
#define ADC_0_C3_PIN
#define ADC_0_C3_CLKEN()
#define ADC_0_C3_AFCFG()
/* ADC 0 configuration */
#define ADC_1_DEV ADC2 /* TODO */
#define ADC_1_SAMPLE_TIMER
/* ADC 0 channel 0 pin config */
#define ADC_1_C0_PORT
#define ADC_1_C0_PIN
#define ADC_1_C0_CLKEN()
#define ADC_1_C0_AFCFG()
/* ADC 0 channel 1 pin config */
#define ADC_1_C1_PORT
#define ADC_1_C1_PIN
#define ADC_1_C1_CLKEN()
#define ADC_1_C1_AFCFG()
/* ADC 0 channel 2 pin config */
#define ADC_1_C2_PORT
#define ADC_1_C2_PIN
#define ADC_1_C2_CLKEN()
#define ADC_1_C2_AFCFG()
/* ADC 0 channel 3 pin config */
#define ADC_1_C3_PORT
#define ADC_1_C3_PIN
#define ADC_1_C3_CLKEN()
#define ADC_1_C3_AFCFG()
#define ADC_0_CH3 13
#define ADC_0_CH3_PIN 3
/* ADC 0 channel 4 pin config */
#define ADC_0_CH4 14
#define ADC_0_CH4_PIN 4
/* ADC 0 channel 5 pin config */
#define ADC_0_CH5 15
#define ADC_0_CH5_PIN 5
/** @} */

204
cpu/stm32f0/periph/adc.c
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@ -0,0 +1,204 @@
/*
* Copyright (C) 2014 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more
* details.
*/
/**
* @ingroup cpu_stm32f0
* @{
*
* @file
* @brief Low-level ADC driver implementation
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <stdint.h>
#include <string.h>
#include "cpu.h"
#include "periph/adc.h"
#include "periph_conf.h"
/* guard in case that no ADC device is defined */
#if ADC_NUMOF
typedef struct {
uint8_t precision;
} adc_config_t;
adc_config_t config[ADC_NUMOF];
int adc_init(adc_t dev, adc_precision_t precision)
{
ADC_TypeDef *adc = 0;
adc_poweron(dev);
switch (dev) {
#if ADC_0_EN
case ADC_0:
adc = ADC_0_DEV;
ADC_0_PORT_CLKEN();
ADC_0_PORT->MODER |= ((3 << ADC_0_CH0_PIN) | (3 << ADC_0_CH1_PIN) |
(3 << ADC_0_CH2_PIN) | (3 << ADC_0_CH3_PIN) |
(3 << ADC_0_CH4_PIN) | (3 << ADC_0_CH5_PIN));
break;
#endif
}
/* reset control registers */
adc->CR = 0;
adc->CFGR1 = 0;
adc->CFGR2 = 0;
/* set resolution */
config[dev].precision = (6 + (2 * precision));
switch (precision) {
case ADC_RES_6BIT:
adc->CFGR1 |= ADC_CFGR1_RES_0 | ADC_CFGR1_RES_1;
break;
case ADC_RES_8BIT:
adc->CFGR1 |= ADC_CFGR1_RES_1;
break;
case ADC_RES_10BIT:
adc->CFGR1 |= ADC_CFGR1_RES_0;
break;
case ADC_RES_12BIT:
break;
case ADC_RES_14BIT:
case ADC_RES_16BIT:
adc_poweroff(dev);
return -1;
break;
}
/* configure sampling time to 41.5 cycles */
adc->SMPR = 4;
/* enable the ADC module */
adc->CR = ADC_CR_ADEN;
return 0;
}
int adc_sample(adc_t dev, int channel)
{
ADC_TypeDef *adc = 0;
switch (dev) {
#if ADC_0_EN
case ADC_0:
adc = ADC_0_DEV;
switch (channel) {
case 0:
adc->CHSELR = (1 << ADC_0_CH0);
break;
case 1:
adc->CHSELR = (1 << ADC_0_CH1);
break;
case 2:
adc->CHSELR = (1 << ADC_0_CH2);
break;
case 3:
adc->CHSELR = (1 << ADC_0_CH3);
break;
case 4:
adc->CHSELR = (1 << ADC_0_CH4);
break;
case 5:
adc->CHSELR = (1 << ADC_0_CH5);
break;
default:
return -1;
}
break;
#endif
}
/* start single conversion */
adc->CR |= ADC_CR_ADSTART;
/* wait until conversion is complete */
while (!(adc->ISR & ADC_ISR_EOC));
/* read and return result */
return (int)adc->DR;
}
void adc_poweron(adc_t dev)
{
switch (dev) {
#if ADC_0_EN
case ADC_0:
ADC_0_CLKEN();
break;
#endif
#if ADC_1_EN
case ADC_1:
ADC_1_CLKEN();
break;
#endif
}
}
void adc_poweroff(adc_t dev)
{
switch (dev) {
#if ADC_0_EN
case ADC_0:
ADC_0_CLKDIS();
break;
#endif
#if ADC_1_EN
case ADC_1:
ADC_1_CLKDIS();
break;
#endif
}
}
/**
* @brief Helper function to map a converted value to the given integer range.
*
* This function is useful for converting sampled ADC values into their physical representation.
*
* The min value is asserted to be smaller than the max value.
*
* @param[in] dev the ADC device to read the precision value from (as input interval)
* @param[in] value the value to map
* @param[in] min the lower bound of the target interval
* @param[in] max the upper bound of the target interval
*
* @return the mapped value
*/
int adc_map(adc_t dev, int value, int min, int max)
{
return 0;
}
/**
* @brief Helper function to map a converted value to the given float range
*
* @see adc_map
*
* @param[in] dev the ADC device to read the precision value from (as input interval)
* @param[in] value the value to map
* @param[in] min the lower bound of the target interval
* @param[in] max the upper bound of the target interval
*
* @return the mapped value
*/
float adc_mapf(adc_t dev, int value, float min, float max)
{
return 0.0;
}
#endif /* ADC_NUMOF */
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