|
|
|
@ -1,5 +1,5 @@
|
|
|
|
|
/*
|
|
|
|
|
* Copyright (C) 2014 Freie Universität Berlin
|
|
|
|
|
* Copyright (C) 2014-2015 Freie Universität Berlin
|
|
|
|
|
*
|
|
|
|
|
* This file is subject to the terms and conditions of the GNU Lesser General
|
|
|
|
|
* Public License v2.1. See the file LICENSE in the top level directory for more
|
|
|
|
@ -25,58 +25,25 @@
|
|
|
|
|
#include "cpu.h"
|
|
|
|
|
#include "thread.h"
|
|
|
|
|
#include "sched.h"
|
|
|
|
|
#include "periph_conf.h"
|
|
|
|
|
#include "periph/uart.h"
|
|
|
|
|
#include "board.h"
|
|
|
|
|
|
|
|
|
|
/* guard file in case no UART device was specified */
|
|
|
|
|
#if UART_0_EN
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief Each UART device has to store two callbacks.
|
|
|
|
|
*/
|
|
|
|
|
typedef struct {
|
|
|
|
|
uart_rx_cb_t rx_cb;
|
|
|
|
|
uart_tx_cb_t tx_cb;
|
|
|
|
|
void *arg;
|
|
|
|
|
} uart_conf_t;
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief Data structure holding the callbacks and argument for each UART device
|
|
|
|
|
*/
|
|
|
|
|
static uart_conf_t uart_config;
|
|
|
|
|
static uart_isr_ctx_t uart_config;
|
|
|
|
|
|
|
|
|
|
/**
|
|
|
|
|
* @brief Allocate memory to store the callback functions.
|
|
|
|
|
*/
|
|
|
|
|
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t tx_cb, void *arg)
|
|
|
|
|
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
|
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
int res;
|
|
|
|
|
|
|
|
|
|
/* initialize UART in blocking mode fist */
|
|
|
|
|
res = uart_init_blocking(uart, baudrate);
|
|
|
|
|
if (res != 0) {
|
|
|
|
|
return res;
|
|
|
|
|
if (uart != 0) {
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* remember callback addresses and argument */
|
|
|
|
|
uart_config.rx_cb = rx_cb;
|
|
|
|
|
uart_config.tx_cb = tx_cb;
|
|
|
|
|
uart_config.arg = arg;
|
|
|
|
|
/* enable global and receiving interrupt */
|
|
|
|
|
NVIC_SetPriority(UART0_IRQn, UART_IRQ_PRIO);
|
|
|
|
|
NVIC_EnableIRQ(UART0_IRQn);
|
|
|
|
|
NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Msk;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int uart_init_blocking(uart_t uart, uint32_t baudrate)
|
|
|
|
|
{
|
|
|
|
|
/* the NRF only supports 1 UART device, so we don't need a switch statement here */
|
|
|
|
|
if (uart != UART_0) {
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* power on the UART device */
|
|
|
|
|
NRF_UART0->POWER = 1;
|
|
|
|
@ -150,7 +117,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
|
|
|
|
|
NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud921600;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return -1;
|
|
|
|
|
return -2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* enable the UART device */
|
|
|
|
@ -158,67 +125,36 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
|
|
|
|
|
/* enable TX and RX */
|
|
|
|
|
NRF_UART0->TASKS_STARTTX = 1;
|
|
|
|
|
NRF_UART0->TASKS_STARTRX = 1;
|
|
|
|
|
|
|
|
|
|
/* enable global and receiving interrupt */
|
|
|
|
|
NVIC_EnableIRQ(UART0_IRQn);
|
|
|
|
|
NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Msk;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void uart_tx_begin(uart_t uart)
|
|
|
|
|
void uart_write(uart_t uart, const uint8_t *data, size_t len)
|
|
|
|
|
{
|
|
|
|
|
if (uart == UART_0) {
|
|
|
|
|
if (uart_config.tx_cb(uart_config.arg) != 0) {
|
|
|
|
|
NRF_UART0->INTENSET = UART_INTENSET_TXDRDY_Msk;
|
|
|
|
|
if (uart == 0) {
|
|
|
|
|
for (size_t i = 0; i < len; i++) {
|
|
|
|
|
/* write data into transmit register */
|
|
|
|
|
NRF_UART0->TXD = data[i];
|
|
|
|
|
/* wait for any transmission to be done */
|
|
|
|
|
while (NRF_UART0->EVENTS_TXDRDY == 0);
|
|
|
|
|
/* reset ready flag */
|
|
|
|
|
NRF_UART0->EVENTS_TXDRDY = 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int uart_write(uart_t uart, char data)
|
|
|
|
|
{
|
|
|
|
|
if (uart == UART_0) {
|
|
|
|
|
NRF_UART0->TXD = (uint8_t)data;
|
|
|
|
|
NRF_UART0->EVENTS_TXDRDY = 0;
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int uart_read_blocking(uart_t uart, char *data)
|
|
|
|
|
{
|
|
|
|
|
if (uart == UART_0) {
|
|
|
|
|
/* wait for until data was received (RXDRDY == 1) */
|
|
|
|
|
while (NRF_UART0->EVENTS_RXDRDY != 1);
|
|
|
|
|
/* reset RXDRDY flag */
|
|
|
|
|
NRF_UART0->EVENTS_RXDRDY = 0;
|
|
|
|
|
/* read new byte from receive data register */
|
|
|
|
|
*data = (char)(NRF_UART0->RXD & 0xff);
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int uart_write_blocking(uart_t uart, char data)
|
|
|
|
|
{
|
|
|
|
|
if (uart == UART_0) {
|
|
|
|
|
/* write data into transmit register */
|
|
|
|
|
NRF_UART0->TXD = (uint8_t)data;
|
|
|
|
|
/* wait for any transmission to be done */
|
|
|
|
|
while (NRF_UART0->EVENTS_TXDRDY == 0);
|
|
|
|
|
/* reset ready flag */
|
|
|
|
|
NRF_UART0->EVENTS_TXDRDY = 0;
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void uart_poweron(uart_t uart)
|
|
|
|
|
{
|
|
|
|
|
if (uart == UART_0) {
|
|
|
|
|
if (uart == 0) {
|
|
|
|
|
NRF_UART0->POWER = 1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void uart_poweroff(uart_t uart)
|
|
|
|
|
{
|
|
|
|
|
if (uart == UART_0) {
|
|
|
|
|
if (uart == 0) {
|
|
|
|
|
NRF_UART0->POWER = 0;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
@ -230,15 +166,7 @@ void isr_uart0(void)
|
|
|
|
|
char byte = (char)(NRF_UART0->RXD & 0xff);
|
|
|
|
|
uart_config.rx_cb(uart_config.arg, byte);
|
|
|
|
|
}
|
|
|
|
|
if (NRF_UART0->EVENTS_TXDRDY == 1) {
|
|
|
|
|
NRF_UART0->EVENTS_TXDRDY = 0;
|
|
|
|
|
if (uart_config.tx_cb(uart_config.arg) == 0) {
|
|
|
|
|
NRF_UART0->INTENCLR = UART_INTENSET_TXDRDY_Msk;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
if (sched_context_switch_request) {
|
|
|
|
|
thread_yield();
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#endif /* UART_0_EN */
|
|
|
|
|