cpu: s/GPIO(x,y)/GPIO_PIN(x,y)/

cpu/atmega2560/include/periph_cpu.h

@@ -29,7 +29,7 @@ extern "C" {
 /**
  * @brief   Define a CPU specific GPIO pin generator macro
  */
-#define GPIO(x, y)          ((x << 4) | y)
+#define GPIO_PIN(x, y)          ((x << 4) | y)
 
 /**
  * @brief   Available ports on the ATmega2560 family

cpu/lpc2387/include/periph_cpu.h

@@ -54,7 +54,7 @@ typedef struct {
 int gpio_init_mux(unsigned pin, unsigned mux);
 void gpio_init_states(void);
 
-#define GPIO(port, pin) (port*32 + pin)
+#define GPIO_PIN(port, pin) (port*32 + pin)
 
 #define HAVE_GPIO_PP_T
 typedef enum {

cpu/msp430fxyz/include/periph_cpu.h

@@ -43,7 +43,7 @@ typedef uint16_t gpio_t;
  * @brief   Mandatory function for defining a GPIO pins
  * @{
  */
-#define GPIO(x, y)          ((gpio_t)(((x & 0xff) << 8) | (1 << (y & 0xff))))
+#define GPIO_PIN(x, y)      ((gpio_t)(((x & 0xff) << 8) | (1 << (y & 0xff))))
 
 /**
  * @brief   Override direction values

cpu/nrf51/include/periph_cpu.h

@@ -54,7 +54,7 @@ typedef enum {
  *
  * The port definition is used (and zeroed) to suppress compiler warnings
  */
-#define GPIO(x,y)           ((x & 0) | y)
+#define GPIO_PIN(x,y)       ((x & 0) | y)
 
 #ifdef __cplusplus
 }

cpu/samd21/include/periph_cpu.h

@@ -42,7 +42,7 @@ typedef uint32_t gpio_t;
  * @brief   Mandatory function for defining a GPIO pins
  * @{
  */
-#define GPIO(x, y)          (((gpio_t)(&PORT->Group[x])) | y)
+#define GPIO_PIN(x, y)      (((gpio_t)(&PORT->Group[x])) | y)
 
 /**
  * @brief   Available ports on the SAMD21

cpu/saml21/include/periph_cpu.h

@@ -43,7 +43,7 @@ typedef uint32_t gpio_t;
  * @brief   Mandatory function for defining a GPIO pins
  * @{
  */
-#define GPIO(x, y)          (((gpio_t)(&PORT->Group[x])) | y)
+#define GPIO_PIN(x, y)      (((gpio_t)(&PORT->Group[x])) | y)
 
 /**
  * @brief   Available ports on the SAML21 for convenient access

cpu/saml21/periph/spi.c

@@ -72,7 +72,7 @@ typedef struct spi_saml21 {
 static const spi_saml21_t spi[] = {
 #if SPI_0_EN
     /* SPI device */   /* MCLK flag */        /* GLCK id */         /* SCLK */  /* MISO */  /* MOSI */ /* dipo+dopo */
-    { &(SERCOM0->SPI), MCLK_APBCMASK_SERCOM0, SERCOM0_GCLK_ID_CORE, { GPIO(PA,7), 3 }, { GPIO(PA,4), 3 }, { GPIO(PA,6), 3 }, 0, 1 }
+    { &(SERCOM0->SPI), MCLK_APBCMASK_SERCOM0, SERCOM0_GCLK_ID_CORE, { GPIO_PIN(PA,7), 3 }, { GPIO_PIN(PA,4), 3 }, { GPIO_PIN(PA,6), 3 }, 0, 1 }
 #endif
 };
 

cpu/stm32f1/include/periph_cpu.h

@@ -42,7 +42,7 @@ typedef uint32_t gpio_t;
 /**
  * @brief   Define a CPU specific GPIO pin generator macro
  */
-#define GPIO(x, y)          ((GPIOA_BASE + (x << 10)) | y)
+#define GPIO_PIN(x, y)      ((GPIOA_BASE + (x << 10)) | y)
 
 /**
  * @brief   Override values for pull register configuration

cpu/stm32f3/include/periph_cpu.h

@@ -42,7 +42,7 @@ typedef uint32_t gpio_t;
 /**
  * @brief   Define a CPU specific GPIO pin generator macro
  */
-#define GPIO(x, y)          ((GPIOA_BASE + (x << 10)) | y)
+#define GPIO_PIN(x, y)      ((GPIOA_BASE + (x << 10)) | y)
 
 /**
  * @brief   Available ports on the STM32F3 family

cpu/stm32f4/include/periph_cpu.h

@@ -42,7 +42,7 @@ typedef uint32_t gpio_t;
 /**
  * @brief   Define a CPU specific GPIO pin generator macro
  */
-#define GPIO(x, y)          ((GPIOA_BASE + (x << 10)) | y)
+#define GPIO_PIN(x, y)      ((GPIOA_BASE + (x << 10)) | y)
 
 /**
  * @brief   Available ports on the STM32F4 family

cpu/stm32l1/include/periph_cpu.h

@@ -43,7 +43,7 @@ typedef uint32_t gpio_t;
 /**
  * @brief   Define a CPU specific GPIO pin generator macro
  */
-#define GPIO(x, y)          ((GPIOA_BASE + (x << 10)) | y)
+#define GPIO_PIN(x, y)      ((GPIOA_BASE + (x << 10)) | y)
 
 /**
  * @brief   Available ports on the STM32L1 family