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@ -22,6 +22,24 @@
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#include "periph_conf.h" |
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#include "periph/init.h" |
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#ifndef VDD |
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/**
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* @brief Set system voltage level in mV (determines flash wait states) |
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* |
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* @note Override this value in your boards periph_conf.h file |
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* if a different system voltage is used. |
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*/ |
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#define VDD (3300U) |
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#endif |
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/* determine the needed flash wait states based on the system voltage (Vdd)
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* see SAMD21 datasheet Rev A (2017) table 37-40 , page 816 */ |
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#if (VDD > 2700) |
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#define WAITSTATES ((CLOCK_CORECLOCK - 1) / 24000000) |
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#else |
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#define WAITSTATES ((CLOCK_CORECLOCK - 1) / 14000000) |
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#endif |
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/**
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* @brief Configure clock sources and the cpu frequency |
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*/ |
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@ -31,12 +49,10 @@ static void clk_init(void)
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PM->APBAMASK.reg = (PM_APBAMASK_PM | PM_APBAMASK_SYSCTRL | |
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PM_APBAMASK_GCLK); |
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/* adjust NVM wait states, see table 42.30 (p. 1070) in the datasheet */ |
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#if (CLOCK_CORECLOCK > 24000000) |
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/* adjust NVM wait states */ |
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PM->APBBMASK.reg |= PM_APBBMASK_NVMCTRL; |
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NVMCTRL->CTRLB.reg |= NVMCTRL_CTRLB_RWS(1); |
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NVMCTRL->CTRLB.reg |= NVMCTRL_CTRLB_RWS(WAITSTATES); |
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PM->APBBMASK.reg &= ~PM_APBBMASK_NVMCTRL; |
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#endif |
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/* configure internal 8MHz oscillator to run without prescaler */ |
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SYSCTRL->OSC8M.bit.PRESC = 0; |
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