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@ -39,6 +39,9 @@ extern "C" {
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#define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 /* AHB clock -> 72MHz */
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#define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1 /* APB2 clock -> 72MHz */
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#define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV2 /* APB1 clock -> 36MHz */
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/* resulting bus clocks */
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#define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
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#define CLOCK_APB2 (CLOCK_CORECLOCK)
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/* configuration of flash access cycles */
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#define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_2
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/** @} */
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@ -67,33 +70,32 @@ static const timer_conf_t timer_config[] = {
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/** @} */
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/**
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* @brief UART configuration
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* @brief UART configuration
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* @{
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*/
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#define UART_NUMOF (1U)
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#define UART_0_EN 1
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#define UART_1_EN 0
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#define UART_IRQ_PRIO 1
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/* UART 0 device configuration */
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#define UART_0_DEV USART2
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#define UART_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN)
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#define UART_0_IRQ USART2_IRQn
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART2,
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.rx_pin = GPIO_PIN(PORT_A, 3),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rcc_pin = RCC_APB1ENR_USART2EN,
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.bus = APB1,
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.irqn = USART2_IRQn
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},
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{
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.dev = USART1,
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.rx_pin = GPIO_PIN(PORT_A, 10),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.rcc_pin = RCC_APB2ENR_USART1EN,
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.bus = APB2,
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.irqn = USART1_IRQn
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}
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};
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#define UART_0_ISR isr_usart2
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#define UART_0_BUS_FREQ 36000000
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/* UART 0 pin configuration */
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#define UART_0_RX_PIN GPIO_PIN(PORT_A,3)
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#define UART_0_TX_PIN GPIO_PIN(PORT_A,2)
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/* UART 1 device configuration */
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#define UART_1_DEV USART1
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#define UART_1_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_USART1EN)
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#define UART_1_IRQ USART1_IRQn
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#define UART_1_ISR isr_usart1
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#define UART_1_BUS_FREQ 72000000
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/* UART 1 pin configuration */
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#define UART_1_RX_PIN GPIO_PIN(PORT_A,10)
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#define UART_1_TX_PIN GPIO_PIN(PORT_A,9)
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
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/** @} */
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/**
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