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Merge pull request #4104 from gebart/pr/drop-timer-reset

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periph/timer: Drop timer_reset
cc430
Peter Kietzmann 8 years ago
parent 9f6cd49559 cbaeccdb90
commit e539db10ee
20 changed files with 0 additions and 254 deletions
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23
cpu/atmega2560/periph/timer.c
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@ -414,29 +414,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER0_COUNTER = 0;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER1_COUNTER = 0;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER2_COUNTER = 0;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
static inline void _isr(int timer, int chan)
{
__enter_isr();

7
cpu/cc2538/periph/timer.c
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@ -380,13 +380,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
timer_set_absolute(dev, 0, 0);
timer_set_absolute(dev, 1, 0);
}
#if TIMER_0_EN
void TIMER_0_ISR_1(void)
{

5
cpu/cc430/periph/timer.c
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@ -119,11 +119,6 @@ void timer_irq_disable(tim_t dev)
/* TODO: not supported, yet */
}
void timer_reset(tim_t dev)
{
TIMER_BASE->R = 0;
}
ISR(TIMER_ISR_CC0, isr_timer_a_cc0)
{
__enter_isr();

21
cpu/kinetis_common/timer.c
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@ -311,27 +311,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
pit_timer_set_max(TIMER_0_COUNTER_CH);
break;
#endif
#if TIMER_1_EN
case TIMER_1:
pit_timer_set_max(TIMER_1_COUNTER_CH);
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
inline static void pit_timer_irq_handler(tim_t dev, uint8_t ch)
{
cu_timer[dev] += TIMER_BASE->CHANNEL[ch].LDVAL + 1;

8
cpu/lm4f120/periph/timer.c
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@ -133,14 +133,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
if (dev == TIMER_0) {
/* Performs a software reset of a peripheral */
ROM_SysCtlPeripheralReset(SYSCTL_PERIPH_WTIMER0);
}
}
#if TIMER_0_EN
void isr_timer0a(void)
{

9
cpu/lpc11u34/periph/timer.c
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@ -150,15 +150,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
if (dev == TIMER_0) {
TIMER_0_DEV->TCR |= (1 << 1);
asm("nop"); /* just wait a cycle */
TIMER_0_DEV->TCR &= ~(1 << 1);
}
}
void TIMER_0_ISR(void)
{
if (TIMER_0_DEV->IR & MR0_FLAG) {

9
cpu/lpc1768/periph/timer.c
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@ -152,15 +152,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
if (dev == TIMER_0) {
TIMER_0_DEV->TCR |= (1 << 1);
asm("nop"); /* just wait a cycle */
TIMER_0_DEV->TCR &= ~(1 << 1);
}
}
#if TIMER_0_EN
void TIMER_0_ISR(void)
{

8
cpu/lpc2387/periph/timer.c
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@ -174,14 +174,6 @@ void timer_stop(tim_t tim)
get_dev(tim)->TCR = 0;
}
void timer_reset(tim_t tim)
{
lpc23xx_timer_t *dev = get_dev(tim);
dev->TCR |= 2;
asm("nop");
dev->TCR &= ~(2);
}
void timer_irq_enable(tim_t tim)
{
/* TODO */

5
cpu/msp430fxyz/periph/timer.c
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@ -119,11 +119,6 @@ void timer_irq_disable(tim_t dev)
/* TODO: not supported, yet */
}
void timer_reset(tim_t dev)
{
TIMER_BASE->R = 0;
}
ISR(TIMER_ISR_CC0, isr_timer_a_cc0)
{
__enter_isr();

8
cpu/native/periph/timer.c
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@ -192,14 +192,6 @@ void timer_stop(tim_t dev)
DEBUG("%s\n", __func__);
}
void timer_reset(tim_t dev)
{
if (dev < TIMER_NUMOF) {
time_null = timer_read(dev);
}
}
unsigned int timer_read(tim_t dev)
{
if (dev >= TIMER_NUMOF) {

7
cpu/nrf51/periph/timer.c
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@ -267,13 +267,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
if (dev < TIMER_NUMOF) {
timer[dev]->TASKS_CLEAR = 1;
}
}
#if TIMER_0_EN
void TIMER_0_ISR(void)
{

27
cpu/sam3/periph/timer.c
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@ -371,33 +371,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->TC_CHANNEL[0].TC_CCR = TC_CCR_SWTRG;
TIMER_0_DEV->TC_CHANNEL[1].TC_CCR = TC_CCR_SWTRG;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TC_CHANNEL[0].TC_CCR = TC_CCR_SWTRG;
TIMER_1_DEV->TC_CHANNEL[1].TC_CCR = TC_CCR_SWTRG;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TC_CHANNEL[0].TC_CCR = TC_CCR_SWTRG;
TIMER_2_DEV->TC_CHANNEL[1].TC_CCR = TC_CCR_SWTRG;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
#if TIMER_0_EN
void TIMER_0_ISR1(void)
{

18
cpu/samd21/periph/timer.c
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@ -332,24 +332,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV.CTRLA.bit.SWRST = 1;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV.CTRLA.bit.SWRST = 1;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
#if TIMER_0_EN
void TIMER_0_ISR(void)
{

13
cpu/saml21/periph/timer.c
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@ -225,19 +225,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV.CTRLA.bit.SWRST = 1;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
#if TIMER_0_EN
void TIMER_0_ISR(void)
{

18
cpu/stm32f0/periph/timer.c
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@ -273,24 +273,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->CNT = 0;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->CNT = 0;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
#if TIMER_0_EN
void TIMER_0_ISR(void)
{

21
cpu/stm32f1/periph/timer.c
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@ -336,27 +336,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV_0->CNT = 0;
TIMER_0_DEV_1->CNT = 0;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV_0->CNT = 0;
TIMER_1_DEV_1->CNT = 0;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
#if TIMER_0_EN
void TIMER_0_ISR_0(void)
{

13
cpu/stm32f3/periph/timer.c
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@ -228,19 +228,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->CNT = 0;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
#if TIMER_0_EN
void TIMER_0_ISR(void)
{

18
cpu/stm32f4/periph/timer.c
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@ -275,24 +275,6 @@ void timer_irq_disable(tim_t dev)
}
}
void timer_reset(tim_t dev)
{
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->CNT = 0;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->CNT = 0;
break;
#endif
case TIMER_UNDEFINED:
break;
}
}
void TIMER_0_ISR(void)
{
irq_handler(TIMER_0, TIMER_0_DEV);

5
cpu/stm32l1/periph/timer.c
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@ -132,11 +132,6 @@ void timer_irq_disable(tim_t dev)
NVIC_DisableIRQ(timer_config[dev].irqn);
}
void timer_reset(tim_t dev)
{
_tim(dev)->CNT = 0;
}
static inline void irq_handler(tim_t num, TIM_TypeDef *tim)
{
for (int i = 0; i < CHANNEL_NUMOF; i++) {

11
drivers/include/periph/timer.h
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@ -169,17 +169,6 @@ void timer_irq_enable(tim_t dev);
*/
void timer_irq_disable(tim_t dev);
/**
* @brief Reset the up-counting value to zero for the given timer
*
* Note that this function effects all currently set channels and it can lead to
* non-deterministic timeouts if any channel is active when this function is
* called.
*
* @param[in] dev the timer to reset
*/
void timer_reset(tim_t dev);
#ifdef __cplusplus
}
#endif

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