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Merge pull request #6013 from haukepetersen/opt_periph_uartreturntypes

periph/uart: added names to return values
pr/spi.typo
Peter Kietzmann 6 years ago committed by GitHub
parent
commit
e547ff1d60
  1. 4
      cpu/atmega_common/periph/uart.c
  2. 11
      cpu/cc2538/periph/uart.c
  3. 4
      cpu/cc26x0/periph/uart.c
  4. 4
      cpu/ezr32wg/periph/uart.c
  5. 12
      cpu/kinetis_common/periph/uart.c
  6. 10
      cpu/lm4f120/periph/uart.c
  7. 10
      cpu/lpc11u34/periph/uart.c
  8. 12
      cpu/lpc1768/periph/uart.c
  9. 4
      cpu/lpc2387/periph/uart.c
  10. 11
      cpu/msp430fxyz/periph/uart.c
  11. 8
      cpu/native/periph/uart.c
  12. 6
      cpu/nrf5x_common/periph/uart.c
  13. 4
      cpu/sam3/periph/uart.c
  14. 8
      cpu/samd21/periph/uart.c
  15. 10
      cpu/saml21/periph/uart.c
  16. 8
      cpu/stm32f0/periph/uart.c
  17. 4
      cpu/stm32f1/periph/uart.c
  18. 6
      cpu/stm32f2/periph/uart.c
  19. 8
      cpu/stm32f3/periph/uart.c
  20. 4
      cpu/stm32f4/periph/uart.c
  21. 8
      cpu/stm32l1/periph/uart.c
  22. 19
      drivers/include/periph/uart.h
  23. 2
      drivers/xbee/xbee.c
  24. 2
      sys/net/gnrc/link_layer/slip/gnrc_slip.c
  25. 4
      tests/periph_uart/main.c

4
cpu/atmega_common/periph/uart.c

@ -114,7 +114,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* make sure the given device is valid */
if (uart >= UART_NUMOF) {
return -1;
return UART_NODEV;
}
/* register interrupt context */
@ -132,7 +132,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* enable RX and TX and the RX interrupt */
dev[uart]->CSRB = ((1 << RXCIE0) | (1 << RXEN0) | (1 << TXEN0));
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

11
cpu/cc2538/periph/uart.c

@ -160,8 +160,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* initialize basic functionality */
int res = init_base(uart, baudrate);
if (res != 0) {
if (res != UART_OK) {
return res;
}
@ -183,9 +182,11 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
NVIC_EnableIRQ(UART1_IRQn);
break;
#endif
default:
return UART_NODEV;
}
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -240,7 +241,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
default:
(void)u;
return -1;
return UART_NODEV;
}
#if UART_0_EN || UART_1_EN
@ -313,7 +314,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
/* UART Enable */
u->cc2538_uart_ctl.CTLbits.UARTEN = 1;
return 0;
return UART_OK;
#endif /* UART_0_EN || UART_1_EN */
}

4
cpu/cc26x0/periph/uart.c

@ -49,7 +49,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* make sure the uart device is valid */
if (uart != 0) {
return -1;
return UART_NODEV;
}
/* enable clocks: serial power domain and UART */
@ -89,7 +89,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* start the UART */
UART->CTL = ENABLE_MASK;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

4
cpu/ezr32wg/periph/uart.c

@ -48,7 +48,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* check if device is valid and get base register address */
if (dev >= UART_NUMOF) {
return -1;
return UART_NODEV;
}
uart = _uart(dev);
@ -77,7 +77,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
uart->IEN |= USART_IEN_RXDATAV;
/* enable receiver and transmitter */
uart->CMD = USART_CMD_TXEN | USART_CMD_RXEN;
return 0;
return UART_OK;
}
void uart_write(uart_t dev, const uint8_t *data, size_t len)

12
cpu/kinetis_common/periph/uart.c

@ -59,8 +59,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* do basic initialization */
int res = init_base(uart, baudrate);
if (res < 0) {
if (res != UART_OK) {
return res;
}
@ -88,11 +87,10 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
#endif
default:
return -2;
break;
return UART_NODEV;
}
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -134,7 +132,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
#endif
default:
return -1;
return UART_NODEV;
}
/* configure RX and TX pins, set pin to use alternative function mode */
@ -179,7 +177,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
/* enable transmitter and receiver */
dev->C2 |= UART_C2_TE_MASK | UART_C2_RE_MASK;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

10
cpu/lm4f120/periph/uart.c

@ -43,11 +43,11 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
assert(uart == 0);
/* Check to make sure the UART peripheral is present */
if(!ROM_SysCtlPeripheralPresent(SYSCTL_PERIPH_UART0)){
return -1;
return UART_NODEV;
}
int res = init_base(uart, baudrate);
if(res < 0){
if(res != UART_OK){
return res;
}
@ -76,7 +76,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
break;
#endif
}
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -99,8 +99,10 @@ static int init_base(uart_t uart, uint32_t baudrate)
ROM_UARTEnable(UART0_BASE);
break;
#endif
default:
return UART_NODEV;
}
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

10
cpu/lpc11u34/periph/uart.c

@ -35,7 +35,7 @@ static int init_base(uart_t uart, uint32_t baudrate);
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
int res = init_base(uart, baudrate);
if (res < 0) {
if (res != UART_OK) {
return res;
}
@ -55,7 +55,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
#endif
}
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -65,7 +65,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
case UART_0:
/* this implementation only supports 115200 baud */
if (baudrate != 115200) {
return -2;
return UART_NOBAUD;
}
/* select and configure the pin for RX */
@ -91,10 +91,10 @@ static int init_base(uart_t uart, uint32_t baudrate)
break;
#endif
default:
return -1;
return UART_NODEV;
}
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

12
cpu/lpc1768/periph/uart.c

@ -35,7 +35,7 @@ static int init_base(uart_t uart, uint32_t baudrate);
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
int res = init_base(uart, baudrate);
if (res < 0) {
if (res != UART_OK) {
return res;
}
@ -64,7 +64,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
#endif
}
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -74,7 +74,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
case UART_0:
/* this implementation only supports 115200 baud */
if (baudrate != 115200) {
return -2;
return UART_NOBAUD;
}
/* power on UART device and select peripheral clock */
@ -105,7 +105,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
case UART_1:
/* this implementation only supports 115200 baud */
if (baudrate != 115200) {
return -2;
return UART_NOBAUD;
}
/* power on UART device and select peripheral clock */
@ -133,10 +133,10 @@ static int init_base(uart_t uart, uint32_t baudrate)
break;
#endif
default:
return -1;
return UART_NODEV;
}
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

4
cpu/lpc2387/periph/uart.c

@ -39,7 +39,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
(void) baudrate;
/* for now, we only support one UART device and only the RX interrupt */
if (dev != 0) {
return -1;
return UART_NODEV;
}
/* save interrupt context */
@ -66,7 +66,7 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* install and enable the IRQ handler */
install_irq(UART0_INT, UART0_IRQHandler, 6);
U0IER |= BIT0; /* enable only RX irq */
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

11
cpu/msp430fxyz/periph/uart.c

@ -38,8 +38,9 @@ static int init_base(uart_t uart, uint32_t baudrate);
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
if (init_base(uart, baudrate) < 0) {
return -1;
int res = init_base(uart, baudrate);
if (res != UART_OK) {
return res;
}
/* save interrupt context */
@ -50,13 +51,13 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
UART_IF &= ~(UART_IE_RX_BIT);
UART_IF |= (UART_IE_TX_BIT);
UART_IE |= (UART_IE_RX_BIT);
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
{
if (uart != 0) {
return -1;
return UART_NODEV;
}
/* get the default UART for now -> TODO: enable for multiple devices */
@ -85,7 +86,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
uart_poweron(uart);
/* and finally release the software reset bit */
dev->CTL &= ~(USART_CTL_SWRST);
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

8
cpu/native/periph/uart.c

@ -98,7 +98,7 @@ static void io_signal_handler(int fd, void *arg)
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
if (uart >= UART_NUMOF) {
return -1;
return UART_NODEV;
}
struct termios termios;
@ -133,7 +133,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
case 115200: speed = B115200; break;
case 230400: speed = B230400 ; break;
default:
return -1;
return UART_NOBAUD;
break;
}
@ -143,7 +143,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
tty_fds[uart] = real_open(tty_device_filenames[uart], O_RDWR | O_NONBLOCK);
if (tty_fds[uart] < 0) {
return -3;
return UART_INTERR;
}
tcsetattr(tty_fds[uart], TCSANOW, &termios);
@ -154,7 +154,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
native_async_read_setup();
native_async_read_add_handler(tty_fds[uart], NULL, io_signal_handler);
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

6
cpu/nrf5x_common/periph/uart.c

@ -41,7 +41,7 @@ static uart_isr_ctx_t uart_config;
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
if (uart != 0) {
return -1;
return UART_NODEV;
}
/* remember callback addresses and argument */
@ -122,7 +122,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
NRF_UART0->BAUDRATE = UART_BAUDRATE_BAUDRATE_Baud921600;
break;
default:
return -2;
return UART_NOBAUD;
}
/* enable the UART device */
@ -133,7 +133,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* enable global and receiving interrupt */
NVIC_EnableIRQ(UART_IRQN);
NRF_UART0->INTENSET = UART_INTENSET_RXDRDY_Msk;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

4
cpu/sam3/periph/uart.c

@ -38,7 +38,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* make sure given device is valid */
if (uart >= UART_NUMOF) {
return -1;
return UART_NODEV;
}
/* get base register */
@ -71,7 +71,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
NVIC_EnableIRQ(uart_config[uart].irqn);
dev->UART_IER = UART_IER_RXRDY;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

8
cpu/samd21/periph/uart.c

@ -50,7 +50,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* initialize basic functionality */
int res = init_base(uart, baudrate);
if (res != 0) {
if (res != UART_OK) {
return res;
}
@ -60,7 +60,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* configure interrupts and enable RX interrupt */
_uart(uart)->INTENSET.reg = SERCOM_USART_INTENSET_RXC;
NVIC_EnableIRQ(SERCOM0_IRQn + _sercom_id(_uart(uart)));
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -69,7 +69,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
SercomUsart *dev;
if ((unsigned int)uart >= UART_NUMOF) {
return -1;
return UART_NODEV;
}
/* get the devices base register */
@ -101,7 +101,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
while (dev->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_CTRLB) {}
/* finally, enable the device */
dev->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

10
cpu/saml21/periph/uart.c

@ -39,8 +39,8 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* initialize basic functionality */
int res = init_base(uart, baudrate);
if (res != 0) {
return res;
if (res != UART_OK) {
return UART_NODEV;
}
/* register callbacks */
@ -55,7 +55,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
UART_0_DEV.INTENSET.bit.RXC = 1;
break;
}
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -113,11 +113,11 @@ static int init_base(uart_t uart, uint32_t baudrate)
#endif
default:
(void)baud_calculated;
return -1;
return UART_NODEV;
}
uart_poweron(uart);
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

8
cpu/stm32f0/periph/uart.c

@ -45,7 +45,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* initialize UART in blocking mode first */
res = init_base(uart, baudrate);
if (res < 0) {
if (res != UART_OK) {
return res;
}
@ -69,7 +69,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
uart_config[uart].rx_cb = rx_cb;
uart_config[uart].arg = arg;
return 0;
return UART_OK;
}
int init_base(uart_t uart, uint32_t baudrate)
@ -110,7 +110,7 @@ int init_base(uart_t uart, uint32_t baudrate)
break;
#endif
default:
return -1;
return UART_NODEV;
}
/* Make sure port and dev are != NULL here, i.e. that the variables are
@ -149,7 +149,7 @@ int init_base(uart_t uart, uint32_t baudrate)
/* enable receive and transmit mode */
dev->CR1 |= USART_CR1_UE | USART_CR1_TE | USART_CR1_RE;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

4
cpu/stm32f1/periph/uart.c

@ -58,7 +58,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* make sure the given device is valid */
if (uart >= UART_NUMOF) {
return -1;
return UART_NODEV;
}
/* save ISR context */
@ -89,7 +89,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
dev(uart)->CR1 = (USART_CR1_UE | USART_CR1_TE |
USART_CR1_RE | USART_CR1_RXNEIE);
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

6
cpu/stm32f2/periph/uart.c

@ -75,7 +75,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* check if given UART device does exist */
if (uart < 0 || uart >= UART_NUMOF) {
return -1;
return UART_NODEV;
}
/* check if baudrate is reachable and choose the right oversampling method*/
@ -88,7 +88,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
over8 = 1;
}
else {
return -2;
return UART_NOBAUD;
}
/* get UART base address */
@ -147,7 +147,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
NVIC_EnableIRQ(uart_config[uart].irqn);
dma_isr_enable(uart_config[uart].dma_stream);
dev->CR1 |= USART_CR1_RXNEIE;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

8
cpu/stm32f3/periph/uart.c

@ -34,7 +34,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* do basic initialization */
int res = init_base(uart, baudrate);
if (res < 0) {
if (res != UART_OK) {
return res;
}
@ -64,7 +64,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
#endif
}
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -116,7 +116,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
break;
#endif
default:
return -1;
return UART_NODEV;
}
/* Make sure port and dev are != NULL here, i.e. that the variables are
@ -157,7 +157,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
dev->CR2 = 0;
dev->CR1 |= USART_CR1_UE | USART_CR1_TE | USART_CR1_RE;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

4
cpu/stm32f4/periph/uart.c

@ -55,7 +55,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* check if given UART device does exist */
if ((unsigned int)uart >= UART_NUMOF) {
return -1;
return UART_NODEV;
}
/* get UART base address */
@ -104,7 +104,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
NVIC_EnableIRQ(uart_config[uart].irqn);
dma_isr_enable(uart_config[uart].dma_stream);
dev->CR1 |= USART_CR1_RXNEIE;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

8
cpu/stm32l1/periph/uart.c

@ -35,7 +35,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{
/* do basic initialization */
int res = init_base(uart, baudrate);
if (res < 0) {
if (res != UART_OK) {
return res;
}
@ -65,7 +65,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
#endif
}
return 0;
return UART_OK;
}
static int init_base(uart_t uart, uint32_t baudrate)
@ -110,7 +110,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
break;
#endif
default:
return -1;
return UART_NODEV;
}
/* Make sure dev is != NULL here, i.e. that the variable is assigned in
@ -134,7 +134,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
dev->CR2 = 0;
dev->CR1 |= USART_CR1_UE | USART_CR1_TE | USART_CR1_RE;
return 0;
return UART_OK;
}
void uart_write(uart_t uart, const uint8_t *data, size_t len)

19
drivers/include/periph/uart.h

@ -113,6 +113,17 @@ typedef struct {
#endif
/** @} */
/**
* @brief Possible UART return values
*/
enum {
UART_OK = 0, /**< everything in order */
UART_NODEV = -1, /**< invalid UART device given */
UART_NOBAUD = -2, /**< given baudrate is not applicable */
UART_INTERR = -3, /**< all other internal errors */
UART_NOMODE = -4 /**< given mode is not applicable */
};
/**
* @brief Initialize a given UART device
*
@ -128,10 +139,10 @@ typedef struct {
* for every byte that is received (RX buffer filled)
* @param[in] arg optional context passed to the callback functions
*
* @return 0 on success
* @return -1 on invalid UART device
* @return -2 on inapplicable baudrate
* @return -3 on other errors
* @return UART_OK on success
* @return UART_NODEV on invalid UART device
* @return UART_NOBAUD on inapplicable baudrate
* @return UART_INTERR on other errors
*/
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg);

2
drivers/xbee/xbee.c

@ -530,7 +530,7 @@ int xbee_init(xbee_t *dev, const xbee_params_t *params)
dev->resp_limit = 1; /* needs to be greater then 0 initially */
dev->rx_count = 0;
/* initialize UART and GPIO pins */
if (uart_init(params->uart, params->baudrate, _rx_cb, dev) < 0) {
if (uart_init(params->uart, params->baudrate, _rx_cb, dev) != UART_OK) {
DEBUG("xbee: Error initializing UART\n");
return -ENXIO;
}

2
sys/net/gnrc/link_layer/slip/gnrc_slip.c

@ -259,7 +259,7 @@ kernel_pid_t gnrc_slip_init(gnrc_slip_dev_t *dev, uart_t uart, uint32_t baudrate
/* initialize UART */
DEBUG("slip: initialize UART_%d with baudrate %" PRIu32 "\n", uart,
baudrate);
if (uart_init(uart, baudrate, _slip_rx_cb, dev) < 0) {
if (uart_init(uart, baudrate, _slip_rx_cb, dev) != UART_OK) {
DEBUG("slip: error initializing UART_%i with baudrate %" PRIu32 "\n",
uart, baudrate);
return -ENODEV;

4
tests/periph_uart/main.c

@ -125,11 +125,11 @@ static int cmd_init(int argc, char **argv)
/* initialize UART */
res = uart_init(UART_DEV(dev), baud, rx_cb, (void *)dev);
if (res == -1) {
if (res == UART_NOBAUD) {
printf("Error: Given baudrate (%u) not possible\n", (unsigned int)baud);
return 1;
}
else if (res < -1) {
else if (res != UART_OK) {
puts("Error: Unable to initialize UART device\n");
return 1;
}

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