Commit Graph

7 Commits (4bc77be2820169c1f0336ecd5f748ba74ac0a169)

Author SHA1 Message Date
Joakim Nohlgård 4a9cb807c6 k60: Remove (broken) support for first revision K60 hardware
The CPU has multiple issues and several parts of the platform code
does not even compile cleanly for this CPU in the current state.

This removes support for parts MK60DN256ZVLL10, MK60DN512ZVLL10
(note the Z) CPUs with this part number were used in Mulle v0.60 which
only has been used in some in-house projects at Eistec and LTU.
7 years ago
DipSwitch a322200582 cpu: remove superfluous SystemCoreClockUpdate 7 years ago
Hauke Petersen 4bfce892d3 drivers/periph&cpu: add and use common periph_init() 7 years ago
Kaspar Schleiser c3f7186d4e unify usage of inline assembly 8 years ago
Joakim Nohlgård 98c465008b all: Update @gebart family name, email 8 years ago
Hauke Petersen d4d34a782e cpu/k60: adapted to centralized cpu conf 8 years ago
Joakim Gebart de486ff79f k60: Initial commit of K60 CPU.
Tested on the following Freescale Kinetis K60 CPUs:

 - MK60DN512VLL10

The port should with a high probability also support the following variations of the above CPUs (untested):

 - MK60DN256VLL10

And possibly also:

 - MK60DX256VLL10
 - MK60DX512VLL10
 - MK60DN512VLQ10
 - MK60DN256VLQ10
 - MK60DX256VLQ10
 - MK60DN512VMC10
 - MK60DN256VMC10
 - MK60DX256VMC10
 - MK60DN512VMD10
 - MK60DX256VMD10
 - MK60DN256VMD10

Currently not working on the following CPUs (Missing PIT channel
chaining necessary for kinetis_common/periph/timer implementation):

 - MK60DN256ZVLL10
 - MK60DN512ZVLL10
 - MK60DX256ZVLL10
 - MK60DX512ZVLL10
 - MK60DN512ZVLQ10
 - MK60DN256ZVLQ10
 - MK60DX256ZVLQ10
 - MK60DN512ZVMC10
 - MK60DN256ZVMC10
 - MK60DX256ZVMC10
 - MK60DN512ZVMD10
 - MK60DX256ZVMD10
 - MK60DN256ZVMD10

Regarding header files from Freescale:

   dist/tools/licenses: Add Freescale CMSIS PAL license pattern

Redistribution is OK according to:

Archive copy in case the above link disappears:

Applies to:
 - MK60DZ10.h (K60 variant)
9 years ago