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180 lines
4.4 KiB
180 lines
4.4 KiB
/* |
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* Copyright (C) 2016 Freie Universität Berlin |
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* 2016 Inria |
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* |
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* This file is subject to the terms and conditions of the GNU Lesser |
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* General Public License v2.1. See the file LICENSE in the top level |
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* directory for more details. |
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*/ |
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/** |
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* @ingroup boards_nucleo-f070 |
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* @{ |
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* |
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* @file |
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* @brief Peripheral MCU configuration for the nucleo-f070 board |
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* |
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de> |
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* @author Alexandre Abadie <alexandre.abadie@inria.fr> |
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*/ |
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#ifndef PERIPH_CONF_H |
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#define PERIPH_CONF_H |
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#include "periph_cpu.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/** |
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* @name Clock system configuration |
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* @{ |
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*/ |
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#define CLOCK_HSE (8000000U) /* external oscillator */ |
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#define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */ |
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/* the actual PLL values are automatically generated */ |
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#define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE) |
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/* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */ |
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#define CLOCK_AHB (CLOCK_CORECLOCK / 1) |
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#define CLOCK_APB2 (CLOCK_CORECLOCK / 1) |
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#define CLOCK_APB1 (CLOCK_CORECLOCK / 1) |
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/** @} */ |
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/** |
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* @name Timer configuration |
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* @{ |
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*/ |
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static const timer_conf_t timer_config[] = { |
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{ |
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.dev = TIM1, |
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.max = 0x0000ffff, |
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.rcc_mask = RCC_APB2ENR_TIM1EN, |
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.bus = APB2, |
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.irqn = TIM1_CC_IRQn |
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} |
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}; |
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#define TIMER_0_ISR isr_tim1_cc |
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#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0])) |
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/** @} */ |
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/** |
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* @name UART configuration |
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* @{ |
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*/ |
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static const uart_conf_t uart_config[] = { |
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{ |
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.dev = USART2, |
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.rcc_mask = RCC_APB1ENR_USART2EN, |
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.rx_pin = GPIO_PIN(PORT_A, 3), |
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.tx_pin = GPIO_PIN(PORT_A, 2), |
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.rx_af = GPIO_AF1, |
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.tx_af = GPIO_AF1, |
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.bus = APB1, |
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.irqn = USART2_IRQn |
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}, |
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{ |
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.dev = USART1, |
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.rcc_mask = RCC_APB2ENR_USART1EN, |
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.rx_pin = GPIO_PIN(PORT_A, 10), |
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.tx_pin = GPIO_PIN(PORT_A, 9), |
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.rx_af = GPIO_AF1, |
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.tx_af = GPIO_AF1, |
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.bus = APB2, |
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.irqn = USART1_IRQn |
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}, |
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{ |
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.dev = USART3, |
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.rcc_mask = RCC_APB1ENR_USART3EN, |
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.rx_pin = GPIO_PIN(PORT_C, 11), |
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.tx_pin = GPIO_PIN(PORT_C, 10), |
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.rx_af = GPIO_AF1, |
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.tx_af = GPIO_AF1, |
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.bus = APB1, |
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.irqn = USART3_4_IRQn |
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} |
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}; |
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#define UART_0_ISR (isr_usart2) |
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#define UART_1_ISR (isr_usart1) |
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#define UART_2_ISR (isr_usart3_8) |
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0])) |
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/** @} */ |
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/** |
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* @name PWM configuration |
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* @{ |
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*/ |
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static const pwm_conf_t pwm_config[] = { |
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{ |
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.dev = TIM3, |
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.rcc_mask = RCC_APB1ENR_TIM3EN, |
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.chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 }, |
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{ .pin = GPIO_PIN(PORT_B, 5) /* D4 */, .cc_chan = 1 }, |
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{ .pin = GPIO_UNDEF, .cc_chan = 0 }, |
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{ .pin = GPIO_UNDEF, .cc_chan = 0 } }, |
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.af = GPIO_AF1, |
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.bus = APB1 |
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}, |
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{ |
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.dev = TIM15, |
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.rcc_mask = RCC_APB2ENR_TIM15EN, |
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.chan = { { .pin = GPIO_PIN(PORT_B, 14), .cc_chan = 0 }, |
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{ .pin = GPIO_PIN(PORT_B, 15), .cc_chan = 1 }, |
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{ .pin = GPIO_UNDEF, .cc_chan = 0 }, |
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{ .pin = GPIO_UNDEF, .cc_chan = 0 } }, |
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.af = GPIO_AF1, |
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.bus = APB2 |
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} |
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}; |
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#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0])) |
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/** @} */ |
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/** |
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* @name ADC configuration |
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* @{ |
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*/ |
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#define ADC_CONFIG { \ |
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{ GPIO_PIN(PORT_A, 0), 0 },\ |
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{ GPIO_PIN(PORT_A, 1), 1 },\ |
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{ GPIO_PIN(PORT_A, 4), 4 },\ |
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{ GPIO_PIN(PORT_B, 0), 8 },\ |
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{ GPIO_PIN(PORT_C, 1), 11 },\ |
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{ GPIO_PIN(PORT_C, 0), 10 } \ |
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} |
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#define ADC_NUMOF (6) |
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/** @} */ |
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/** |
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* @name DAC configuration |
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* @{ |
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*/ |
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#define DAC_NUMOF (0) |
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/** @} */ |
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/** |
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* @name RTC configuration |
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* @{ |
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*/ |
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/** |
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* Nucleos with MB1136 C-02 or MB1136 C-03 -sticker on it have the required LSE |
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* oscillator provided on the X2 slot. |
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* See Nucleo User Manual UM1724 section 5.6.2. |
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*/ |
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#define RTC_NUMOF (1U) |
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/** @} */ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* PERIPH_CONF_H */ |
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/** @} */
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