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569 lines
22 KiB
569 lines
22 KiB
(pcb /home/marc/git/startracker/kicad/startracker.dsn |
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(parser |
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(string_quote ") |
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(space_in_quoted_tokens on) |
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(host_cad "KiCad's Pcbnew") |
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(host_version "4.0.5+dfsg1-4") |
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) |
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(resolution um 10) |
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(unit um) |
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(structure |
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(layer F.Cu |
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(type signal) |
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(property |
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(index 0) |
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) |
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) |
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(layer B.Cu |
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(type signal) |
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(property |
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(index 1) |
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) |
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) |
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(boundary |
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(rect pcb 116445 -80932.5 206312 -149760) |
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) |
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(via "Via[0-1]_600:400_um") |
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(rule |
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(width 400) |
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(clearance 400.1) |
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(clearance 400.1 (type default_smd)) |
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(clearance 100 (type smd_smd)) |
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) |
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) |
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(placement |
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(component Modules:Arduino_Nano_WithMountingHoles |
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(place A1 166637 -107175 front 0 (PN Arduino_Nano_v3.x)) |
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) |
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(component "Modules:Pololu_Breakout-16_15.2x20.3mm" |
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(place A2 136881 -119596 front 0 (PN Pololu_Breakout_DRV8825)) |
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) |
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(component Capacitors_ThroughHole:C_Radial_D8_L11.5_P3.5 |
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(place C1 191470 -91109.8 front 0 (PN C)) |
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) |
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(component "Connectors_JST:JST_PH_B3B-PH-K_03x2.00mm_Straight" |
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(place J1 193866 -100445 front 270 (PN CONN_01X03_VIN)) |
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) |
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(component Pin_Headers:Pin_Header_Straight_2x03 |
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(place J2 140792 -103607 front 0 (PN CONN_02X03)) |
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) |
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(component Pin_Headers:Pin_Header_Straight_1x04 |
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(place J3 121679 -124219 front 0 (PN CONN_01X04)) |
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(place J4 201079 -98983.8 front 0 (PN CONN_01X04)) |
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) |
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(component Pin_Headers:Pin_Header_Straight_2x04 |
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(place LCD1 198793 -124930 front 180 (PN CONN_02X04)) |
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) |
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(component Resistors_ThroughHole:Resistor_Horizontal_RM7mm |
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(place R2 170548 -89585.8 front 0 (PN R)) |
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(place R3 170548 -98056.7 front 0 (PN R)) |
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(place R4 170409 -93891.1 front 0 (PN R)) |
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) |
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(component "sparkfun:SF-ROTARY-ENCODER" |
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(place SW1 144998 -89232.5 front 0 (PN Rotary_Encoder_Switch)) |
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) |
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) |
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(library |
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(image Modules:Arduino_Nano_WithMountingHoles |
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(outline (path signal 120 1270 -1270 1270 1270)) |
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(outline (path signal 120 1270 1270 -1400 1270)) |
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(outline (path signal 120 -1400 -1270 -1400 -39500)) |
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(outline (path signal 120 13970 1270 16640 1270)) |
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(outline (path signal 120 13970 1270 13970 -36830)) |
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(outline (path signal 120 13970 -36830 16640 -36830)) |
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(outline (path signal 120 1270 -1270 -1400 -1270)) |
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(outline (path signal 120 1270 -1270 1270 -36830)) |
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(outline (path signal 120 1270 -36830 -1400 -36830)) |
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(outline (path signal 100 3810 -31750 11430 -31750)) |
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(outline (path signal 100 11430 -31750 11430 -41910)) |
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(outline (path signal 100 11430 -41910 3810 -41910)) |
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(outline (path signal 100 3810 -41910 3810 -31750)) |
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(outline (path signal 120 -1400 -39500 16640 -39500)) |
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(outline (path signal 120 16640 -39500 16640 3940)) |
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(outline (path signal 120 16640 3940 -1400 3940)) |
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(outline (path signal 100 16510 -39370 -1270 -39370)) |
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(outline (path signal 100 -1270 -39370 -1270 2540)) |
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(outline (path signal 100 -1270 2540 0 3810)) |
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(outline (path signal 100 0 3810 16510 3810)) |
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(outline (path signal 100 16510 3810 16510 -39370)) |
|
(outline (path signal 50 -1530 4060 16750 4060)) |
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(outline (path signal 50 -1530 4060 -1530 -42160)) |
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(outline (path signal 50 16750 -42160 16750 4060)) |
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(outline (path signal 50 16750 -42160 -1530 -42160)) |
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(pin Rect[A]Pad_1600x1600_um 1 0 0) |
|
(pin Oval[A]Pad_1600x1600_um 17 15240 -33020) |
|
(pin Oval[A]Pad_1600x1600_um 2 0 -2540) |
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(pin Oval[A]Pad_1600x1600_um 18 15240 -30480) |
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(pin Oval[A]Pad_1600x1600_um 3 0 -5080) |
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(pin Oval[A]Pad_1600x1600_um 19 15240 -27940) |
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(pin Oval[A]Pad_1600x1600_um 4 0 -7620) |
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(pin Oval[A]Pad_1600x1600_um 20 15240 -25400) |
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(pin Oval[A]Pad_1600x1600_um 5 0 -10160) |
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(pin Oval[A]Pad_1600x1600_um 21 15240 -22860) |
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(pin Oval[A]Pad_1600x1600_um 6 0 -12700) |
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(pin Oval[A]Pad_1600x1600_um 22 15240 -20320) |
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(pin Oval[A]Pad_1600x1600_um 7 0 -15240) |
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(pin Oval[A]Pad_1600x1600_um 23 15240 -17780) |
|
(pin Oval[A]Pad_1600x1600_um 8 0 -17780) |
|
(pin Oval[A]Pad_1600x1600_um 24 15240 -15240) |
|
(pin Oval[A]Pad_1600x1600_um 9 0 -20320) |
|
(pin Oval[A]Pad_1600x1600_um 25 15240 -12700) |
|
(pin Oval[A]Pad_1600x1600_um 10 0 -22860) |
|
(pin Oval[A]Pad_1600x1600_um 26 15240 -10160) |
|
(pin Oval[A]Pad_1600x1600_um 11 0 -25400) |
|
(pin Oval[A]Pad_1600x1600_um 27 15240 -7620) |
|
(pin Oval[A]Pad_1600x1600_um 12 0 -27940) |
|
(pin Oval[A]Pad_1600x1600_um 28 15240 -5080) |
|
(pin Oval[A]Pad_1600x1600_um 13 0 -30480) |
|
(pin Oval[A]Pad_1600x1600_um 29 15240 -2540) |
|
(pin Oval[A]Pad_1600x1600_um 14 0 -33020) |
|
(pin Oval[A]Pad_1600x1600_um 30 15240 0) |
|
(pin Oval[A]Pad_1600x1600_um 15 0 -35560) |
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(pin Oval[A]Pad_1600x1600_um 16 15240 -35560) |
|
(keepout "" (circle F.Cu 1780 0 2540)) |
|
(keepout "" (circle B.Cu 1780 0 2540)) |
|
(keepout "" (circle F.Cu 1780 15240 2540)) |
|
(keepout "" (circle B.Cu 1780 15240 2540)) |
|
(keepout "" (circle F.Cu 1780 15240 -38100)) |
|
(keepout "" (circle B.Cu 1780 15240 -38100)) |
|
(keepout "" (circle F.Cu 1780 0 -38100)) |
|
(keepout "" (circle B.Cu 1780 0 -38100)) |
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) |
|
(image "Modules:Pololu_Breakout-16_15.2x20.3mm" |
|
(outline (path signal 120 11430 1400 11430 -19180)) |
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(outline (path signal 120 1270 -1270 1270 -19180)) |
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(outline (path signal 120 0 1400 -1400 1400)) |
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(outline (path signal 120 -1400 1400 -1400 0)) |
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(outline (path signal 120 1270 1400 1270 -1270)) |
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(outline (path signal 120 1270 -1270 -1400 -1270)) |
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(outline (path signal 120 -1400 -1270 -1400 -19180)) |
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(outline (path signal 120 -1400 -19180 14100 -19180)) |
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(outline (path signal 120 14100 -19180 14100 1400)) |
|
(outline (path signal 120 14100 1400 1270 1400)) |
|
(outline (path signal 100 -1270 0 0 1270)) |
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(outline (path signal 100 0 1270 13970 1270)) |
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(outline (path signal 100 13970 1270 13970 -19050)) |
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(outline (path signal 100 13970 -19050 -1270 -19050)) |
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(outline (path signal 100 -1270 -19050 -1270 0)) |
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(outline (path signal 50 -1530 1520 14210 1520)) |
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(outline (path signal 50 -1530 1520 -1530 -19300)) |
|
(outline (path signal 50 14210 -19300 14210 1520)) |
|
(outline (path signal 50 14210 -19300 -1530 -19300)) |
|
(pin Rect[A]Pad_1600x1600_um 1 0 0) |
|
(pin Oval[A]Pad_1600x1600_um 9 12700 -17780) |
|
(pin Oval[A]Pad_1600x1600_um 2 0 -2540) |
|
(pin Oval[A]Pad_1600x1600_um 10 12700 -15240) |
|
(pin Oval[A]Pad_1600x1600_um 3 0 -5080) |
|
(pin Oval[A]Pad_1600x1600_um 11 12700 -12700) |
|
(pin Oval[A]Pad_1600x1600_um 4 0 -7620) |
|
(pin Oval[A]Pad_1600x1600_um 12 12700 -10160) |
|
(pin Oval[A]Pad_1600x1600_um 5 0 -10160) |
|
(pin Oval[A]Pad_1600x1600_um 13 12700 -7620) |
|
(pin Oval[A]Pad_1600x1600_um 6 0 -12700) |
|
(pin Oval[A]Pad_1600x1600_um 14 12700 -5080) |
|
(pin Oval[A]Pad_1600x1600_um 7 0 -15240) |
|
(pin Oval[A]Pad_1600x1600_um 15 12700 -2540) |
|
(pin Oval[A]Pad_1600x1600_um 8 0 -17780) |
|
(pin Oval[A]Pad_1600x1600_um 16 12700 0) |
|
) |
|
(image Capacitors_ThroughHole:C_Radial_D8_L11.5_P3.5 |
|
(outline (path signal 150 1825 3999 1825 -3999)) |
|
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(outline (path signal 150 4345 -535 4345 -3044)) |
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(outline (path signal 150 5745 200 5745 -200)) |
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(outline (path signal 150 4500 0 4451.06 -309.017 4309.02 -587.785 4087.78 -809.017 |
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|
2690.98 -587.785 2548.94 -309.017 2500 0 2548.94 309.017 |
|
2690.98 587.785 2912.22 809.017 3190.98 951.057 3500 1000 |
|
3809.02 951.057 4087.78 809.017 4309.02 587.785 4451.06 309.017)) |
|
(outline (path signal 150 5787.5 0 5589.89 -1247.66 5016.41 -2373.18 4123.18 -3266.41 |
|
2997.66 -3839.89 1750 -4037.5 502.344 -3839.89 -623.183 -3266.41 |
|
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-1516.41 2373.18 -623.183 3266.41 502.344 3839.89 1750 4037.5 |
|
2997.66 3839.89 4123.18 3266.41 5016.41 2373.18 5589.89 1247.66)) |
|
(outline (path signal 50 6050 0 5839.54 -1328.77 5228.77 -2527.48 4277.48 -3478.77 |
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|
3078.77 4089.54 4277.48 3478.77 5228.77 2527.48 5839.54 1328.77)) |
|
(pin Round[A]Pad_1300_um 2 3500 0) |
|
(pin Rect[A]Pad_1300x1300_um 1 0 0) |
|
) |
|
(image "Connectors_JST:JST_PH_B3B-PH-K_03x2.00mm_Straight" |
|
(outline (path signal 120 -2050 1800 -2050 -2900)) |
|
(outline (path signal 120 -2050 -2900 6050 -2900)) |
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(outline (path signal 120 6050 -2900 6050 1800)) |
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(outline (path signal 120 6050 1800 -2050 1800)) |
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(outline (path signal 120 500 1800 500 1200)) |
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(outline (path signal 120 -1450 1200 -1450 -2300)) |
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(outline (path signal 120 -1450 -2300 5450 -2300)) |
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(outline (path signal 120 5450 -2300 5450 1200)) |
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(outline (path signal 120 5450 1200 3500 1200)) |
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(outline (path signal 120 3500 1200 3500 1800)) |
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(outline (path signal 120 -2050 500 -1450 500)) |
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(outline (path signal 120 -2050 -800 -1450 -800)) |
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(outline (path signal 120 6050 500 5450 500)) |
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(outline (path signal 120 6050 -800 5450 -800)) |
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(outline (path signal 120 -300 1800 -300 2000)) |
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(outline (path signal 120 -300 2000 -600 2000)) |
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(outline (path signal 120 -600 2000 -600 1800)) |
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(outline (path signal 120 -300 1900 -600 1900)) |
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(outline (path signal 120 900 -2300 900 -1800)) |
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(outline (path signal 120 900 -1800 1100 -1800)) |
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(outline (path signal 120 1100 -1800 1100 -2300)) |
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(outline (path signal 120 1000 -2300 1000 -1800)) |
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(outline (path signal 120 2900 -2300 2900 -1800)) |
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(outline (path signal 120 2900 -1800 3100 -1800)) |
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(outline (path signal 120 3100 -1800 3100 -2300)) |
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(outline (path signal 120 3000 -2300 3000 -1800)) |
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(outline (path signal 120 -1100 2100 -2350 2100)) |
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(outline (path signal 120 -2350 2100 -2350 850)) |
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(outline (path signal 100 -1100 2100 -2350 2100)) |
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(outline (path signal 100 -2350 2100 -2350 850)) |
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(outline (path signal 100 -1950 1700 -1950 -2800)) |
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(outline (path signal 50 -2450 -3300 6450 -3300)) |
|
(outline (path signal 50 6450 -3300 6450 2200)) |
|
(outline (path signal 50 6450 2200 -2450 2200)) |
|
(pin Rect[A]Pad_1200x1700_um 1 0 0) |
|
(pin Oval[A]Pad_1200x1700_um 2 2000 0) |
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(pin Oval[A]Pad_1200x1700_um 3 4000 0) |
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) |
|
(image Pin_Headers:Pin_Header_Straight_2x03 |
|
(outline (path signal 150 -1270 -1270 -1270 -6350)) |
|
(outline (path signal 150 -1550 1550 0 1550)) |
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(outline (path signal 50 4300 1750 4300 -6850)) |
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(outline (path signal 50 -1750 1750 4300 1750)) |
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(outline (path signal 50 -1750 -6850 4300 -6850)) |
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(outline (path signal 150 1270 1270 1270 -1270)) |
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(outline (path signal 150 1270 -1270 -1270 -1270)) |
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(outline (path signal 150 -1270 -6350 3810 -6350)) |
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(outline (path signal 150 3810 -6350 3810 -1270)) |
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(outline (path signal 150 -1550 1550 -1550 0)) |
|
(outline (path signal 150 3810 1270 1270 1270)) |
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(outline (path signal 150 3810 -1270 3810 1270)) |
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(pin Rect[A]Pad_1727.2x1727.2_um 1 0 0) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 2 2540 0) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 3 0 -2540) |
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(pin Oval[A]Pad_1727.2x1727.2_um 4 2540 -2540) |
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(pin Oval[A]Pad_1727.2x1727.2_um 5 0 -5080) |
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(pin Oval[A]Pad_1727.2x1727.2_um 6 2540 -5080) |
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) |
|
(image Pin_Headers:Pin_Header_Straight_1x04 |
|
(outline (path signal 50 -1750 1750 -1750 -9400)) |
|
(outline (path signal 50 1750 1750 1750 -9400)) |
|
(outline (path signal 50 -1750 1750 1750 1750)) |
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(outline (path signal 50 -1750 -9400 1750 -9400)) |
|
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(outline (path signal 150 1270 -1270 1270 -8890)) |
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(outline (path signal 150 1270 -1270 -1270 -1270)) |
|
(outline (path signal 150 -1550 0 -1550 1550)) |
|
(outline (path signal 150 -1550 1550 1550 1550)) |
|
(pin Rect[A]Pad_2032x1727.2_um 1 0 0) |
|
(pin Oval[A]Pad_2032x1727.2_um 2 0 -2540) |
|
(pin Oval[A]Pad_2032x1727.2_um 3 0 -5080) |
|
(pin Oval[A]Pad_2032x1727.2_um 4 0 -7620) |
|
) |
|
(image Pin_Headers:Pin_Header_Straight_2x04 |
|
(outline (path signal 50 -1750 1750 -1750 -9400)) |
|
(outline (path signal 50 4300 1750 4300 -9400)) |
|
(outline (path signal 50 -1750 1750 4300 1750)) |
|
(outline (path signal 50 -1750 -9400 4300 -9400)) |
|
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|
(outline (path signal 150 3810 -8890 3810 1270)) |
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(outline (path signal 150 3810 1270 1270 1270)) |
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(outline (path signal 150 0 1550 -1550 1550)) |
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(outline (path signal 150 1270 1270 1270 -1270)) |
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(outline (path signal 150 1270 -1270 -1270 -1270)) |
|
(outline (path signal 150 -1550 1550 -1550 0)) |
|
(pin Rect[A]Pad_1727.2x1727.2_um 1 0 0) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 2 2540 0) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 3 0 -2540) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 4 2540 -2540) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 5 0 -5080) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 6 2540 -5080) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 7 0 -7620) |
|
(pin Oval[A]Pad_1727.2x1727.2_um 8 2540 -7620) |
|
) |
|
(image Resistors_ThroughHole:Resistor_Horizontal_RM7mm |
|
(outline (path signal 50 -1250 1500 8850 1500)) |
|
(outline (path signal 50 -1250 -1500 -1250 1500)) |
|
(outline (path signal 50 8850 1500 8850 -1500)) |
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(outline (path signal 50 -1250 -1500 8850 -1500)) |
|
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|
(outline (path signal 150 6350 1270 6350 -1270)) |
|
(outline (path signal 150 6350 -1270 1270 -1270)) |
|
(outline (path signal 150 1270 -1270 1270 1270)) |
|
(pin Round[A]Pad_1998.98_um 1 0 0) |
|
(pin Round[A]Pad_1998.98_um 2 7620 0) |
|
) |
|
(image "sparkfun:SF-ROTARY-ENCODER" |
|
(outline (path signal 203.2 3000 1500 -3000 1500)) |
|
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|
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|
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|
1081.56 3328.7 2057.25 2831.56 2831.56 2057.25 3328.7 1081.56)) |
|
(outline (path signal 203.2 6000 -6500 -6000 -6500)) |
|
(outline (path signal 203.2 -6000 -6500 -6000 6500)) |
|
(outline (path signal 203.2 -6000 6500 6000 6500)) |
|
(outline (path signal 203.2 6000 6500 6000 -6500)) |
|
(pin Round[A]Pad_1800_um 1 -2500 7000) |
|
(pin Round[A]Pad_1800_um 2 -2500 -7500) |
|
(pin Round[A]Pad_1800_um 3 0 -7500) |
|
(pin Round[A]Pad_1800_um 4 2500 -7500) |
|
(pin Round[A]Pad_1800_um 5 2500 7000) |
|
(pin Round[A]Pad_3000_um @1 5600 0) |
|
(pin Round[A]Pad_3000_um @2 -5600 0) |
|
) |
|
(padstack Round[A]Pad_1300_um |
|
(shape (circle F.Cu 1300)) |
|
(shape (circle B.Cu 1300)) |
|
(attach off) |
|
) |
|
(padstack Round[A]Pad_1800_um |
|
(shape (circle F.Cu 1800)) |
|
(shape (circle B.Cu 1800)) |
|
(attach off) |
|
) |
|
(padstack Round[A]Pad_1998.98_um |
|
(shape (circle F.Cu 1998.98)) |
|
(shape (circle B.Cu 1998.98)) |
|
(attach off) |
|
) |
|
(padstack Round[A]Pad_3000_um |
|
(shape (circle F.Cu 3000)) |
|
(shape (circle B.Cu 3000)) |
|
(attach off) |
|
) |
|
(padstack Oval[A]Pad_1200x1700_um |
|
(shape (path F.Cu 1200 0 -250 0 250)) |
|
(shape (path B.Cu 1200 0 -250 0 250)) |
|
(attach off) |
|
) |
|
(padstack Oval[A]Pad_1600x1600_um |
|
(shape (path F.Cu 1600 0 0 0 0)) |
|
(shape (path B.Cu 1600 0 0 0 0)) |
|
(attach off) |
|
) |
|
(padstack Oval[A]Pad_2032x1727.2_um |
|
(shape (path F.Cu 1727.2 -152.4 0 152.4 0)) |
|
(shape (path B.Cu 1727.2 -152.4 0 152.4 0)) |
|
(attach off) |
|
) |
|
(padstack Oval[A]Pad_1727.2x1727.2_um |
|
(shape (path F.Cu 1727.2 0 0 0 0)) |
|
(shape (path B.Cu 1727.2 0 0 0 0)) |
|
(attach off) |
|
) |
|
(padstack Rect[A]Pad_2032x1727.2_um |
|
(shape (rect F.Cu -1016 -863.6 1016 863.6)) |
|
(shape (rect B.Cu -1016 -863.6 1016 863.6)) |
|
(attach off) |
|
) |
|
(padstack Rect[A]Pad_1200x1700_um |
|
(shape (rect F.Cu -600 -850 600 850)) |
|
(shape (rect B.Cu -600 -850 600 850)) |
|
(attach off) |
|
) |
|
(padstack Rect[A]Pad_1300x1300_um |
|
(shape (rect F.Cu -650 -650 650 650)) |
|
(shape (rect B.Cu -650 -650 650 650)) |
|
(attach off) |
|
) |
|
(padstack Rect[A]Pad_1600x1600_um |
|
(shape (rect F.Cu -800 -800 800 800)) |
|
(shape (rect B.Cu -800 -800 800 800)) |
|
(attach off) |
|
) |
|
(padstack Rect[A]Pad_1727.2x1727.2_um |
|
(shape (rect F.Cu -863.6 -863.6 863.6 863.6)) |
|
(shape (rect B.Cu -863.6 -863.6 863.6 863.6)) |
|
(attach off) |
|
) |
|
(padstack "Via[0-1]_600:400_um" |
|
(shape (circle F.Cu 600)) |
|
(shape (circle B.Cu 600)) |
|
(attach off) |
|
) |
|
) |
|
(network |
|
(net "Net-(A1-Pad1)" |
|
(pins A1-1) |
|
) |
|
(net "Net-(A1-Pad17)" |
|
(pins A1-17) |
|
) |
|
(net "Net-(A1-Pad2)" |
|
(pins A1-2) |
|
) |
|
(net "Net-(A1-Pad18)" |
|
(pins A1-18) |
|
) |
|
(net "Net-(A1-Pad3)" |
|
(pins A1-3) |
|
) |
|
(net GND |
|
(pins A1-4 A1-29 A2-1 A2-7 C1-1 J1-3 J2-2 J2-4 J2-6 J4-4 LCD1-1 SW1-2) |
|
) |
|
(net "Net-(A1-Pad5)" |
|
(pins A1-5 A2-16) |
|
) |
|
(net "Net-(A1-Pad6)" |
|
(pins A1-6 A2-15) |
|
) |
|
(net /BTN1 |
|
(pins A1-10 J2-5 R2-2) |
|
) |
|
(net ROT_BUT |
|
(pins A1-12 SW1-4) |
|
) |
|
(net ROT_C |
|
(pins A1-19 SW1-3) |
|
) |
|
(net +5V |
|
(pins A1-27 A2-13 A2-14 J4-3 LCD1-3 R2-1 R3-2 R4-1) |
|
) |
|
(net ROT_A |
|
(pins A1-20 SW1-1) |
|
) |
|
(net "Net-(A1-Pad28)" |
|
(pins A1-28) |
|
) |
|
(net +12V |
|
(pins A2-8 C1-2 J1-1 J4-1) |
|
) |
|
(net "Net-(A2-Pad2)" |
|
(pins A2-2) |
|
) |
|
(net "Net-(A2-Pad3)" |
|
(pins A2-3 J3-2) |
|
) |
|
(net "Net-(A2-Pad4)" |
|
(pins A2-4 J3-1) |
|
) |
|
(net "Net-(A2-Pad5)" |
|
(pins A2-5 J3-3) |
|
) |
|
(net "Net-(A2-Pad6)" |
|
(pins A2-6 J3-4) |
|
) |
|
(net "Net-(R4-Pad2)" |
|
(pins R4-2 SW1-5) |
|
) |
|
(net +6V |
|
(pins A1-30 J1-2 J4-2) |
|
) |
|
(net M0 |
|
(pins A1-9 A2-10) |
|
) |
|
(net M1 |
|
(pins A1-8 A2-11) |
|
) |
|
(net M2 |
|
(pins A1-7 A2-12) |
|
) |
|
(net "Net-(A1-Pad11)" |
|
(pins A1-11 J2-3 R3-1) |
|
) |
|
(net ENABLE |
|
(pins A1-16 A2-9) |
|
) |
|
(net "Net-(A1-Pad13)" |
|
(pins A1-13) |
|
) |
|
(net "Net-(A1-Pad14)" |
|
(pins A1-14) |
|
) |
|
(net "Net-(A1-Pad15)" |
|
(pins A1-15) |
|
) |
|
(net "Net-(J2-Pad1)" |
|
(pins J2-1) |
|
) |
|
(net ENLCD |
|
(pins A1-21 LCD1-7) |
|
) |
|
(net RSLCD |
|
(pins A1-22 LCD1-5) |
|
) |
|
(net D7 |
|
(pins A1-23 LCD1-2) |
|
) |
|
(net D6 |
|
(pins A1-24 LCD1-4) |
|
) |
|
(net D5 |
|
(pins A1-25 LCD1-6) |
|
) |
|
(net D4 |
|
(pins A1-26 LCD1-8) |
|
) |
|
(class kicad_default "" +12V +5V +6V /BTN1 /D4 /D5 /D6 /D7 /EN /RS D4 |
|
D5 D6 D7 ENABLE ENLCD GND M0 M1 M2 "Net-(A1-Pad1)" "Net-(A1-Pad11)" |
|
"Net-(A1-Pad12)" "Net-(A1-Pad13)" "Net-(A1-Pad14)" "Net-(A1-Pad15)" |
|
"Net-(A1-Pad17)" "Net-(A1-Pad18)" "Net-(A1-Pad19)" "Net-(A1-Pad2)" "Net-(A1-Pad20)" |
|
"Net-(A1-Pad23)" "Net-(A1-Pad28)" "Net-(A1-Pad3)" "Net-(A1-Pad5)" "Net-(A1-Pad6)" |
|
"Net-(A2-Pad2)" "Net-(A2-Pad3)" "Net-(A2-Pad4)" "Net-(A2-Pad5)" "Net-(A2-Pad6)" |
|
"Net-(J2-Pad1)" "Net-(R4-Pad2)" ROT_A ROT_BUT ROT_C RSLCD |
|
(circuit |
|
(use_via Via[0-1]_600:400_um) |
|
) |
|
(rule |
|
(width 400) |
|
(clearance 400.1) |
|
) |
|
) |
|
) |
|
(wiring |
|
) |
|
)
|
|
|