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Disable stm32f030 CI test.

trying.tmp
Nathan Conrad 3 years ago
parent
commit
258134c875
  1. 1
      CHANGELOG.md
  2. 2
      tools/check.py

1
CHANGELOG.md

@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Added "bypass" parameter to Rcc HSE configuration (breaking change)
- Add "usbsrc" function to Rcc configuration, used for selecting USB clock source
- For STM32F030, require use more specific feature flag, e.g. "stm32f030xc"
### Fixed
- RCC: Correct code to enable PLL.

2
tools/check.py

@ -30,7 +30,7 @@ def main():
features = [""] + ["{} rt".format(x)
for x in crate_info["features"].keys()
if x != "device-selected" and x != "rt"]
if x != "device-selected" and x != "rt" and x != "stm32f030"]
if 'size_check' in sys.argv:
cargo_cmd = ['cargo', 'build', '--release']

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