diff --git a/CHANGELOG.md b/CHANGELOG.md
index fd2ff7c..7bd6398 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -7,6 +7,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+### Fixed
+- RCC: Correct code to enable PLL.
+
 ## [v0.15.2] - 2019-11-04
 
 ### Changed
diff --git a/src/rcc.rs b/src/rcc.rs
index 082926a..57c8114 100644
--- a/src/rcc.rs
+++ b/src/rcc.rs
@@ -87,9 +87,9 @@ mod inner {
 
         // Set PLL source and multiplier
         rcc.cfgr
-            .modify(|_, w| unsafe { w.pllsrc().bit(pllsrc_bit).pllmul().bits(pllmul_bits) });
+            .modify(|_, w| w.pllsrc().bit(pllsrc_bit).pllmul().bits(pllmul_bits));
 
-        rcc.cr.write(|w| w.pllon().set_bit());
+        rcc.cr.modify(|_, w| w.pllon().set_bit());
         while rcc.cr.read().pllrdy().bit_is_clear() {}
 
         rcc.cfgr
@@ -176,7 +176,7 @@ mod inner {
         rcc.cfgr
             .modify(|_, w| w.pllsrc().bits(pllsrc_bit).pllmul().bits(pllmul_bits));
 
-        rcc.cr.write(|w| w.pllon().set_bit());
+        rcc.cr.modify(|_, w| w.pllon().set_bit());
         while rcc.cr.read().pllrdy().bit_is_clear() {}
 
         rcc.cfgr