Implement single pin trait based AF for SPI
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f1f2b32a5e
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527f182154
95
src/spi.rs
95
src/spi.rs
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@ -4,6 +4,7 @@ use nb;
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pub use embedded_hal::spi::{Mode, Phase, Polarity};
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use crate::stm32;
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#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
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use crate::stm32::{RCC, SPI1};
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@ -25,45 +26,65 @@ pub enum Error {
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}
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/// SPI abstraction
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pub struct Spi<SPI, PINS> {
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pub struct Spi<SPI, SCKPIN, MISOPIN, MOSIPIN> {
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spi: SPI,
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pins: PINS,
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pins: (SCKPIN, MISOPIN, MOSIPIN),
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}
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pub trait Pins<Spi> {}
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pub trait SckPin<SPI> {}
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pub trait MisoPin<SPI> {}
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pub trait MosiPin<SPI> {}
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macro_rules! spi_pins {
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($($SPI:ident => {
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sck => [$($sck:ty),+ $(,)*],
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miso => [$($miso:ty),+ $(,)*],
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mosi => [$($mosi:ty),+ $(,)*],
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})+) => {
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$(
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$(
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impl SckPin<stm32::$SPI> for $sck {}
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)+
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$(
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impl MisoPin<stm32::$SPI> for $miso {}
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)+
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$(
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impl MosiPin<stm32::$SPI> for $mosi {}
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)+
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)+
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}
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
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impl Pins<SPI1>
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for (
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gpioa::PA5<Alternate<AF0>>,
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gpioa::PA6<Alternate<AF0>>,
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gpioa::PA7<Alternate<AF0>>,
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)
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{}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
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impl Pins<SPI1>
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for (
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gpiob::PB3<Alternate<AF0>>,
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gpiob::PB4<Alternate<AF0>>,
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gpiob::PB5<Alternate<AF0>>,
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)
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{}
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spi_pins! {
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SPI1 => {
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sck => [gpioa::PA5<Alternate<AF0>>, gpiob::PB3<Alternate<AF0>>],
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miso => [gpioa::PA6<Alternate<AF0>>, gpiob::PB4<Alternate<AF0>>],
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mosi => [gpioa::PA7<Alternate<AF0>>, gpiob::PB5<Alternate<AF0>>],
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}
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}
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#[cfg(feature = "stm32f030x6")]
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impl Pins<SPI1>
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for (
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gpiob::PB13<Alternate<AF0>>,
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gpiob::PB14<Alternate<AF0>>,
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gpiob::PB15<Alternate<AF0>>,
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)
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{
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spi_pins! {
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SPI1 => {
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sck => [gpiob::PB13<Alternate<AF0>>],
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miso => [gpiob::PB14<Alternate<AF0>>],
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mosi => [gpiob::PB15<Alternate<AF0>>],
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}
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
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impl<PINS> Spi<SPI1, PINS> {
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pub fn spi1<F>(spi: SPI1, pins: PINS, mode: Mode, speed: F, clocks: Clocks) -> Self
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impl<SCKPIN, MISOPIN, MOSIPIN> Spi<SPI1, SCKPIN, MISOPIN, MOSIPIN> {
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pub fn spi1<F>(
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spi: SPI1,
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pins: (SCKPIN, MISOPIN, MOSIPIN),
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mode: Mode,
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speed: F,
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clocks: Clocks,
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) -> Self
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where
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PINS: Pins<SPI1>,
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SCKPIN: SckPin<SPI1>,
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MISOPIN: MisoPin<SPI1>,
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MOSIPIN: MosiPin<SPI1>,
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F: Into<Hertz>,
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{
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// NOTE(unsafe) This executes only during initialisation
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@ -133,13 +154,15 @@ impl<PINS> Spi<SPI1, PINS> {
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Spi { spi, pins }
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}
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pub fn release(self) -> (SPI1, PINS) {
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pub fn release(self) -> (SPI1, (SCKPIN, MISOPIN, MOSIPIN)) {
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(self.spi, self.pins)
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}
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
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impl<PINS> ::embedded_hal::spi::FullDuplex<u8> for Spi<SPI1, PINS> {
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impl<SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::spi::FullDuplex<u8>
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for Spi<SPI1, SCKPIN, MISOPIN, MOSIPIN>
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{
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type Error = Error;
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fn read(&mut self) -> nb::Result<u8, Error> {
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@ -180,6 +203,12 @@ impl<PINS> ::embedded_hal::spi::FullDuplex<u8> for Spi<SPI1, PINS> {
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
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impl<PINS> ::embedded_hal::blocking::spi::transfer::Default<u8> for Spi<SPI1, PINS> {}
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impl<SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::transfer::Default<u8>
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for Spi<SPI1, SCKPIN, MISOPIN, MOSIPIN>
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{
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
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impl<PINS> ::embedded_hal::blocking::spi::write::Default<u8> for Spi<SPI1, PINS> {}
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impl<SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::write::Default<u8>
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for Spi<SPI1, SCKPIN, MISOPIN, MOSIPIN>
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{
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}
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