Daniel Egger
4 years ago
committed by
GitHub
6 changed files with 298 additions and 3 deletions
@ -0,0 +1,40 @@
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#![no_main] |
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#![no_std] |
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use panic_halt; |
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use stm32f0xx_hal as hal; |
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use crate::hal::prelude::*; |
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use crate::hal::stm32; |
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use crate::hal::time::*; |
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use crate::hal::timers::*; |
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use cortex_m_rt::entry; |
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use nb::block; |
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#[entry] |
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fn main() -> ! { |
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if let Some(p) = stm32::Peripherals::take() { |
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let gpioa = p.GPIOA.split(); |
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/* (Re-)configure PA1 as output */ |
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let mut led = gpioa.pa1.into_push_pull_output(); |
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/* Constrain clocking registers */ |
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let rcc = p.RCC.constrain(); |
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/* Configure clock to 8 MHz (i.e. the default) and freeze it */ |
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let clocks = rcc.cfgr.sysclk(8.mhz()).freeze(); |
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let mut timer = Timer::tim1(p.TIM1, Hertz(1), clocks); |
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loop { |
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led.toggle(); |
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block!(timer.wait()).ok(); |
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} |
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} |
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loop { |
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continue; |
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} |
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} |
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@ -0,0 +1,238 @@
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//! API for the integrated timers
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//!
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//! This only implements basic functions, a lot of things are missing
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//!
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//! # Example
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//! Blink the led with 1Hz
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//! ``` no_run
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//! use stm32f0xx_hal as hal;
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//!
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//! use crate::hal::stm32;
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//! use crate::hal::prelude::*;
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//! use crate::hal::time::*;
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//! use crate::hal::timers::*;
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//! use nb::block;
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//!
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//! let mut p = stm32::Peripherals::take().unwrap();
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//!
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//! let mut led = gpioa.pa1.into_push_pull_pull_output();
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//! let rcc = p.RCC.constrain().cfgr.freeze();
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//! let mut timer = Timer::tim1(p.TIM1, Hertz(1), clocks);
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//! loop {
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//! led.toggle();
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//! block!(timer.wait()).ok();
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//! }
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//! ```
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#[cfg(feature = "stm32f030")] |
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use crate::stm32::{RCC, TIM1, TIM14, TIM15, TIM16, TIM17, TIM3, TIM6, TIM7}; |
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#[cfg(feature = "stm32f042")] |
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use crate::stm32::{RCC, TIM1, TIM14, TIM16, TIM17, TIM2, TIM3}; |
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use cortex_m::peripheral::syst::SystClkSource; |
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use cortex_m::peripheral::SYST; |
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use crate::rcc::Clocks; |
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use cast::{u16, u32}; |
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use embedded_hal::timer::{CountDown, Periodic}; |
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use nb; |
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use void::Void; |
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use crate::time::Hertz; |
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/// Hardware timers
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pub struct Timer<TIM> { |
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clocks: Clocks, |
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tim: TIM, |
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} |
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/// Interrupt events
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pub enum Event { |
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/// Timer timed out / count down ended
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TimeOut, |
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} |
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impl Timer<SYST> { |
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/// Configures the SYST clock as a periodic count down timer
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pub fn syst<T>(mut syst: SYST, timeout: T, clocks: Clocks) -> Self |
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where |
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T: Into<Hertz>, |
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{ |
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syst.set_clock_source(SystClkSource::Core); |
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let mut timer = Timer { tim: syst, clocks }; |
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timer.start(timeout); |
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timer |
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} |
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/// Starts listening for an `event`
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pub fn listen(&mut self, event: Event) { |
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match event { |
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Event::TimeOut => self.tim.enable_interrupt(), |
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} |
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} |
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/// Stops listening for an `event`
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pub fn unlisten(&mut self, event: Event) { |
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match event { |
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Event::TimeOut => self.tim.disable_interrupt(), |
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} |
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} |
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} |
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impl CountDown for Timer<SYST> { |
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type Time = Hertz; |
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/// Start the timer with a `timeout`
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fn start<T>(&mut self, timeout: T) |
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where |
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T: Into<Hertz>, |
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{ |
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let rvr = self.clocks.sysclk().0 / timeout.into().0 - 1; |
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assert!(rvr < (1 << 24)); |
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self.tim.set_reload(rvr); |
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self.tim.clear_current(); |
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self.tim.enable_counter(); |
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} |
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/// Return `Ok` if the timer has wrapped
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/// Automatically clears the flag and restarts the time
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fn wait(&mut self) -> nb::Result<(), Void> { |
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if self.tim.has_wrapped() { |
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Ok(()) |
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} else { |
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Err(nb::Error::WouldBlock) |
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} |
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} |
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} |
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impl Periodic for Timer<SYST> {} |
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macro_rules! timers { |
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($($TIM:ident: ($tim:ident, $timXen:ident, $timXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => { |
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$( |
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impl Timer<$TIM> { |
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// XXX(why not name this `new`?) bummer: constructors need to have different names
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// even if the `$TIM` are non overlapping (compare to the `free` function below
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// which just works)
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/// Configures a TIM peripheral as a periodic count down timer
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pub fn $tim<T>(tim: $TIM, timeout: T, clocks: Clocks) -> Self |
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where |
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T: Into<Hertz>, |
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{ |
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// NOTE(unsafe) This executes only during initialisation
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let rcc = unsafe { &(*RCC::ptr()) }; |
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// enable and reset peripheral to a clean slate state
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rcc.$apbenr.modify(|_, w| w.$timXen().set_bit()); |
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rcc.$apbrstr.modify(|_, w| w.$timXrst().set_bit()); |
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rcc.$apbrstr.modify(|_, w| w.$timXrst().clear_bit()); |
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let mut timer = Timer { |
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clocks, |
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tim, |
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}; |
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timer.start(timeout); |
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timer |
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} |
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/// Starts listening for an `event`
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pub fn listen(&mut self, event: Event) { |
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match event { |
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Event::TimeOut => { |
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// Enable update event interrupt
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self.tim.dier.write(|w| w.uie().set_bit()); |
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} |
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} |
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} |
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/// Stops listening for an `event`
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pub fn unlisten(&mut self, event: Event) { |
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match event { |
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Event::TimeOut => { |
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// Enable update event interrupt
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self.tim.dier.write(|w| w.uie().clear_bit()); |
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} |
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} |
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} |
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/// Releases the TIM peripheral
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pub fn release(self) -> $TIM { |
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use crate::stm32::RCC; |
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let rcc = unsafe { &(*RCC::ptr()) }; |
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// Pause counter
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self.tim.cr1.modify(|_, w| w.cen().clear_bit()); |
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// Disable timer
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rcc.$apbenr.modify(|_, w| w.$timXen().clear_bit()); |
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self.tim |
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} |
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} |
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impl CountDown for Timer<$TIM> { |
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type Time = Hertz; |
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/// Start the timer with a `timeout`
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fn start<T>(&mut self, timeout: T) |
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where |
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T: Into<Hertz>, |
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{ |
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// pause
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self.tim.cr1.modify(|_, w| w.cen().clear_bit()); |
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// restart counter
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self.tim.cnt.reset(); |
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let frequency = timeout.into().0; |
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let ticks = self.clocks.pclk().0 / frequency; |
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let psc = u16((ticks - 1) / (1 << 16)).unwrap(); |
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self.tim.psc.write(|w| unsafe { w.psc().bits(psc) }); |
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let arr = u16(ticks / u32(psc + 1)).unwrap(); |
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self.tim.arr.write(|w| unsafe { w.bits(u32(arr)) }); |
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// start counter
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self.tim.cr1.modify(|_, w| w.cen().set_bit()); |
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} |
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/// Return `Ok` if the timer has wrapped
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/// Automatically clears the flag and restarts the time
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fn wait(&mut self) -> nb::Result<(), Void> { |
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if self.tim.sr.read().uif().bit_is_clear() { |
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Err(nb::Error::WouldBlock) |
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} else { |
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self.tim.sr.modify(|_, w| w.uif().clear_bit()); |
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Ok(()) |
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} |
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} |
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} |
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impl Periodic for Timer<$TIM> {} |
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)+ |
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} |
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} |
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#[cfg(any(feature = "stm32f030", feature = "stm32f042",))] |
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timers! { |
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TIM1: (tim1, tim1en, tim1rst, apb2enr, apb2rstr), |
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TIM3: (tim3, tim3en, tim3rst, apb1enr, apb1rstr), |
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TIM14: (tim14, tim14en, tim14rst, apb1enr, apb1rstr), |
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TIM16: (tim16, tim16en, tim16rst, apb2enr, apb2rstr), |
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TIM17: (tim17, tim17en, tim17rst, apb2enr, apb2rstr), |
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} |
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#[cfg(any(feature = "stm32f030x8", feature = "stm32f030xc"))] |
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timers! { |
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TIM6: (tim6, tim6en, tim6rst, apb1enr, apb1rstr), |
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TIM15: (tim15, tim15en, tim15rst, apb2enr, apb2rstr), |
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} |
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#[cfg(feature = "stm32f030xc")] |
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timers! { |
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TIM7: (tim7, tim7en, tim7rst, apb1enr, apb1rstr), |
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} |
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#[cfg(feature = "stm32f042")] |
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timers! { |
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TIM2: (tim2, tim2en, tim2rst, apb1enr, apb1rstr), |
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} |
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