diff --git a/src/i2c.rs b/src/i2c.rs
index 8a47dd3..dd8fa20 100644
--- a/src/i2c.rs
+++ b/src/i2c.rs
@@ -1,13 +1,18 @@
+#[cfg(feature = "stm32f042")]
 use crate::stm32::{I2C1, RCC};
 
 use embedded_hal::blocking::i2c::{Write, WriteRead};
 
-use core::cmp;
+#[cfg(feature = "stm32f042")]
 use crate::gpio::gpioa::{PA10, PA11, PA12, PA9};
+#[cfg(feature = "stm32f042")]
 use crate::gpio::gpiob::{PB10, PB11, PB13, PB14, PB6, PB7, PB8, PB9};
+#[cfg(feature = "stm32f042")]
 use crate::gpio::gpiof::{PF0, PF1};
+#[cfg(feature = "stm32f042")]
 use crate::gpio::{Alternate, AF1, AF4, AF5};
 use crate::time::{KiloHertz, U32Ext};
+use core::cmp;
 
 /// I2C abstraction
 pub struct I2c<I2C, PINS> {
@@ -17,12 +22,19 @@ pub struct I2c<I2C, PINS> {
 
 pub trait Pins<I2c> {}
 
+#[cfg(feature = "stm32f042")]
 impl Pins<I2C1> for (PA9<Alternate<AF4>>, PA10<Alternate<AF4>>) {}
+#[cfg(feature = "stm32f042")]
 impl Pins<I2C1> for (PA11<Alternate<AF5>>, PA12<Alternate<AF5>>) {}
+#[cfg(feature = "stm32f042")]
 impl Pins<I2C1> for (PB6<Alternate<AF1>>, PB7<Alternate<AF1>>) {}
+#[cfg(feature = "stm32f042")]
 impl Pins<I2C1> for (PB8<Alternate<AF1>>, PB9<Alternate<AF1>>) {}
+#[cfg(feature = "stm32f042")]
 impl Pins<I2C1> for (PB10<Alternate<AF1>>, PB11<Alternate<AF1>>) {}
+#[cfg(feature = "stm32f042")]
 impl Pins<I2C1> for (PB13<Alternate<AF5>>, PB14<Alternate<AF5>>) {}
+#[cfg(feature = "stm32f042")]
 impl Pins<I2C1> for (PF1<Alternate<AF1>>, PF0<Alternate<AF1>>) {}
 
 #[derive(Debug)]
@@ -31,6 +43,7 @@ pub enum Error {
     NACK,
 }
 
+#[cfg(feature = "stm32f042")]
 impl<PINS> I2c<I2C1, PINS> {
     pub fn i2c1(i2c: I2C1, pins: PINS, speed: KiloHertz) -> Self
     where
@@ -123,6 +136,7 @@ impl<PINS> I2c<I2C1, PINS> {
     }
 }
 
+#[cfg(feature = "stm32f042")]
 impl<PINS> WriteRead for I2c<I2C1, PINS> {
     type Error = Error;
 
@@ -200,6 +214,7 @@ impl<PINS> WriteRead for I2c<I2C1, PINS> {
     }
 }
 
+#[cfg(feature = "stm32f042")]
 impl<PINS> Write for I2c<I2C1, PINS> {
     type Error = Error;
 
diff --git a/src/rcc.rs b/src/rcc.rs
index 695fffd..00300b7 100644
--- a/src/rcc.rs
+++ b/src/rcc.rs
@@ -1,7 +1,8 @@
 use core::cmp;
 
-use cast::u32;
+#[cfg(feature = "stm32f042")]
 use crate::stm32::{FLASH, RCC};
+use cast::u32;
 
 use crate::time::Hertz;
 
@@ -11,6 +12,7 @@ pub trait RccExt {
     fn constrain(self) -> Rcc;
 }
 
+#[cfg(feature = "stm32f042")]
 impl RccExt for RCC {
     fn constrain(self) -> Rcc {
         Rcc {
@@ -36,6 +38,7 @@ pub struct CFGR {
     sysclk: Option<u32>,
 }
 
+#[cfg(feature = "stm32f042")]
 impl CFGR {
     pub fn hclk<F>(mut self, freq: F) -> Self
     where
diff --git a/src/serial.rs b/src/serial.rs
index 9ce94e5..2a5b672 100644
--- a/src/serial.rs
+++ b/src/serial.rs
@@ -6,11 +6,10 @@ use embedded_hal::prelude::*;
 use nb::block;
 use void::Void;
 
+#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
 use crate::stm32::{RCC, USART1, USART2};
 
-use crate::gpio::gpioa::{PA10, PA14, PA15, PA2, PA3, PA9};
-use crate::gpio::gpiob::{PB6, PB7};
-use crate::gpio::{Alternate, AF0, AF1};
+use crate::gpio::*;
 use crate::rcc::Clocks;
 use crate::time::Bps;
 
@@ -40,41 +39,41 @@ pub enum Error {
 pub trait Pins<USART> {}
 
 #[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
-impl Pins<USART1> for (PA9<Alternate<AF1>>, PA10<Alternate<AF1>>) {}
+impl Pins<USART1> for (gpioa::PA9<Alternate<AF1>>, gpioa::PA10<Alternate<AF1>>) {}
 #[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
-impl Pins<USART1> for (PB6<Alternate<AF0>>, PB7<Alternate<AF0>>) {}
+impl Pins<USART1> for (gpiob::PB6<Alternate<AF0>>, gpiob::PB7<Alternate<AF0>>) {}
 #[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
-impl Pins<USART1> for (PA9<Alternate<AF1>>, PB7<Alternate<AF0>>) {}
+impl Pins<USART1> for (gpioa::PA9<Alternate<AF1>>, gpiob::PB7<Alternate<AF0>>) {}
 #[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
-impl Pins<USART1> for (PB6<Alternate<AF0>>, PA10<Alternate<AF1>>) {}
+impl Pins<USART1> for (gpiob::PB6<Alternate<AF0>>, gpioa::PA10<Alternate<AF1>>) {}
 
 #[cfg(feature = "stm32f030x6")]
-impl Pins<USART1> for (PA2<Alternate<AF1>>, PA3<Alternate<AF1>>) {}
+impl Pins<USART1> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
 
 #[cfg(any(
     feature = "stm32f042",
     feature = "stm32f030x8",
     feature = "stm32f030xc",
 ))]
-impl Pins<USART2> for (PA2<Alternate<AF1>>, PA3<Alternate<AF1>>) {}
+impl Pins<USART2> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
 #[cfg(any(
     feature = "stm32f042",
     feature = "stm32f030x8",
     feature = "stm32f030xc",
 ))]
-impl Pins<USART2> for (PA2<Alternate<AF1>>, PA15<Alternate<AF1>>) {}
+impl Pins<USART2> for (gpioa::PA2<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>) {}
 #[cfg(any(
     feature = "stm32f042",
     feature = "stm32f030x8",
     feature = "stm32f030xc",
 ))]
-impl Pins<USART2> for (PA14<Alternate<AF1>>, PA15<Alternate<AF1>>) {}
+impl Pins<USART2> for (gpioa::PA14<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>) {}
 #[cfg(any(
     feature = "stm32f042",
     feature = "stm32f030x8",
     feature = "stm32f030xc",
 ))]
-impl Pins<USART2> for (PA14<Alternate<AF1>>, PA3<Alternate<AF1>>) {}
+impl Pins<USART2> for (gpioa::PA14<Alternate<AF1>>, gpioa::PA3<Alternate<AF1>>) {}
 
 /// Serial abstraction
 pub struct Serial<USART, PINS> {
@@ -93,6 +92,7 @@ pub struct Tx<USART> {
 }
 
 /// USART1
+#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
 impl<PINS> Serial<USART1, PINS> {
     pub fn usart1(usart: USART1, pins: PINS, baud_rate: Bps, clocks: Clocks) -> Self
     where
@@ -133,6 +133,7 @@ impl<PINS> Serial<USART1, PINS> {
     }
 }
 
+#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
 impl embedded_hal::serial::Read<u8> for Rx<USART1> {
     type Error = Error;
 
@@ -157,6 +158,7 @@ impl embedded_hal::serial::Read<u8> for Rx<USART1> {
     }
 }
 
+#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
 impl embedded_hal::serial::Write<u8> for Tx<USART1> {
     type Error = Void;
 
@@ -187,6 +189,11 @@ impl embedded_hal::serial::Write<u8> for Tx<USART1> {
 }
 
 /// USART2
+#[cfg(any(
+    feature = "stm32f042",
+    feature = "stm32f030x8",
+    feature = "stm32f030x8"
+))]
 impl<PINS> Serial<USART2, PINS> {
     pub fn usart2(usart: USART2, pins: PINS, baud_rate: Bps, clocks: Clocks) -> Self
     where
@@ -227,6 +234,11 @@ impl<PINS> Serial<USART2, PINS> {
     }
 }
 
+#[cfg(any(
+    feature = "stm32f042",
+    feature = "stm32f030x8",
+    feature = "stm32f030x8"
+))]
 impl embedded_hal::serial::Read<u8> for Rx<USART2> {
     type Error = Error;
 
@@ -251,6 +263,11 @@ impl embedded_hal::serial::Read<u8> for Rx<USART2> {
     }
 }
 
+#[cfg(any(
+    feature = "stm32f042",
+    feature = "stm32f030x8",
+    feature = "stm32f030x8"
+))]
 impl embedded_hal::serial::Write<u8> for Tx<USART2> {
     type Error = Void;
 
diff --git a/src/spi.rs b/src/spi.rs
index 0703f47..be4d3c7 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -4,11 +4,10 @@ use nb;
 
 pub use embedded_hal::spi::{Mode, Phase, Polarity};
 
+#[cfg(feature = "stm32f042")]
 use crate::stm32::{RCC, SPI1};
 
-use crate::gpio::gpioa::{PA5, PA6, PA7};
-use crate::gpio::gpiob::{PB3, PB4, PB5};
-use crate::gpio::{Alternate, AF0};
+use crate::gpio::*;
 use crate::rcc::Clocks;
 use crate::time::Hertz;
 
@@ -33,21 +32,26 @@ pub struct Spi<SPI, PINS> {
 
 pub trait Pins<Spi> {}
 
+#[cfg(feature = "stm32f042")]
 impl Pins<SPI1>
     for (
-        PA5<Alternate<AF0>>,
-        PA6<Alternate<AF0>>,
-        PA7<Alternate<AF0>>,
+        gpioa::PA5<Alternate<AF0>>,
+        gpioa::PA6<Alternate<AF0>>,
+        gpioa::PA7<Alternate<AF0>>,
     )
-{}
+{
+}
+#[cfg(feature = "stm32f042")]
 impl Pins<SPI1>
     for (
-        PB3<Alternate<AF0>>,
-        PB4<Alternate<AF0>>,
-        PB5<Alternate<AF0>>,
+        gpiob::PB3<Alternate<AF0>>,
+        gpiob::PB4<Alternate<AF0>>,
+        gpiob::PB5<Alternate<AF0>>,
     )
-{}
+{
+}
 
+#[cfg(feature = "stm32f042")]
 impl<PINS> Spi<SPI1, PINS> {
     pub fn spi1<F>(spi: SPI1, pins: PINS, mode: Mode, speed: F, clocks: Clocks) -> Self
     where
@@ -126,6 +130,7 @@ impl<PINS> Spi<SPI1, PINS> {
     }
 }
 
+#[cfg(feature = "stm32f042")]
 impl<PINS> ::embedded_hal::spi::FullDuplex<u8> for Spi<SPI1, PINS> {
     type Error = Error;
 
@@ -166,5 +171,7 @@ impl<PINS> ::embedded_hal::spi::FullDuplex<u8> for Spi<SPI1, PINS> {
     }
 }
 
+#[cfg(feature = "stm32f042")]
 impl<PINS> ::embedded_hal::blocking::spi::transfer::Default<u8> for Spi<SPI1, PINS> {}
+#[cfg(feature = "stm32f042")]
 impl<PINS> ::embedded_hal::blocking::spi::write::Default<u8> for Spi<SPI1, PINS> {}