Browse Source

Applied a healthy dose of warning cleanup

Signed-off-by: Daniel Egger <daniel@eggers-club.de>
features/pwm
Daniel Egger 3 years ago
parent
commit
97128234d7
  1. 2
      CHANGELOG.md
  2. 2
      README.md
  3. 1
      examples/blinky.rs
  4. 1
      examples/blinky_delay.rs
  5. 1
      examples/blinky_multiple.rs
  6. 1
      examples/blinky_timer.rs
  7. 1
      examples/flash_systick.rs
  8. 2
      examples/led_hal_button_irq.rs
  9. 1
      examples/serial_echo.rs
  10. 1
      examples/spi_hal_apa102c.rs
  11. 1
      examples/watchdog.rs
  12. 25
      src/gpio.rs
  13. 51
      src/i2c.rs
  14. 7
      src/lib.rs
  15. 27
      src/rcc.rs
  16. 66
      src/serial.rs
  17. 66
      src/spi.rs
  18. 19
      src/timers.rs
  19. 27
      src/watchdog.rs

2
CHANGELOG.md

@ -19,6 +19,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Removed superfluous use statements
- Re-added Send ability for U(S)ART Rx/Tx
- Made crate to compile without features
- Eliminated a lot of unused warnings
### Fixed

2
README.md

@ -6,12 +6,12 @@ API for the STMicro STM32F0xx family of microcontrollers. It replaces the
[stm32f042-hal][] by a more ubiqitous version suitable for additional families.
Currently supported configuration are:
* stm32f042
* stm32f030
* stm32f030x4
* stm32f030x6
* stm32f030x8
* stm32f030xc
* stm32f042
* stm32f070
* stm32f070x6
* stm32f070xb

1
examples/blinky.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use stm32f0xx_hal as hal;

1
examples/blinky_delay.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use stm32f0xx_hal as hal;

1
examples/blinky_multiple.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use stm32f0xx_hal as hal;

1
examples/blinky_timer.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use stm32f0xx_hal as hal;

1
examples/flash_systick.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use stm32f0xx_hal as hal;

2
examples/led_hal_button_irq.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use stm32f0xx_hal as hal;
@ -84,7 +85,6 @@ fn main() -> ! {
}
}
// Define an interupt handler, i.e. function to call when interrupt occurs. Here if our external
// interrupt trips when the button is pressed and will light the LED for a second
#[interrupt]

1
examples/serial_echo.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use stm32f0xx_hal as hal;

1
examples/spi_hal_apa102c.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use stm32f0xx_hal as hal;

1
examples/watchdog.rs

@ -1,6 +1,7 @@
#![no_main]
#![no_std]
#[allow(unused)]
use panic_halt;
use core::fmt::Write;

25
src/gpio.rs

@ -107,6 +107,7 @@ impl<MODE> InputPin for Pin<Input<MODE>> {
}
}
#[allow(unused)]
macro_rules! gpio_trait {
($gpiox:ident) => {
impl GpioRegExt for crate::stm32::$gpiox::RegisterBlock {
@ -133,9 +134,21 @@ macro_rules! gpio_trait {
};
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
gpio_trait!(gpioa);
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
gpio_trait!(gpiof);
#[allow(unused)]
macro_rules! gpio {
($GPIOX:ident, $gpiox:ident, $iopxenr:ident, $PXx:ident, [
$($PXi:ident: ($pxi:ident, $i:expr, $MODE:ty),)+
@ -497,7 +510,11 @@ macro_rules! gpio {
}
}
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
gpio!(GPIOA, gpioa, iopaen, PA, [
PA0: (pa0, 0, Input<Floating>),
PA1: (pa1, 1, Input<Floating>),
@ -517,7 +534,11 @@ gpio!(GPIOA, gpioa, iopaen, PA, [
PA15: (pa15, 15, Input<Floating>),
]);
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
gpio!(GPIOB, gpiob, iopben, PB, [
PB0: (pb0, 0, Input<Floating>),
PB1: (pb1, 1, Input<Floating>),

51
src/i2c.rs

@ -1,13 +1,18 @@
#[allow(unused)]
use core::ops::Deref;
use crate::stm32;
#[allow(unused)]
use embedded_hal::blocking::i2c::{Write, WriteRead};
use crate::gpio::*;
use crate::time::{KiloHertz, U32Ext};
use core::cmp;
#[allow(unused)]
use crate::{
gpio::*,
stm32,
time::{KiloHertz, U32Ext},
};
/// I2C abstraction
#[allow(unused)]
pub struct I2c<I2C, SCLPIN, SDAPIN> {
i2c: I2C,
pins: (SCLPIN, SDAPIN),
@ -16,6 +21,7 @@ pub struct I2c<I2C, SCLPIN, SDAPIN> {
pub trait SclPin<I2C> {}
pub trait SdaPin<I2C> {}
#[allow(unused)]
macro_rules! i2c_pins {
($($I2C:ident => {
scl => [$($scl:ty),+ $(,)*],
@ -32,7 +38,7 @@ macro_rules! i2c_pins {
}
}
#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
i2c_pins! {
I2C1 => {
scl => [gpioa::PA11<Alternate<AF5>>, gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
@ -40,9 +46,9 @@ i2c_pins! {
}
}
#[cfg(any(
feature = "stm32f042",
feature = "stm32f030x6",
feature = "stm32f030xc"
feature = "stm32f030xc",
feature = "stm32f042",
))]
i2c_pins! {
I2C1 => {
@ -103,6 +109,7 @@ pub enum Error {
NACK,
}
#[allow(unused)]
macro_rules! i2c {
($($I2C:ident: ($i2c:ident, $i2cXen:ident, $i2cXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => {
$(
@ -128,12 +135,17 @@ macro_rules! i2c {
)+
}
}
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
i2c! {
I2C1: (i2c1, i2c1en, i2c1rst, apb1enr, apb1rstr),
}
#[cfg(any(
feature = "stm32f030xc",
// XXX: This can't be right
feature = "stm32f030xc",
feature = "stm32f070xb"
))]
@ -142,13 +154,26 @@ i2c! {
}
// It's s needed for the impls, but rustc doesn't recognize that
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
#[allow(dead_code)]
type I2cRegisterBlock = stm32::i2c1::RegisterBlock;
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<I2C, SCLPIN, SDAPIN> I2c<I2C, SCLPIN, SDAPIN>
where
I2C: Deref<Target = I2cRegisterBlock>,
{
fn i2c_init(self: Self, speed: KiloHertz) -> Self {
use core::cmp;
/* Make sure the I2C unit is disabled so we can configure it */
self.i2c.cr1.modify(|_, w| w.pe().clear_bit());
@ -226,6 +251,11 @@ where
}
}
#[cfg(any(
feature = "stm32f042",
feature = "stm32f030",
feature = "stm32f070"
))]
impl<I2C, SCLPIN, SDAPIN> WriteRead for I2c<I2C, SCLPIN, SDAPIN>
where
I2C: Deref<Target = I2cRegisterBlock>,
@ -306,6 +336,11 @@ where
}
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<I2C, SCLPIN, SDAPIN> Write for I2c<I2C, SCLPIN, SDAPIN>
where
I2C: Deref<Target = I2cRegisterBlock>,

7
src/lib.rs

@ -9,6 +9,13 @@ pub use stm32f0::stm32f0x2 as stm32;
#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
pub use stm32f0::stm32f0x0 as stm32;
#[cfg(not(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
)))]
pub mod stm32 {}
pub mod delay;
pub mod gpio;
pub mod i2c;

27
src/rcc.rs

@ -1,8 +1,9 @@
use core::cmp;
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
use crate::stm32::{FLASH, RCC};
use cast::u32;
use crate::time::Hertz;
@ -12,7 +13,11 @@ pub trait RccExt {
fn constrain(self) -> Rcc;
}
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl RccExt for RCC {
fn constrain(self) -> Rcc {
Rcc {
@ -30,15 +35,21 @@ pub struct Rcc {
pub cfgr: CFGR,
}
#[allow(unused)]
const HSI: u32 = 8_000_000; // Hz
#[allow(unused)]
pub struct CFGR {
hclk: Option<u32>,
pclk: Option<u32>,
sysclk: Option<u32>,
}
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl CFGR {
pub fn hclk<F>(mut self, freq: F) -> Self
where
@ -66,7 +77,7 @@ impl CFGR {
pub fn freeze(self) -> Clocks {
let pllmul = (4 * self.sysclk.unwrap_or(HSI) + HSI) / HSI / 2;
let pllmul = cmp::min(cmp::max(pllmul, 2), 16);
let pllmul = core::cmp::min(core::cmp::max(pllmul, 2), 16);
let sysclk = pllmul * HSI / 2;
let pllmul_bits = if pllmul == 2 {
@ -106,7 +117,7 @@ impl CFGR {
.unwrap_or(0b011);
let ppre: u8 = 1 << (ppre_bits - 0b011);
let pclk = hclk / u32(ppre);
let pclk = hclk / cast::u32(ppre);
// adjust flash wait states
unsafe {

66
src/serial.rs

@ -23,20 +23,18 @@
//! }
//! ```
use core::fmt::{Result, Write};
use core::ops::Deref;
use core::ptr;
#[allow(unused)]
use core::{
fmt::{Result, Write},
ops::Deref,
ptr,
};
#[allow(unused)]
use embedded_hal::prelude::*;
use nb::block;
use void::Void;
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
use crate::stm32;
use crate::gpio::*;
use crate::rcc::Clocks;
use crate::time::Bps;
#[allow(unused)]
use crate::{gpio::*, rcc::Clocks, stm32, time::Bps};
/// Interrupt event
pub enum Event {
@ -64,6 +62,7 @@ pub enum Error {
pub trait TxPin<USART> {}
pub trait RxPin<USART> {}
#[allow(unused)]
macro_rules! usart_pins {
($($USART:ident => {
tx => [$($tx:ty),+ $(,)*],
@ -102,9 +101,9 @@ usart_pins! {
}
}
#[cfg(any(
feature = "stm32f042",
feature = "stm32f030x8",
feature = "stm32f030xc",
feature = "stm32f042",
feature = "stm32f070",
))]
usart_pins! {
@ -138,12 +137,14 @@ usart_pins! {
}
/// Serial abstraction
#[allow(unused)]
pub struct Serial<USART, TXPIN, RXPIN> {
usart: USART,
pins: (TXPIN, RXPIN),
}
/// Serial receiver
#[allow(unused)]
pub struct Rx<USART> {
// This is ok, because the USART types only contains PhantomData
usart: *const USART,
@ -153,6 +154,7 @@ pub struct Rx<USART> {
unsafe impl<USART> Send for Rx<USART> {}
/// Serial transmitter
#[allow(unused)]
pub struct Tx<USART> {
// This is ok, because the USART types only contains PhantomData
usart: *const USART,
@ -161,6 +163,7 @@ pub struct Tx<USART> {
// NOTE(unsafe) Required to allow protected shared access in handlers
unsafe impl<USART> Send for Tx<USART> {}
#[allow(unused)]
macro_rules! usart {
($($USART:ident: ($usart:ident, $usartXen:ident, $apbenr:ident),)+) => {
$(
@ -196,14 +199,18 @@ macro_rules! usart {
}
}
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
usart! {
USART1: (usart1, usart1en, apb2enr),
}
#[cfg(any(
feature = "stm32f042",
feature = "stm32f030x8",
feature = "stm32f030xc",
feature = "stm32f042",
feature = "stm32f070",
))]
usart! {
@ -222,8 +229,18 @@ usart! {
// It's s needed for the impls, but rustc doesn't recognize that
#[allow(dead_code)]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
type SerialRegisterBlock = stm32::usart1::RegisterBlock;
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<USART> embedded_hal::serial::Read<u8> for Rx<USART>
where
USART: Deref<Target = SerialRegisterBlock>,
@ -252,11 +269,16 @@ where
}
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<USART> embedded_hal::serial::Write<u8> for Tx<USART>
where
USART: Deref<Target = SerialRegisterBlock>,
{
type Error = Void;
type Error = void::Void;
/// Ensures that none of the previously written words are still buffered
fn flush(&mut self) -> nb::Result<(), Self::Error> {
@ -287,6 +309,11 @@ where
}
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<USART, TXPIN, RXPIN> Serial<USART, TXPIN, RXPIN>
where
USART: Deref<Target = SerialRegisterBlock>,
@ -308,11 +335,18 @@ where
}
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<USART> Write for Tx<USART>
where
Tx<USART>: embedded_hal::serial::Write<u8>,
{
fn write_str(&mut self, s: &str) -> Result {
use nb::block;
let _ = s.as_bytes().iter().map(|c| block!(self.write(*c))).last();
Ok(())
}

66
src/spi.rs

@ -1,24 +1,37 @@
use core::ops::Deref;
use core::ptr;
#[allow(unused)]
use core::{ops::Deref, ptr};
#[allow(unused)]
use nb;
pub use embedded_hal::spi::{Mode, Phase, Polarity};
#[allow(unused)]
use crate::stm32;
// TODO Put this inside the macro
// Currently that causes a compiler panic
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
use crate::stm32::SPI1;
#[cfg(any(
feature = "stm32f030x8",
feature = "stm32f030xc",
feature = "stm32f070xb"
))]
#[allow(unused)]
use crate::stm32::SPI2;
#[allow(unused)]
use crate::gpio::*;
#[allow(unused)]
use crate::rcc::Clocks;
#[allow(unused)]
use crate::time::Hertz;
/// SPI error
@ -35,6 +48,7 @@ pub enum Error {
}
/// SPI abstraction
#[allow(unused)]
pub struct Spi<SPI, SCKPIN, MISOPIN, MOSIPIN> {
spi: SPI,
pins: (SCKPIN, MISOPIN, MOSIPIN),
@ -44,6 +58,7 @@ pub trait SckPin<SPI> {}
pub trait MisoPin<SPI> {}
pub trait MosiPin<SPI> {}
#[allow(unused)]
macro_rules! spi_pins {
($($SPI:ident => {
sck => [$($sck:ty),+ $(,)*],
@ -64,7 +79,11 @@ macro_rules! spi_pins {
}
}
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
spi_pins! {
SPI1 => {
sck => [gpioa::PA5<Alternate<AF0>>, gpiob::PB3<Alternate<AF0>>],
@ -101,6 +120,7 @@ spi_pins! {
}
}
#[allow(unused)]
macro_rules! spi {
($($SPI:ident: ($spi:ident, $spiXen:ident, $spiXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => {
$(
@ -134,7 +154,11 @@ macro_rules! spi {
}
}
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
spi! {
SPI1: (spi1, spi1en, spi1rst, apb2enr, apb2rstr),
}
@ -149,8 +173,18 @@ spi! {
// It's s needed for the impls, but rustc doesn't recognize that
#[allow(dead_code)]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
type SpiRegisterBlock = stm32::spi1::RegisterBlock;
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
where
SPI: Deref<Target = SpiRegisterBlock>,
@ -221,6 +255,11 @@ where
}
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::spi::FullDuplex<u8>
for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
where
@ -265,15 +304,24 @@ where
}
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::transfer::Default<u8>
for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
where
SPI: Deref<Target = SpiRegisterBlock>,
{
}
{}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::write::Default<u8>
for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
where
SPI: Deref<Target = SpiRegisterBlock>,
{
}
{}

19
src/timers.rs

@ -24,12 +24,10 @@
//! }
//! ```
use crate::stm32;
use cortex_m::peripheral::syst::SystClkSource;
use cortex_m::peripheral::SYST;
use crate::rcc::Clocks;
use cast::{u16, u32};
use embedded_hal::timer::{CountDown, Periodic};
use nb;
use void::Void;
@ -105,6 +103,7 @@ impl CountDown for Timer<SYST> {
impl Periodic for Timer<SYST> {}
#[allow(unused)]
macro_rules! timers {
($($TIM:ident: ($tim:ident, $timXen:ident, $timXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => {
$(
@ -119,7 +118,7 @@ macro_rules! timers {
T: Into<Hertz>,
{
// NOTE(unsafe) This executes only during initialisation
let rcc = unsafe { &(*stm32::RCC::ptr()) };
let rcc = unsafe { &(*crate::stm32::RCC::ptr()) };
// enable and reset peripheral to a clean slate state
rcc.$apbenr.modify(|_, w| w.$timXen().set_bit());
@ -157,7 +156,7 @@ macro_rules! timers {
/// Releases the TIM peripheral
pub fn release(self) -> $TIM {
let rcc = unsafe { &(*stm32::RCC::ptr()) };
let rcc = unsafe { &(*crate::stm32::RCC::ptr()) };
// Pause counter
self.tim.cr1.modify(|_, w| w.cen().clear_bit());
// Disable timer
@ -182,11 +181,11 @@ macro_rules! timers {
let frequency = timeout.into().0;
let ticks = self.clocks.pclk().0 / frequency;
let psc = u16((ticks - 1) / (1 << 16)).unwrap();
let psc = cast::u16((ticks - 1) / (1 << 16)).unwrap();
self.tim.psc.write(|w| unsafe { w.psc().bits(psc) });
let arr = u16(ticks / u32(psc + 1)).unwrap();
self.tim.arr.write(|w| unsafe { w.bits(u32(arr)) });
let arr = cast::u16(ticks / cast::u32(psc + 1)).unwrap();
self.tim.arr.write(|w| unsafe { w.bits(cast::u32(arr)) });
// start counter
self.tim.cr1.modify(|_, w| w.cen().set_bit());
@ -209,7 +208,11 @@ macro_rules! timers {
}
}
#[cfg(any(feature = "stm32f030", feature = "stm32f042", feature = "stm32f070"))]
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
timers! {
TIM1: (tim1, tim1en, tim1rst, apb2enr, apb2rstr),
TIM3: (tim3, tim3en, tim3rst, apb1enr, apb1rstr),

27
src/watchdog.rs

@ -41,16 +41,32 @@
//! // Whoops, got stuck, the watchdog issues a reset after 10 ms
//! iwdg.feed();
//! ```
#[allow(unused)]
use embedded_hal::watchdog;
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
use crate::stm32::IWDG;
use crate::time::Hertz;
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
/// Watchdog instance
pub struct Watchdog {
iwdg: IWDG,
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl watchdog::Watchdog for Watchdog {
/// Feed the watchdog, so that at least one `period` goes by before the next
/// reset
@ -88,12 +104,23 @@ impl Into<IwdgTimeout> for Hertz {
IwdgTimeout { psc, reload }
}
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl Watchdog {
pub fn new(iwdg: IWDG) -> Self {
Self { iwdg }
}
}
#[cfg(any(
feature = "stm32f030",
feature = "stm32f042",
feature = "stm32f070"
))]
impl watchdog::WatchdogEnable for Watchdog {
type Time = IwdgTimeout;
fn start<T>(&mut self, period: T)

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