Applied a healthy dose of warning cleanup
Signed-off-by: Daniel Egger <daniel@eggers-club.de>
This commit is contained in:
Daniel Egger
parent
f09a7cb392
commit
97128234d7
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@ -19,6 +19,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- Removed superfluous use statements
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- Re-added Send ability for U(S)ART Rx/Tx
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- Made crate to compile without features
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- Eliminated a lot of unused warnings
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### Fixed
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@ -6,12 +6,12 @@ API for the STMicro STM32F0xx family of microcontrollers. It replaces the
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[stm32f042-hal][] by a more ubiqitous version suitable for additional families.
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Currently supported configuration are:
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* stm32f042
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* stm32f030
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* stm32f030x4
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* stm32f030x6
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* stm32f030x8
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* stm32f030xc
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* stm32f042
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* stm32f070
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* stm32f070x6
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* stm32f070xb
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use stm32f0xx_hal as hal;
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use stm32f0xx_hal as hal;
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use stm32f0xx_hal as hal;
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use stm32f0xx_hal as hal;
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use stm32f0xx_hal as hal;
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use stm32f0xx_hal as hal;
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@ -84,7 +85,6 @@ fn main() -> ! {
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}
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}
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// Define an interupt handler, i.e. function to call when interrupt occurs. Here if our external
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// interrupt trips when the button is pressed and will light the LED for a second
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#[interrupt]
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use stm32f0xx_hal as hal;
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use stm32f0xx_hal as hal;
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@ -1,6 +1,7 @@
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#![no_main]
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#![no_std]
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#[allow(unused)]
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use panic_halt;
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use core::fmt::Write;
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25
src/gpio.rs
25
src/gpio.rs
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@ -107,6 +107,7 @@ impl<MODE> InputPin for Pin<Input<MODE>> {
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}
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}
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#[allow(unused)]
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macro_rules! gpio_trait {
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($gpiox:ident) => {
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impl GpioRegExt for crate::stm32::$gpiox::RegisterBlock {
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@ -133,9 +134,21 @@ macro_rules! gpio_trait {
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};
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}
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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gpio_trait!(gpioa);
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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gpio_trait!(gpiof);
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#[allow(unused)]
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macro_rules! gpio {
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($GPIOX:ident, $gpiox:ident, $iopxenr:ident, $PXx:ident, [
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$($PXi:ident: ($pxi:ident, $i:expr, $MODE:ty),)+
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@ -497,7 +510,11 @@ macro_rules! gpio {
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}
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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gpio!(GPIOA, gpioa, iopaen, PA, [
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PA0: (pa0, 0, Input<Floating>),
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PA1: (pa1, 1, Input<Floating>),
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@ -517,7 +534,11 @@ gpio!(GPIOA, gpioa, iopaen, PA, [
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PA15: (pa15, 15, Input<Floating>),
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]);
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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gpio!(GPIOB, gpiob, iopben, PB, [
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PB0: (pb0, 0, Input<Floating>),
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PB1: (pb1, 1, Input<Floating>),
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51
src/i2c.rs
51
src/i2c.rs
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@ -1,13 +1,18 @@
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#[allow(unused)]
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use core::ops::Deref;
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use crate::stm32;
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#[allow(unused)]
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use embedded_hal::blocking::i2c::{Write, WriteRead};
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use crate::gpio::*;
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use crate::time::{KiloHertz, U32Ext};
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use core::cmp;
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#[allow(unused)]
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use crate::{
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gpio::*,
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stm32,
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time::{KiloHertz, U32Ext},
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};
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/// I2C abstraction
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#[allow(unused)]
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pub struct I2c<I2C, SCLPIN, SDAPIN> {
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i2c: I2C,
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pins: (SCLPIN, SDAPIN),
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@ -16,6 +21,7 @@ pub struct I2c<I2C, SCLPIN, SDAPIN> {
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pub trait SclPin<I2C> {}
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pub trait SdaPin<I2C> {}
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#[allow(unused)]
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macro_rules! i2c_pins {
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($($I2C:ident => {
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scl => [$($scl:ty),+ $(,)*],
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@ -32,7 +38,7 @@ macro_rules! i2c_pins {
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}
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030"))]
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#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
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i2c_pins! {
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I2C1 => {
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scl => [gpioa::PA11<Alternate<AF5>>, gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
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@ -40,9 +46,9 @@ i2c_pins! {
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}
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}
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#[cfg(any(
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feature = "stm32f042",
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feature = "stm32f030x6",
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feature = "stm32f030xc"
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feature = "stm32f030xc",
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feature = "stm32f042",
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))]
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i2c_pins! {
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I2C1 => {
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@ -103,6 +109,7 @@ pub enum Error {
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NACK,
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}
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#[allow(unused)]
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macro_rules! i2c {
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($($I2C:ident: ($i2c:ident, $i2cXen:ident, $i2cXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => {
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$(
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@ -128,12 +135,17 @@ macro_rules! i2c {
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)+
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}
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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i2c! {
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I2C1: (i2c1, i2c1en, i2c1rst, apb1enr, apb1rstr),
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}
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#[cfg(any(
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feature = "stm32f030xc",
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// XXX: This can't be right
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feature = "stm32f030xc",
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feature = "stm32f070xb"
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))]
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@ -142,13 +154,26 @@ i2c! {
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}
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// It's s needed for the impls, but rustc doesn't recognize that
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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#[allow(dead_code)]
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type I2cRegisterBlock = stm32::i2c1::RegisterBlock;
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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impl<I2C, SCLPIN, SDAPIN> I2c<I2C, SCLPIN, SDAPIN>
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where
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I2C: Deref<Target = I2cRegisterBlock>,
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{
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fn i2c_init(self: Self, speed: KiloHertz) -> Self {
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use core::cmp;
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/* Make sure the I2C unit is disabled so we can configure it */
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self.i2c.cr1.modify(|_, w| w.pe().clear_bit());
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@ -226,6 +251,11 @@ where
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}
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}
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#[cfg(any(
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feature = "stm32f042",
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feature = "stm32f030",
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feature = "stm32f070"
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))]
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impl<I2C, SCLPIN, SDAPIN> WriteRead for I2c<I2C, SCLPIN, SDAPIN>
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where
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I2C: Deref<Target = I2cRegisterBlock>,
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@ -306,6 +336,11 @@ where
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}
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}
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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impl<I2C, SCLPIN, SDAPIN> Write for I2c<I2C, SCLPIN, SDAPIN>
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where
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I2C: Deref<Target = I2cRegisterBlock>,
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@ -9,6 +9,13 @@ pub use stm32f0::stm32f0x2 as stm32;
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#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
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pub use stm32f0::stm32f0x0 as stm32;
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#[cfg(not(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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)))]
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pub mod stm32 {}
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pub mod delay;
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pub mod gpio;
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pub mod i2c;
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27
src/rcc.rs
27
src/rcc.rs
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@ -1,8 +1,9 @@
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use core::cmp;
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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use crate::stm32::{FLASH, RCC};
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use cast::u32;
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use crate::time::Hertz;
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@ -12,7 +13,11 @@ pub trait RccExt {
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fn constrain(self) -> Rcc;
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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impl RccExt for RCC {
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fn constrain(self) -> Rcc {
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Rcc {
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@ -30,15 +35,21 @@ pub struct Rcc {
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pub cfgr: CFGR,
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}
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#[allow(unused)]
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const HSI: u32 = 8_000_000; // Hz
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#[allow(unused)]
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pub struct CFGR {
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hclk: Option<u32>,
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pclk: Option<u32>,
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sysclk: Option<u32>,
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}
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
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#[cfg(any(
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feature = "stm32f030",
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feature = "stm32f042",
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feature = "stm32f070"
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))]
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impl CFGR {
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pub fn hclk<F>(mut self, freq: F) -> Self
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where
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@ -66,7 +77,7 @@ impl CFGR {
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pub fn freeze(self) -> Clocks {
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let pllmul = (4 * self.sysclk.unwrap_or(HSI) + HSI) / HSI / 2;
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let pllmul = cmp::min(cmp::max(pllmul, 2), 16);
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let pllmul = core::cmp::min(core::cmp::max(pllmul, 2), 16);
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let sysclk = pllmul * HSI / 2;
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let pllmul_bits = if pllmul == 2 {
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@ -106,7 +117,7 @@ impl CFGR {
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.unwrap_or(0b011);
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let ppre: u8 = 1 << (ppre_bits - 0b011);
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let pclk = hclk / u32(ppre);
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let pclk = hclk / cast::u32(ppre);
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// adjust flash wait states
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unsafe {
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|
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@ -23,20 +23,18 @@
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//! }
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//! ```
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use core::fmt::{Result, Write};
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use core::ops::Deref;
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use core::ptr;
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#[allow(unused)]
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use core::{
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fmt::{Result, Write},
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ops::Deref,
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ptr,
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};
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#[allow(unused)]
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use embedded_hal::prelude::*;
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use nb::block;
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use void::Void;
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
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use crate::stm32;
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use crate::gpio::*;
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use crate::rcc::Clocks;
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use crate::time::Bps;
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#[allow(unused)]
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use crate::{gpio::*, rcc::Clocks, stm32, time::Bps};
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/// Interrupt event
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pub enum Event {
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@ -64,6 +62,7 @@ pub enum Error {
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pub trait TxPin<USART> {}
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pub trait RxPin<USART> {}
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#[allow(unused)]
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macro_rules! usart_pins {
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($($USART:ident => {
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tx => [$($tx:ty),+ $(,)*],
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|
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@ -102,9 +101,9 @@ usart_pins! {
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}
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}
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#[cfg(any(
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feature = "stm32f042",
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feature = "stm32f030x8",
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feature = "stm32f030xc",
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feature = "stm32f042",
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feature = "stm32f070",
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))]
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usart_pins! {
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@ -138,12 +137,14 @@ usart_pins! {
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}
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/// Serial abstraction
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#[allow(unused)]
|
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pub struct Serial<USART, TXPIN, RXPIN> {
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usart: USART,
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pins: (TXPIN, RXPIN),
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}
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/// Serial receiver
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#[allow(unused)]
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pub struct Rx<USART> {
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// This is ok, because the USART types only contains PhantomData
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usart: *const USART,
|
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|
|
@ -153,6 +154,7 @@ pub struct Rx<USART> {
|
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unsafe impl<USART> Send for Rx<USART> {}
|
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/// Serial transmitter
|
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#[allow(unused)]
|
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pub struct Tx<USART> {
|
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// This is ok, because the USART types only contains PhantomData
|
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usart: *const USART,
|
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|
|
@ -161,6 +163,7 @@ pub struct Tx<USART> {
|
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// NOTE(unsafe) Required to allow protected shared access in handlers
|
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unsafe impl<USART> Send for Tx<USART> {}
|
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|
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#[allow(unused)]
|
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macro_rules! usart {
|
||||
($($USART:ident: ($usart:ident, $usartXen:ident, $apbenr:ident),)+) => {
|
||||
$(
|
||||
|
|
@ -196,14 +199,18 @@ macro_rules! usart {
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
usart! {
|
||||
USART1: (usart1, usart1en, apb2enr),
|
||||
}
|
||||
#[cfg(any(
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f030x8",
|
||||
feature = "stm32f030xc",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070",
|
||||
))]
|
||||
usart! {
|
||||
|
|
@ -222,8 +229,18 @@ usart! {
|
|||
|
||||
// It's s needed for the impls, but rustc doesn't recognize that
|
||||
#[allow(dead_code)]
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
type SerialRegisterBlock = stm32::usart1::RegisterBlock;
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl<USART> embedded_hal::serial::Read<u8> for Rx<USART>
|
||||
where
|
||||
USART: Deref<Target = SerialRegisterBlock>,
|
||||
|
|
@ -252,11 +269,16 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl<USART> embedded_hal::serial::Write<u8> for Tx<USART>
|
||||
where
|
||||
USART: Deref<Target = SerialRegisterBlock>,
|
||||
{
|
||||
type Error = Void;
|
||||
type Error = void::Void;
|
||||
|
||||
/// Ensures that none of the previously written words are still buffered
|
||||
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||
|
|
@ -287,6 +309,11 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl<USART, TXPIN, RXPIN> Serial<USART, TXPIN, RXPIN>
|
||||
where
|
||||
USART: Deref<Target = SerialRegisterBlock>,
|
||||
|
|
@ -308,11 +335,18 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl<USART> Write for Tx<USART>
|
||||
where
|
||||
Tx<USART>: embedded_hal::serial::Write<u8>,
|
||||
{
|
||||
fn write_str(&mut self, s: &str) -> Result {
|
||||
use nb::block;
|
||||
|
||||
let _ = s.as_bytes().iter().map(|c| block!(self.write(*c))).last();
|
||||
Ok(())
|
||||
}
|
||||
|
|
|
|||
66
src/spi.rs
66
src/spi.rs
|
|
@ -1,24 +1,37 @@
|
|||
use core::ops::Deref;
|
||||
use core::ptr;
|
||||
#[allow(unused)]
|
||||
use core::{ops::Deref, ptr};
|
||||
|
||||
#[allow(unused)]
|
||||
use nb;
|
||||
|
||||
pub use embedded_hal::spi::{Mode, Phase, Polarity};
|
||||
|
||||
#[allow(unused)]
|
||||
use crate::stm32;
|
||||
|
||||
// TODO Put this inside the macro
|
||||
// Currently that causes a compiler panic
|
||||
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
use crate::stm32::SPI1;
|
||||
#[cfg(any(
|
||||
feature = "stm32f030x8",
|
||||
feature = "stm32f030xc",
|
||||
feature = "stm32f070xb"
|
||||
))]
|
||||
#[allow(unused)]
|
||||
use crate::stm32::SPI2;
|
||||
|
||||
#[allow(unused)]
|
||||
use crate::gpio::*;
|
||||
|
||||
#[allow(unused)]
|
||||
use crate::rcc::Clocks;
|
||||
|
||||
#[allow(unused)]
|
||||
use crate::time::Hertz;
|
||||
|
||||
/// SPI error
|
||||
|
|
@ -35,6 +48,7 @@ pub enum Error {
|
|||
}
|
||||
|
||||
/// SPI abstraction
|
||||
#[allow(unused)]
|
||||
pub struct Spi<SPI, SCKPIN, MISOPIN, MOSIPIN> {
|
||||
spi: SPI,
|
||||
pins: (SCKPIN, MISOPIN, MOSIPIN),
|
||||
|
|
@ -44,6 +58,7 @@ pub trait SckPin<SPI> {}
|
|||
pub trait MisoPin<SPI> {}
|
||||
pub trait MosiPin<SPI> {}
|
||||
|
||||
#[allow(unused)]
|
||||
macro_rules! spi_pins {
|
||||
($($SPI:ident => {
|
||||
sck => [$($sck:ty),+ $(,)*],
|
||||
|
|
@ -64,7 +79,11 @@ macro_rules! spi_pins {
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
spi_pins! {
|
||||
SPI1 => {
|
||||
sck => [gpioa::PA5<Alternate<AF0>>, gpiob::PB3<Alternate<AF0>>],
|
||||
|
|
@ -101,6 +120,7 @@ spi_pins! {
|
|||
}
|
||||
}
|
||||
|
||||
#[allow(unused)]
|
||||
macro_rules! spi {
|
||||
($($SPI:ident: ($spi:ident, $spiXen:ident, $spiXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => {
|
||||
$(
|
||||
|
|
@ -134,7 +154,11 @@ macro_rules! spi {
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))]
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
spi! {
|
||||
SPI1: (spi1, spi1en, spi1rst, apb2enr, apb2rstr),
|
||||
}
|
||||
|
|
@ -149,8 +173,18 @@ spi! {
|
|||
|
||||
// It's s needed for the impls, but rustc doesn't recognize that
|
||||
#[allow(dead_code)]
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
type SpiRegisterBlock = stm32::spi1::RegisterBlock;
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
|
||||
where
|
||||
SPI: Deref<Target = SpiRegisterBlock>,
|
||||
|
|
@ -221,6 +255,11 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::spi::FullDuplex<u8>
|
||||
for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
|
||||
where
|
||||
|
|
@ -265,15 +304,24 @@ where
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::transfer::Default<u8>
|
||||
for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
|
||||
where
|
||||
SPI: Deref<Target = SpiRegisterBlock>,
|
||||
{
|
||||
}
|
||||
{}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::write::Default<u8>
|
||||
for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN>
|
||||
where
|
||||
SPI: Deref<Target = SpiRegisterBlock>,
|
||||
{
|
||||
}
|
||||
{}
|
||||
|
|
|
|||
|
|
@ -24,12 +24,10 @@
|
|||
//! }
|
||||
//! ```
|
||||
|
||||
use crate::stm32;
|
||||
use cortex_m::peripheral::syst::SystClkSource;
|
||||
use cortex_m::peripheral::SYST;
|
||||
|
||||
use crate::rcc::Clocks;
|
||||
use cast::{u16, u32};
|
||||
use embedded_hal::timer::{CountDown, Periodic};
|
||||
use nb;
|
||||
use void::Void;
|
||||
|
|
@ -105,6 +103,7 @@ impl CountDown for Timer<SYST> {
|
|||
|
||||
impl Periodic for Timer<SYST> {}
|
||||
|
||||
#[allow(unused)]
|
||||
macro_rules! timers {
|
||||
($($TIM:ident: ($tim:ident, $timXen:ident, $timXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => {
|
||||
$(
|
||||
|
|
@ -119,7 +118,7 @@ macro_rules! timers {
|
|||
T: Into<Hertz>,
|
||||
{
|
||||
// NOTE(unsafe) This executes only during initialisation
|
||||
let rcc = unsafe { &(*stm32::RCC::ptr()) };
|
||||
let rcc = unsafe { &(*crate::stm32::RCC::ptr()) };
|
||||
|
||||
// enable and reset peripheral to a clean slate state
|
||||
rcc.$apbenr.modify(|_, w| w.$timXen().set_bit());
|
||||
|
|
@ -157,7 +156,7 @@ macro_rules! timers {
|
|||
|
||||
/// Releases the TIM peripheral
|
||||
pub fn release(self) -> $TIM {
|
||||
let rcc = unsafe { &(*stm32::RCC::ptr()) };
|
||||
let rcc = unsafe { &(*crate::stm32::RCC::ptr()) };
|
||||
// Pause counter
|
||||
self.tim.cr1.modify(|_, w| w.cen().clear_bit());
|
||||
// Disable timer
|
||||
|
|
@ -182,11 +181,11 @@ macro_rules! timers {
|
|||
let frequency = timeout.into().0;
|
||||
let ticks = self.clocks.pclk().0 / frequency;
|
||||
|
||||
let psc = u16((ticks - 1) / (1 << 16)).unwrap();
|
||||
let psc = cast::u16((ticks - 1) / (1 << 16)).unwrap();
|
||||
self.tim.psc.write(|w| unsafe { w.psc().bits(psc) });
|
||||
|
||||
let arr = u16(ticks / u32(psc + 1)).unwrap();
|
||||
self.tim.arr.write(|w| unsafe { w.bits(u32(arr)) });
|
||||
let arr = cast::u16(ticks / cast::u32(psc + 1)).unwrap();
|
||||
self.tim.arr.write(|w| unsafe { w.bits(cast::u32(arr)) });
|
||||
|
||||
// start counter
|
||||
self.tim.cr1.modify(|_, w| w.cen().set_bit());
|
||||
|
|
@ -209,7 +208,11 @@ macro_rules! timers {
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(any(feature = "stm32f030", feature = "stm32f042", feature = "stm32f070"))]
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
timers! {
|
||||
TIM1: (tim1, tim1en, tim1rst, apb2enr, apb2rstr),
|
||||
TIM3: (tim3, tim3en, tim3rst, apb1enr, apb1rstr),
|
||||
|
|
|
|||
|
|
@ -41,16 +41,32 @@
|
|||
//! // Whoops, got stuck, the watchdog issues a reset after 10 ms
|
||||
//! iwdg.feed();
|
||||
//! ```
|
||||
#[allow(unused)]
|
||||
use embedded_hal::watchdog;
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
use crate::stm32::IWDG;
|
||||
use crate::time::Hertz;
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
/// Watchdog instance
|
||||
pub struct Watchdog {
|
||||
iwdg: IWDG,
|
||||
}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl watchdog::Watchdog for Watchdog {
|
||||
/// Feed the watchdog, so that at least one `period` goes by before the next
|
||||
/// reset
|
||||
|
|
@ -88,12 +104,23 @@ impl Into<IwdgTimeout> for Hertz {
|
|||
IwdgTimeout { psc, reload }
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl Watchdog {
|
||||
pub fn new(iwdg: IWDG) -> Self {
|
||||
Self { iwdg }
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(any(
|
||||
feature = "stm32f030",
|
||||
feature = "stm32f042",
|
||||
feature = "stm32f070"
|
||||
))]
|
||||
impl watchdog::WatchdogEnable for Watchdog {
|
||||
type Time = IwdgTimeout;
|
||||
fn start<T>(&mut self, period: T)
|
||||
|
|
|
|||
Loading…
Reference in New Issue