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@ -1,24 +1,37 @@
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use core::ops::Deref; |
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use core::ptr; |
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#[allow(unused)] |
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use core::{ops::Deref, ptr}; |
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#[allow(unused)] |
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use nb; |
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pub use embedded_hal::spi::{Mode, Phase, Polarity}; |
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#[allow(unused)] |
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use crate::stm32; |
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// TODO Put this inside the macro
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// Currently that causes a compiler panic
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))] |
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#[cfg(any(
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feature = "stm32f030", |
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feature = "stm32f042", |
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feature = "stm32f070" |
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))] |
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use crate::stm32::SPI1; |
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#[cfg(any(
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feature = "stm32f030x8", |
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feature = "stm32f030xc", |
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feature = "stm32f070xb" |
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))] |
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#[allow(unused)] |
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use crate::stm32::SPI2; |
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#[allow(unused)] |
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use crate::gpio::*; |
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#[allow(unused)] |
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use crate::rcc::Clocks; |
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#[allow(unused)] |
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use crate::time::Hertz; |
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/// SPI error
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@ -35,6 +48,7 @@ pub enum Error {
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} |
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/// SPI abstraction
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#[allow(unused)] |
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pub struct Spi<SPI, SCKPIN, MISOPIN, MOSIPIN> { |
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spi: SPI, |
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pins: (SCKPIN, MISOPIN, MOSIPIN), |
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@ -44,6 +58,7 @@ pub trait SckPin<SPI> {}
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pub trait MisoPin<SPI> {} |
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pub trait MosiPin<SPI> {} |
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#[allow(unused)] |
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macro_rules! spi_pins { |
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($($SPI:ident => { |
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sck => [$($sck:ty),+ $(,)*], |
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@ -64,7 +79,11 @@ macro_rules! spi_pins {
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} |
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} |
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))] |
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#[cfg(any(
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feature = "stm32f030", |
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feature = "stm32f042", |
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feature = "stm32f070" |
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))] |
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spi_pins! { |
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SPI1 => { |
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sck => [gpioa::PA5<Alternate<AF0>>, gpiob::PB3<Alternate<AF0>>], |
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@ -101,6 +120,7 @@ spi_pins! {
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} |
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} |
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#[allow(unused)] |
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macro_rules! spi { |
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($($SPI:ident: ($spi:ident, $spiXen:ident, $spiXrst:ident, $apbenr:ident, $apbrstr:ident),)+) => { |
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$( |
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@ -134,7 +154,11 @@ macro_rules! spi {
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} |
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} |
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#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))] |
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#[cfg(any(
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feature = "stm32f030", |
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feature = "stm32f042", |
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feature = "stm32f070" |
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))] |
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spi! { |
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SPI1: (spi1, spi1en, spi1rst, apb2enr, apb2rstr), |
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} |
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@ -149,8 +173,18 @@ spi! {
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// It's s needed for the impls, but rustc doesn't recognize that
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#[allow(dead_code)] |
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#[cfg(any(
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feature = "stm32f030", |
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feature = "stm32f042", |
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feature = "stm32f070" |
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))] |
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type SpiRegisterBlock = stm32::spi1::RegisterBlock; |
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#[cfg(any(
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feature = "stm32f030", |
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feature = "stm32f042", |
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feature = "stm32f070" |
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))] |
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impl<SPI, SCKPIN, MISOPIN, MOSIPIN> Spi<SPI, SCKPIN, MISOPIN, MOSIPIN> |
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where |
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SPI: Deref<Target = SpiRegisterBlock>, |
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@ -221,6 +255,11 @@ where
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} |
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} |
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#[cfg(any(
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feature = "stm32f030", |
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feature = "stm32f042", |
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feature = "stm32f070" |
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))] |
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impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::spi::FullDuplex<u8> |
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for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN> |
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where |
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@ -265,15 +304,24 @@ where
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} |
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} |
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#[cfg(any(
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feature = "stm32f030", |
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feature = "stm32f042", |
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feature = "stm32f070" |
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))] |
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impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::transfer::Default<u8> |
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for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN> |
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where |
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SPI: Deref<Target = SpiRegisterBlock>, |
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{ |
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} |
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{} |
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#[cfg(any(
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feature = "stm32f030", |
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feature = "stm32f042", |
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feature = "stm32f070" |
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))] |
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impl<SPI, SCKPIN, MISOPIN, MOSIPIN> ::embedded_hal::blocking::spi::write::Default<u8> |
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for Spi<SPI, SCKPIN, MISOPIN, MOSIPIN> |
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where |
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SPI: Deref<Target = SpiRegisterBlock>, |
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{ |
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} |
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{} |
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