From 982b5039dd46304ce74567d09987ee1cb9f4a05c Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Wed, 19 Dec 2018 17:12:18 -0800 Subject: [PATCH] Re-implement Serial for STM32F070 devices following merge --- src/serial.rs | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/src/serial.rs b/src/serial.rs index 1153d29..71c5ea2 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -94,10 +94,18 @@ usart_pins! { rx => [gpioa::PA3>, gpioa::PA15>], } } +#[cfg(feature = "stm32f070")] +usart_pins! { + USART1 => { + tx => [gpioa::PA9>, gpiob::PB6>], + rx => [gpioa::PA10>, gpiob::PB7>], + } +} #[cfg(any( feature = "stm32f042", feature = "stm32f030x8", feature = "stm32f030xc", + feature = "stm32f070", ))] usart_pins! { USART2 => { @@ -105,7 +113,7 @@ usart_pins! { rx => [gpioa::PA3>, gpioa::PA15>], } } -#[cfg(feature = "stm32f030xc")] +#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))] usart_pins! { USART3 => { // According to the datasheet PB10 is both tx and rx, but in stm32cubemx it's only tx @@ -116,6 +124,9 @@ usart_pins! { tx => [gpioa::PA0>, gpioc::PC10>], rx => [gpioa::PA1>, gpioc::PC11>], } +} +#[cfg(feature = "stm32f030xc")] +usart_pins! { USART5 => { tx => [gpiob::PB3>, gpioc::PC12>], rx => [gpiob::PB4>, gpiod::PD2>], @@ -179,22 +190,26 @@ macro_rules! usart { } } -#[cfg(any(feature = "stm32f042", feature = "stm32f030"))] +#[cfg(any(feature = "stm32f042", feature = "stm32f030", feature = "stm32f070"))] usart! { USART1: (usart1, usart1en, apb2enr), } #[cfg(any( feature = "stm32f042", feature = "stm32f030x8", - feature = "stm32f030xc" + feature = "stm32f030xc", + feature = "stm32f070", ))] usart! { USART2: (usart2, usart2en, apb1enr), } -#[cfg(any(feature = "stm32f030xc"))] +#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))] usart! { USART3: (usart3, usart3en, apb1enr), USART4: (usart4, usart4en, apb1enr), +} +#[cfg(feature = "stm32f030xc")] +usart! { USART5: (usart5, usart5en, apb1enr), USART6: (usart6, usart6en, apb2enr), }