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Merge #120

120: implement TscPin for remaining touch pins r=therealprof a=evils

some touch pins were missing the TscPin trait

Co-authored-by: Evils <evils.devils@protonmail.com>
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  1. 1
      CHANGELOG.md
  2. 73
      src/tsc.rs

1
CHANGELOG.md

@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
## [Unreleased]
- Simplify USB PA11/12 remapping for STM32F042x via `usb_bus.usb_remap()` function.
- Complete the `TscPin` trait implementation for all touch pins in the f0 family
## [v0.17.0] - 2020-06-27

73
src/tsc.rs

@ -7,7 +7,7 @@
//! usually comprised between 47nF and 100nF. These values are given as reference for an
//! electrode fitting a human finger tip size across a few millimeters dielectric panel.
use crate::gpio::{gpioa, gpiob, Alternate, AF3};
use crate::gpio::*;
use crate::pac::TSC;
use crate::rcc::Rcc;
@ -66,12 +66,34 @@ tsc_pins!(
gpioa::PA7<Alternate<AF3>> => (2_u8, 4_u8),
);
// all with a TSC minus 42 and 48
#[cfg(any(
feature = "stm32f051",
feature = "stm32f058",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f078",
feature = "stm32f091",
feature = "stm32f098"
))]
tsc_pins!( gpioc::PC5<Alternate<AF0>> => (3_u8, 1_u8) );
tsc_pins!(
gpiob::PB0<Alternate<AF3>> => (3_u8, 2_u8),
gpiob::PB1<Alternate<AF3>> => (3_u8, 3_u8),
gpiob::PB2<Alternate<AF3>> => (3_u8, 4_u8),
);
// all with a TCS minus 58, 78 and 98
#[cfg(any(
feature = "stm32f042",
feature = "stm32f048",
feature = "stm32f051",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f091"
))]
tsc_pins!( gpiob::PB2<Alternate<AF3>> => (3_u8, 4_u8) );
tsc_pins!(
gpioa::PA9<Alternate<AF3>> => (4_u8, 1_u8),
gpioa::PA10<Alternate<AF3>> => (4_u8, 2_u8),
@ -86,6 +108,53 @@ tsc_pins!(
gpiob::PB7<Alternate<AF3>> => (5_u8, 4_u8),
);
// all with a TSC minus 42 and 48
#[cfg(any(
feature = "stm32f051",
feature = "stm32f058",
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f078",
feature = "stm32f091",
feature = "stm32f098"
))]
tsc_pins!(
gpiob::PB11<Alternate<AF3>> => (6_u8, 1_u8),
gpiob::PB12<Alternate<AF3>> => (6_u8, 2_u8),
gpiob::PB13<Alternate<AF3>> => (6_u8, 3_u8),
gpiob::PB14<Alternate<AF3>> => (6_u8, 4_u8),
);
// all with a TSC and gpioe
#[cfg(any(
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f078",
feature = "stm32f091",
feature = "stm32f098"
))]
tsc_pins!(
gpioe::PE2<Alternate<AF3>> => (7_u8, 1_u8),
gpioe::PE3<Alternate<AF3>> => (7_u8, 2_u8),
gpioe::PE4<Alternate<AF3>> => (7_u8, 3_u8),
gpioe::PE5<Alternate<AF3>> => (7_u8, 4_u8),
);
// all with a TSC and gpiod
#[cfg(any(
feature = "stm32f071",
feature = "stm32f072",
feature = "stm32f078",
feature = "stm32f091",
feature = "stm32f098"
))]
tsc_pins!(
gpiod::PD12<Alternate<AF3>> => (8_u8, 1_u8),
gpiod::PD13<Alternate<AF3>> => (8_u8, 2_u8),
gpiod::PD14<Alternate<AF3>> => (8_u8, 3_u8),
gpiod::PD15<Alternate<AF3>> => (8_u8, 4_u8),
);
pub struct Tsc {
tsc: TSC,
}

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